Apologies for the potential duplication.
-Walid
----------------
CALL FOR PAPERS
======================================================================
Computational Reproducibility at Exascale Workshop (CRE2017)
------------------------------------------------------------
Where: In cooperation with SC17, Denver, Colorado
When: Sunday afternoon, November 12, 2017
Web: http://www.cs.fsu.edu/~cre
Submit: https://easychair.org/conferences/?conf=cre2017
Deadline: Monday, August 28, 2017
Notifications: Monday, September 18, 2017
Full Papers: Monday, October 02, 2017
Organized by: Walid Keyrouz (NIST), Miriam Leeser (NEU), and
Michael Mascagni (FSU & NIST)
======================================================================
This workshop will address the problems of reproducibility in HPC in
general and those anticipated as we scale to Exascale machines in the
next decade. We seek contributions of extended abstracts (two pages)
in the areas of computational reproducibility in HPC from academic,
government, and industry stakeholders. Areas of interest include, but
are not limited to:
- Case studies of reproducibility or the lack of thereof
- Reproducibility issues in current HPC
- System-level solutions
- Algorithmic solutions
- Software solutions
- Uncertainty quantification in computational reproducibility
- Fundamental numerical analysis of reproducibility
- Future prospects
Papers submitted to the workshop will be reviewed and the top papers
will be selected to be presented at the workshop. In addition, a group
of papers will be published in a special issue of the International
Journal of High-Performance Computing and Applications (IJHPCA)
devoted to Computational Reproducibility. Please note that papers
submitted to the IJHPCA for the CRE2017 special issue must fall within
the IJHPCA's editorial scope. This primarily means that all papers
for the special issue must have relevance to high-performance
computing.
Overview and Background
=======================
Experimental reproducibility is a cornerstone of the scientific
method. As computing has grown into a powerful tool for scientific
inquiry, computational reproducibility has been one of the core
assumptions underlying scientific computing. With "traditional"
single-core CPUs, documenting a numerical result was relatively
straightforward. However, hardware developments over the past several
decades have made it almost impossible to ensure computational
reproducibility or to even fully document a computation without
incurring a severe loss of performance. This loss of reproducibility
started when systems combined parallelism (e.g., clusters) with
non-determinism (e.g., single-core CPUs with out-of-order execution).
It has accelerated with recent architectural trends towards platforms
with increasingly large numbers of processing elements, namely
multicore CPUs and compute accelerators (GPUs, Intel Xeon Phi, FPGAs).
Programmers targeting these platforms rely on tools and libraries to
produce codes or execute them efficiently. As a result, codes can run
efficiently, but have execution details that can be impossible to
predict and are often very difficult to understand after execution.
Furthermore, parallel implementations often result in code with
varying execution orders between runs, leading to non-reproducible
computations. The underlying reasons are that (1) the hardware and
system software allocate parallel work in ways that are not always
specifiable at compile time and (2) the execution often proceeds in an
opportunistic manner with the execution order changing between runs.
As such, floating-point computations, which are not commutative and
associative, can have different execution orders and execute on
different processing elements between runs, leading to runs with
varying results as a matter of fact. The predictability of systems is
further complicated by two issues that are becoming more critical as
systems grow in scale: (1) interconnect systems with latencies that
are often outside the control of programmers and (2) reliability as
the mean time between failure (MTBF) is now measured in hours on large
systems. This situation seriously affects the ability to rely on
scientific computations as a metrological substitute for
experimentation.
This workshop extends the Numerical Reproducibility at Exascale
Workshops (conducted in 2015 and 2016 at SC) to address the broader
range of issues in reproducibility that arise when computing at
Exascale. The first edition, NRE2015 was held at SC15, its webpage
can be found here: http://www.nist.gov/itl/ssd/is/numreprod2015.cfm.
The second edition, NRE2016, was at SC16 and its webpage can be found
here: http://www.cs.fsu.edu/~cre/nre-2016.html.
Submissions
===========
Submissions of two page extended abstracts are sought. The format for
the abstracts should follow the IEEE Conference Proceedings format.
Templates are available at "IEEE - Manuscript Templates for Conference
Proceedings"
(https://www.ieee.org/conferences_events/conferences/publishing/templates.ht…).
The full papers must be in the format of the International Journal of
High-Performance Computing and Applications (IJHPCA)
(https://us.sagepub.com/en-us/nam/manuscript-submission-guidelines).
The abstracts are to submitted as a PDF document using Easychair at
https://easychair.org/conferences/?conf=cre2017
Important Dates (all are Mondays)
=================================
Aug. 28, 2017: submission deadline for two page abstracts via
https://easychair.org/conferences/?conf=cre2017
Sep. 18, 2017: notification of authors about their submissions based
on rejection, acceptance as a paper, acceptance as a
paper and presentation
Oct. 02, 2017: submission deadline for full papers for refereeing via
the IJHPCA site, the papers must be in IJHPCA format
Organizers and Co-Editors of the IJHPCA Special Issue
=====================================================
- Walid Keyrouz, National Institute of Standards and Technology (NIST), USA
- Miriam Leeser, Northeastern University, USA
- Michael Mascagni, National Institute of Standards and Technology
(NIST) and Florida State University, USA
Steering Committee
==================
- Dong H. Ahn, Lawrence Livermore National Lab, USA
- David Bailey, UC Davis, USA
- Mike Heroux, Sandia National Laboratory, USA
- Torsten Hoefler, ETH-Zurich, Switzerland
- Walid Keyrouz (co-organizer), NIST, USA
- Miriam Leeser (co-organizer), Northeastern University, USA
- Xiaoye Sherry Li, Lawrence Berkeley National Laboratory, USA
- Yaohang Li, Old Dominion University, USA
- Michael Mascagni (co-organizer), FSU/NIST, USA
- Junji Nagano, Institute of Statistical Mathematics, Japan
- Nathalie Revol, INRIA/ENS-Lyon, France
- Siegfried Rump, University of Hamburg, Germany
- Michela Taufer, University of Delaware
Contact
=======
E-mail: numerical.reproducibility.at.nist.gov (replace ".at." by "@")
-Walid
------
Walid Keyrouz, PhD
Research Scientist
NIST | ITL | SSD
** SIMPDA 2017 **
[Apologies if you receive multiple copies of this cfp]
****************************************************************************
***
SIMPDA 2017
SEVENTH INTERNATIONAL SYMPOSIUM ON DATA-DRIVEN PROCESS DISCOVERY AND
ANALYSIS
6-8 DECEMBER, 2017 - NEUCHATEL, SWITZERLAND
http://simpda2017.di.unimi.it
****************************************************************************
***
## About SIMPDA
With the increasing automation of business processes, growing amounts of
process data become available. This opens new research opportunities for
business process data analysis, mining and modeling. The aim of the IFIP 2.6
International Symposium on Data-Driven Process Discovery and Analysis is to
offer a forum where researchers from different communities and the industry
can share their insight in this hot new field.
The Symposium will feature a number of keynotes illustrating advanced
approaches, shorter presentations on recent research, a competitive PhD
seminar and selected research and industrial demonstrations. This year the
symposium will be held in Neuchatel.
###Call for Papers
The IFIP International Symposium on Data-Driven Process Discovery and
Analysis (SIMPDA 2017) offers a unique opportunity to present new approaches
and research results to researchers and practitioners working in business
process data modelling, representation and privacy-aware analysis.
The symposium will bring together leading researchers, engineers and
scientists from around the world. Full papers must not exceed 15 pages.
Short papers are limited to at most 4 pages. All papers must be original
contributions, not previously published or under review for publication
elsewhere. All contributions must be written in English and must follow the
LNCS Springer Verlag format. Templates can be downloaded from:
http://www.springer.de/comp/lncs/authors.html
Accepted papers will be published in a pre-proceeding volume of CEUR
workshop series. The authors of the accepted papers will be invited to
submit extended articles to a post-symposium proceedings volume which will
be published in the LNBIP series (Lecture Notes in Business Information
Processing, http://www.springer.com/series/7911), scheduled for late 2018
(extended papers length will be between 7000 and 9000 words). Around 10-15
papers will be selected for publication after a second round of review.
### Topics
Topics of interest for submission include, but are not limited to:
- Business Process Modeling languages, notations and methods
- Lightweight Process Model
- Data-aware and data-centric approaches
- Process Mining with Big Data
- Variability and configuration of process models
- Process simulation and static analyses
- Process data query languages
- Process data mining
- Privacy-aware process data mining
- Process metadata and semantic reasoning
- Process patterns and standards
- Foundations of business process models
- Resource management in business process execution
- Process tracing and monitoring
- Process change management and evolution
- Business process lifecycle
- Case studies and experience reports
- Social process discovery
- Crowdsourced process definition and discovery
### Workshop Format:
In accordance to our historical tradition of proposing SIMPDA as a
symposium, we propose an innovative format for this workshop:
The number of sessions depend on the number of submissions but, considering
the previous editions, we envisage to have four sessions, with 4-5 related
papers assigned to each session. A special session (with a specific review
process) will be dedicated to discuss research plan from PhD students.
Papers are pre-circulated to the authors that will be expected to read all
papers in advance but to avoid exceptional overhead, two are assigned to be
prepared with particular care, making ready comments and suggestions.
The bulk of the time during each session will be dedicated to open
conversations about all of the papers in a given session, along with any
linkages to the papers and discussions within an earlier session.
The closing session (30 minutes), will include a panel about open challenges
during which every participant will be asked to assemble their
thoughts/project ideas/goals/etc that they got out of the workshop.
### Call for PhD Research Plans
The SIMPDA PhD Seminar is a workshop for Ph.D. students from all over the
world. The goal of the Seminar is to help students with their thesis and
research plans by providing feedback and general advice on how to use their
research results.
Students interested in participating in the Seminar should submit an
extended abstract describing their research. Submissions can relate to any
aspect of Process Data: technical advances, usage and impact studies, policy
analyses, social and institutional implications, theoretical contributions,
interaction and design advances, innovative applications, and social
implications.
Research plans should be at most of 5 page long and should be organised
following the following structure:
- Abstract: summarises, in 5 line, the research aims and significance.
- Research Question: defines what will be accomplished by eliciting the
relevant the research questions.
- Background: defines the background knowledge providing the 5 most relevant
references (papers or books).
- Significance: explains the relevance of the general topic and of the
specific contribution.
- Research design and methods: describes and motivates the method adopted
focusing on: assumptions, solutions, data sources, validation of results,
limitations of the approach.
- Research stage: describes what the student has done so far.
### SIMPDA PhD award
A doctoral award will be given by the SIMPDA PhD Jury to the best research
plan submitted.
Student Scholarships
An application for a limited number of scholarships aimed at students coming
from emerging countries has been submitted to IFIP.
In order to apply, please contact paolo.ceravolo(a)unimi.it
### CALL for Demonstrations and Posters
Demonstrations showcase innovative technology and applications, allowing for
sharing research work directly with colleagues in a high-visibility setting.
Demonstration proposals should consist of a title, an extended abstract, and
contact information for the authors, and should not exceed 10 pages.
Posters allow the presentation of late-breaking results in an informal,
interactive manner. Poster proposals should consist of a title, an extended
abstract, contact information for the authors, and should not exceed 2
pages.
Accepted demonstrations and posters will be presented at the symposium.
Abstracts will appear in the proceedings.
### Important Dates
- Paper Submission: 4 October 2017
- Submission of PhD Presentations: 4 October 2017
- Notification of Acceptance: 14 November 2017
- Submission of Camera Ready Papers: 28 November 2017
- Second International Symposium on Process Data: 6-8 December 2017
- Post-proceeding submissions: 30 March 2018
## Keynote Speakers
TBA
## Organizers
### CHAIRS
- Paolo Ceravolo, Università degli Studi di Milano, Italy
- Maurice van Keulen, University of Twente, The Netherlands
- Kilan Stoffel, University of Neuchatel, Switzerland
### ADVISORY BOARD
- Ernesto Damiani, Università degli Studi di Milano, Italy
- Erich Neuhold, University of Vienna, Austria
- Philippe Cudré-Mauroux , University of Fribourg, Switzerland
- Robert Meersman, Graz University of Technology, Austria
- Wilfried Grossmann, University of Vienna, Austria
### Program Committee
- Akhil Kumar, Penn State University, USA
- Benoit Depaire, University of Hasselt, Belgium
- Chintan Mrit, University of Twente, The Netherlands
- Christophe Debruyne, Trinity College Dublin, Ireland
- Ebrahim Bagheri, Ryerson University, Canada
- Edgar Weippl, TU Vienna, Austria
- Fabrizio Maria Maggi, University of Tartu, Estonia
- George Spanoudakis, City University London, UK
- Haris Mouratidis, University of Brighton, UK
- Isabella Seeber, University of Innsbruck, Austria
- Jan Mendling, Vienna University of Economics and Business, Austria
- Josep Carmona, UPC - Barcelona, Spain
- Kristof Boehmer, University of Vienna, Austria
- Manfred Reichert, Ulm University, Germany
- Marcello Leida, TAIGER, Spain
- Mark Strembeck, WU Vienna, Austria
- Massimiliano De Leoni, Eindhoven TU, Netherlands
- Matthias Weidlich, Imperial College, UK
- Mazak Alexandra, University of Vienna, Austria
- Mohamed Mosbah, University of Bordeaux
- Mustafa Jarrar, Birzeit University, Palestine
- Robert Singer, FH Joanneum, Austria
- Roland Rieke, Fraunhofer SIT, Germany
- Schahram Dustdar, Vienna University of Technology, Austria
- Thomas Vogelgesang, University of Oldenburg, Germany
- Valentina Emilia Balas, University of Arad, Romania
- Wil Van der Aalst, Technische Universiteit Eindhoven, The Netherlands
[Please accept our apologies if you received multiple copies of this call]
Submission Deadline: June 23, 2017
----------------------------------------------------------------------------------
3rd International Workshop on Algorithmic Aspects of Cloud Computing (ALGOCLOUD 2017)
co-located with ALGO 2017
September 4th - 5th, 2017 – Vienna, Austria
----------------------------------------------------------------------------------
ALGOCLOUD (https://algo2017.ac.tuwien.ac.at/algocloud/ <https://algo2017.ac.tuwien.ac.at/algocloud/>) is the international forum bringing together international researchers, students, and practitioners to present research activities and results on topics related to algorithmic, design, and development aspects of modern cloud-based systems. ALGOCLOUD is co-located with the ALGO conference (https://algo2017.ac.tuwien.ac.at/ <https://algo2017.ac.tuwien.ac.at/>), a leading international meeting of researchers working in algorithms and their engineering.
ALGOCLOUD welcomes submissions on all theoretical, design, and implementation aspects of modern cloud-based systems. ALGOCLOUD is particularly interested in novel algorithms in the context of cloud computing, cloud architectures, as well as experimental work that evaluates contemporary cloud approaches and pertinent applications. ALGOCLOUD also welcomes demonstration manuscripts, which discuss successful elastic system developments, as well as experience/use-case articles. Contributions may span a wide range of algorithms for modeling, practices for constructing and techniques for evaluating operations and services in a variety of systems, including but not limited to, virtualized infrastructures, cloud platforms, datacenters, cloud-storage options, cloud data management, non-traditional key-value stores on the cloud, HPC architectures, etc.
***Keynote Speaker: Prof. Babak Falsafi (EPFL, Switzerland) ***
TOPICS
Suggested topics include, but are not limited to:
- Algorithmic aspects of elasticity
- Search and retrieval algorithms for cloud infrastructures
- Scale-up and -out for NoSQL and columnar databases
- Resource provisioning and management
- Monitoring and analysis of elasticity for virtualized environments
- Analysis of containerized applications
- Cloud deployment tools and their analysis
- Query languages and novel programming models
- Content delivery through cloud infrastructures
- Load-sharing and caching for cloud systems
- Data structures and algorithms for eventually-consistent stores
- Scalable access structures and indexing for cloud data-stores
- Algorithmic aspects for cloud applications
- Machine learning, analytics and data science
- Resource availability, reliability and fail-over
- NoSQL and schema-less data modeling and integration
- Consistency, replication and partitioning CAP
- Transactional models and algorithms for cloud data-stores
PROCEEDINGS
Accepted papers will be included in the post-proceedings in the Lecture Notes in Computer Science by Springer-Verlag (http://www.springer.com/gp/computer-science/lncs <http://www.springer.com/gp/computer-science/lncs>).
SUBMISSION GUIDELINES
Submissions must have a length of up to 12 pages in LNCS format (excluding references and an optional appendix to be read at the discretion of the Program Committee).
Papers should be submitted electronically via the Easy Chair Submission system (https://easychair.org/conferences/?conf=algocloud17 <https://easychair.org/conferences/?conf=algocloud17>).
By submitting a paper the authors acknowledge that in case of acceptance at least one of the authors must register and attend ALGO 2017 or ALGOCLOUD 2017, and present the paper.
IMPORTANT DATES
- Paper submission: June 23, 2017
- Author notification: July 25, 2017
- Workshop: September 4-5, 2017
COMMITTEES
Workshop Chairs
- Dan Alistarh (IST, Austria)
- Alex Delis (University of Athens, Greece)
Proceedings and Publicity Chair
- George Pallis (University of Cyprus, Cyprus)
PC Members
- Stergios Anastasiadis (University of Ioannina, Greece)
- Athman Bouguettaya (University of Sydney, Australia)
- Marco Canini (KAUST, Saudi Arabia)
- Aleksandar Dragojevic (Microsoft Research, UK)
- Schahram Dustdar (TUW, Austria)
- Rachid Guerraoui (EPFL, Switzerland)
- Gabriel Istrate (University of Timişoara & e-Austria RI, Romania)
- Thomas Karagiannis (Microsoft Research, UK)
- Nectarios Koziris (NTUA, Greece)
- Fernando Pedone (University of Lugano, Switzerland)
- Florin Pop (University Politehnica of Bucharest, Romania)
- Raj Ranjan (Newcastle University, UK)
- Luis Rodrigues (Universidade Técnica de Lisboa, Portugal)
- Rizos Sakellariou (University of Manchester, UK)
- Stefan Schmid (Aalborg University, Denmark)
- Zahir Tari (RMIT, Australia)
- Vasileios Trigonakis (Oracle Labs, Switzerland)
- Dimitris Tsoumakos (Ionian University, Greece)
Steering Committee
- Spyros Sioutas (Ionian University, Greece)
- Peter Triantafillou (University of Glasgow, UK)
- Christos D. Zaroliagis (University of Patras, Greece)
Dear Colleague,
We invite you to submit a contribution to SPIFEC 2017, the 1st European
Workshop on Security and Privacy in Fog and Edge Computing. The paper
submission deadline is June 30th.
This workshop will be held on September 14th, in conjunction with
ESORICS 2017. Revised accepted papers will be published as a joint
post-proceedings by Springer in the Lecture Notes in Computer Science
(LNCS) series with other ESORICS Workshops. More information is
available at: https://www.nics.uma.es/pub/spifec
Looking forward to meeting you in Oslo! Best regards, the organizers,
Rodrigo Roman, Chunming Rong, Ruben Rios
Apologies if you receive multiple copies of this email!
________________________________
********** WORKS 2017 Workshop **********
Workflows in Support of Large-Scale Science Workshop
http://works.cs.cardiff.ac.uk/
Monday 13 November 2017, Denver, Colorado, USA.
Held in conjunction with SC17, http://sc17.supercomputing.org/
Paper submission deadline: 30 July 2017
*****************************************
Call For Papers
Data-intensive workflows (a.k.a. scientific workflows) are routinely used
in most scientific disciplines today, especially in the context of
high-performance, parallel and distributed computing. They provide a
systematic way of describing a complex scientific process and rely on
sophisticated workflow management systems to execute on a variety of
parallel and distributed resources. With the dramatic increase of raw data
volume in every domain, they play an even more critical role to assist
scientists in organizing and processing their data and to leverage HPC or
HTC resources, being at the interface between end-users and computing
infrastructures.
This workshop focuses on the many facets of data-intensive workflow
management systems, ranging from actual execution to service management
and the coordination and optimization of data, service and job
dependencies. The workshop covers a broad range of issues in the
scientific workflow lifecycle that include: data-intensive workflows
representation and enactment; designing workflow composition interfaces;
workflow mapping techniques to optimize the execution of the workflow for
different infrastructures; workflow enactment engines that need to deal
with failures in the application and execution environment; and a number
of computer science problems related to scientific workflows such as
semantic technologies, compiler methods, scheduling and fault detection
and tolerance.
The topics of the workshop include but are not limited to:
Big Data analytics workflows
Data-driven workflow processing (including stream-based workflows)
Workflow composition, tools, and languages
Workflow execution in distributed environments (including HPC,
clouds, and grids)
Reproducible computational research using workflows
Dynamic data dependent workflow systems solutions
Exascale computing with workflows
Workflow fault-tolerance and recovery techniques
Workflow user environments, including portals
Workflow applications and their requirements
Adaptive workflows
Workflow optimizations (including scheduling and energy efficiency)
Performance analysis of workflows
Workflow debugging
Workflow provenance
Interactive workflows (including workflow steering)
*****************************************
Important Dates
Papers Due: 30 July 2017
Notifications of Acceptance: 9 September 2017
E-copyright registration completed by authors: 1 October 2017
Final Papers Due: 1 October 2017
Submitted papers must be at most 10 pages long. The proceedings should be
formatted according to
http://www.acm.org/publications/proceedings-template. WORKS papers will be
published in collaboration with SIGHPC and will be available from both ACM
and IEEE digital repositories.
*****************************************
WORKS 2017 Organizing Committee
– PC Chairs
Sandra Gesing, University of Notre Dame, USA
Rizos Sakellariou, University of Manchester, UK
– General Chairs
Johan Montagnat, CNRS, Sophia Antipolis, France
Ian Taylor, Cardiff University, UK and University of Notre Dame, USA
– Steering Committee
David Abramson, University of Queensland, Australia
Malcolm Atkinson, University of Edinburgh, UK
Ewa Deelman, University of Southern California, USA
Michela Taufer, University of Delaware, USA
– Publicity Chairs
Rafael Ferreira da Silva, USC, USA
Ilia Pietri, University of Athens, Greece
*****************************************
WORKS 2017 Program Committee
Pinar Alper, King's College London, UK
Ilkay Altintas, San Diego Supercomputer Center, USA
Khalid Belhajjame, Université Paris-Dauphine, France
Adam Belloum, University of Amsterdam, the Netherlands
Ivona Brandic, TU Wien, Austria
Kris Bubendorfer, Victoria University of Wellington, New Zealand
Jesus Carretero, Universidad Carlos III de Madrid, Spain
Henri Casanova, University of Hawaii at Manoa, USA
Ewa Deelman, USC Information Sciences Institute, USA
Rafael Ferreira Da Silva, USC Information Sciences Institute, USA
Daniel Garijo, USC Information Sciences Institute, USA
Sandra Gesing, University of Notre Dame, USA
Tristan Glatard, CNRS, France
Daniel Katz, University of Illinois Urbana-Champaign, USA
Tamas Kiss, University of Westminster, UK
Dagmar Krefting, HTW Berlin, Germany
Maciej Malawski, AGH University of Science and Technology, Poland
Anirban Mandal, Renaissance Computing Institute, USA
Marta Mattoso, Federal Univ. Rio de Janeiro, Brazil
Andrew Stephen Mcgough, Newcastle University, UK
Paolo Missier, Newcastle University, UK
Jarek Nabrzyski, University of Notre Dame, USA
Daniel de Oliveira, Fluminense Federal University, Brazil
Ilia Pietri, University of Athens, Greece
Radu Prodan, University of Innsbruck, Austria
Omer Rana, Cardiff University, UK
Ivan Rodero, Rutgers University, USA
Rizos Sakellariou, University of Manchester, UK
Domenico Talia, University of Calabria, Italy
Rafael Tolosana-Calasanz, Universidad de Zaragoza, Spain
Chase Wu, New Jersey Institute of Technology, USA
Call for Papers: International Conference on Embedded and VLSI Design 2018
-------------------------------------------------------------------------
The 31st International Conference on VLSI Design
The 17th International Conference on Embedded Systems
January 6-11, 2018, Pune, India
http://embeddedandvlsidesignconference.org
This joint conference is a forum for researchers and designers to present
and discuss current topics in VLSI design, electronic design automation,
embedded systems, and emerging technologies. Two days of tutorials will be
followed by three days of regular paper sessions, special sessions, and
embedded tutorials. Industry presentation sessions along with exhibits,
panel discussions, Design Contest, and Education Forum round off the
program. The conference is followed by the Reliability Aware System Design
and Test (RASDAT) workshop.
TOPICS OF INTEREST: Papers are invited on previously unpublished results in
the following categories:
********************************
EMBEDDED SYSTEMS DESIGN
E1: Embedded Systems Hardware:
HW/SW co-design, SoC, multi-core
systems, board level hardware, HW security, Internet-of-Things (IoT)
devices, sensors/actuators, displays
E2: Embedded Systems Software:
Operating systems, firmware, algorithms, middleware, runtimes,
parallelization, virtualization, software for low power, security,
reliability, real-time support, emerging applications (e.g., automotive,
telematics, analytics)
E3: FPGA and Reconfigurable Systems: FPGA architecture and FPGA
circuit design, CAD for FPGA, FPGA prototyping, FPGA-based accelerators
E4: Wireless Systems: Sensor networks, low-power wireless systems, wireless
protocols, wireless power delivery
E5: Embedded Case Studies: Practical and industrial tools, methodologies,
designs in various application areas: wireless, medical, networking,
multimedia, automotive, controls, etc.
DESIGN TOOLS AND EDA
T1: Design Verification: Functional, formal, coverage-driven,
hardware-assisted, and assertion-based verification, behavioral, RTL, and
gate-level simulation, emulation, equivalence checking
T2: Test, Reliability, Fault-Tolerance:
DFT, fault modelling and simulation, ATPG, BIST, repair, delay test, fault
tolerance, online test, AIMS/RF test, board-level and system-level test,
silicon debug, post-silicon validation, memory test, reliability testing
T3: Computer-Aided Design (CAD): Logic and behavioral synthesis, logic
mapping, simulation and formal verification, layout (partitioning,
placement, routing, floor planning, and compaction), post route
optimizations
DESIGN METHODOLOGIES AND TECHNOLOGY
M1: System-level Design: Methodologies and architectures, processor and
memory design, multi-core, GPU design, networks-on-chip, defect-tolerant
architectures, accelerators, distributed systems (e.g., automotive),
cyber-physical systems
M2: Advances in Digital Design: Logic and physical synthesis, place and
route, clock tree design, timing and signal integrity, design for
manufacturability and yield, power integrity, variation-tolerant design
M3: Analog, Mixed-Signal, and RF Design: Design of analog, mixed signal,
and RF IP, high-speed wired and wireless interfaces, low-power analog and RF
M4: Power-Aware Design: Power analysis and estimation, optimization and
low-power design, energy-efficient design, battery-aware design, thermal
management, energy harvesting
M5: CMOS Technology and Devices: Deep nanoscale CMOS devices, device
modelling and simulation, multi-domain simulation, device/circuit-level
reliability and variability
M6: Emerging Technologies: Post-CMOS devices, MEMS sensors, biomedical
circuits, lab-on-chip, carbon nanotubes, silicon photonics, spintronic,
memristors, neuromorphic and quantum computing
SAFE AND SECURE INTELLIGENT SYSTEMS
S1: Design for Safety and Reliability
Physically unclonable functions, random number generators, fault tolerance
systems and architectures
S2: Secure Circuits and Systems
System security, side channel attacks and anti-piracy methodologies,
Embedded systems security in healthcare, automotive, industrial and IoT
applications
S3: Safety Assurance of Circuits/ Systems
Design for functional safety and certifications in airborne, health care,
automotive systems
********************************
EMBEDDED TUTORIALS AND SPECIAL SESSIONS: Proposals in relevant emerging
areas should be submitted as two-page abstracts. On acceptance, authors are
required to submit full regular papers.
HALF-DAY AND FULL-DAY TUTORIALS: Tutorial proposal are invited for topics
of interest including VLSI design, EDA, VLSI technology, and embedded
systems. The tutorials will be arranged on the first two days of the
conference.
PANELS: Proposals must be submitted with an abstract, and a list of
panelists.
SUBMISSIONS: All submissions should be made electronically via the
conference website by July 16, 2017. Your manuscript should clearly state
the novel ideas, results, and applications of the contribution. Paper
submissions will undergo a double-blind review. Papers must be in PDF
format and not exceed 6 single-spaced pages including figures and
references in two-column IEEE conference paper format. Papers exceeding the
page limit or identifying the authors will be rejected without review.
EXHIBITS: Please contact the Exhibits Chair to explore opportunities to
display your products/services.
FELLOWSHIPS: The conference will award fellowships, based on need and
merit, to partially cover expenses of attendees from India. Application
details will be posted at the conference website.
DESIGN CONTEST: Please check the conference website or contact the Design
Contest Chair for more details.
USER TRACK AND PHD FORUM: Please check the conference website for details
on criteria and submission dates.
IMPORTANT DATES:
Submission of Full paper deadline: July 16, 2017
Acceptance notification: September 17, 2017
Camera ready paper due: October 8, 2017
Call for Papers
The Third International Workshop on Security in NFV-SDN in conjunction with the 3rd IEEE NFV-SDN conference, 6-8 November, Berlin, Germany
Workshop website: http://www.sn-2017.info/
Scope
Network Function Virtualization (NFV) and Software Defined Network (SDN) have changed the networking industry dramatically. NFV virtualizes network services by utilizing virtualization technologies to reduce the dependency on underlying hardware. NFV provides many benefits such as faster service enablement, ease of resource management and lower OPEX and CAPEX. SDN separates the control functions from the underlying physical network by decoupling the control and data planes. SDN provides many benefits such as reduced costs, ease of deployment and management, better scalability, availability, flexibility and fine-grain control of traffic and security. Like traditional networks, they are subject to various security threats and attacks. In this workshop, we invite high-quality submissions in the areas of NFV and SDN security and other related areas. Submitted papers should highlight methods and approaches that can be used to analyse the security risks and requirements, threats and techniques related to NFV and SDN and to provide novel methods and approaches to assure security in NFV and SDN.
Topics of interest
Topics of interest include but are not limited to the following areas:
· Security, reliability and privacy through SDN and NFV in 5G networks
· Management and orchestration of NFV and SDN elements for security
· Secure design of NFV and SDN solutions, security enablers
· Security threats and vulnerabilities introduced by NFV and SDN technologies
· Threat detection and mitigation through SDN and NFV
· Security policy specification and management in SDN and NFV systems
· Security related monitoring and analytics in SDN and NFV solutions
· 5G security architecture, trust and confidence
· Authentication, authorization and Accounting in SDN
· Security of applying SDN to wireless and mobile network
· Security of applying NFV and SDN to IoT
· Security of applying NFV and SDN to cloud computing
· Security of SDN API
· Risk and compliance issues in SDN
· Securing SDN infrastructure
· Security architecture for SDN
· Security standard of SDN
· Security of SDN data plane
· Security of SDN control plane
· Security of SDN application plane
· Security of Routing in SDN
· Security of network slicing
· Security as a service for SDN
The workshop deadlines:
· Paper Submission: June 30, 2017
· Notification of Acceptance: July 15, 2017
· Camera Ready Submission: September 15, 2017
Submission
Please use EDAS to upload your submission at http://edas.info/N23798. The manuscripts must be prepared in English, following IEEE two‐column Manuscript Templates (http://www.ieee.org/conferences_events/conferences/publishing/templates.html) for Conference Proceedings with a maximum length of six (6) printed pages for full papers and up to four (4) pages for short papers (work in progress), including figures. All papers need to be submitted in PDF format via EDAS<http://edas.info/N23798>. All submitted papers will be peer‐reviewed. To be published in the Workshop Proceedings and to be eligible for publication in IEEE Xplore, at least one author of an accepted paper is required to register and present the paper at the workshop. The IEEE reserves the right to exclude a paper from distribution after the conference (including its removal from IEEE Explore) if the paper is not presented at the conference. Papers are reviewed on the basis that they do not contain plagiarized material and have not been submitted to any other conference at the same time (double submission). These matters are taken very seriously and the IEEE Communications Society will take action against any author who engages in either practice.
Workshop Chairs
· Eleni Trouva, NCSR Demokritos, Greece
· Shao Ying Zhu, University of Derby,UK
· George Gardikis, Space Hellas, Greece
· Collin Allison, University of St Andrews,UK
· Linas Maknavicius, Nokia Bell Labs, France
Technical Program Committee (TPC)
· Diego Lopez – Telefonica I&D, Spain
· Harilaos Koumaras – NCSR Demokritos, Greece
· Muhammad Shuaib Siddiqui – i2CAT, Spain
· Ludovic Jacquin – Hewlett Packard Labs, UK
· Nicolae Paladi, Swedish Institute of Computer Science, Sweden
· Augusto Ciuffoletti – University of Pisa, Italy
· Carolina Canales – Ericsson, Spain
· Michail-Alexandros Kourtis – NCSR Demokritos, Greece
· Marco Anisetti – University of Milan, ItalyMarco Anisetti – University of Milan, Italy
· Sandra Scott-Hayward – Queen’s University Belfast, UK
· Miguel Angel Garcia – Ericsson, Spain
· Antonios Litke – Infili, Greece
· Nikolaos Papadakis – Infili, Greece
· Dimitris Katsianis, Incites, Luxemburg
· Antonio Agustin Partor Perales – Telefonica I&D, Spain
· Yacine Rebahi, Fraunhofer Institute for Open Communication Systems FOKUS, Germany
· Abdelkader Outtagarts – Nokia, Bell Labs, France
Contacts
Eleni Trouva - trouva(a)iit.demokritos.gr<mailto:trouva@iit.demokritos.gr>
Dr. Shao Ying Zhu - s.y.zhu(a)derby.ac.uk<mailto:s.y.zhu@derby.ac.uk>
Dr. George Gardikis - ggar(a)space.gr<mailto:ggar@space.gr>
Linas Maknavicius - linas.maknavicius(a)nokia-bell-labs.com<mailto:linas.maknavicius@nokia-bell-labs.com>
Dr. Colin Allison - ca(a)st-andrews.ac.uk<mailto:ca@st-andrews.ac.uk>
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________________________________
********** WORKS 2017 Workshop **********
Workflows in Support of Large-Scale Science Workshop
http://works.cs.cardiff.ac.uk/
Monday 13 November 2017, Denver, Colorado, USA.
Held in conjunction with SC17, http://sc17.supercomputing.org/
Paper submission deadline: 30 July 2017
*****************************************
Call For Papers
Data-intensive workflows (a.k.a. scientific workflows) are routinely used
in most scientific disciplines today, especially in the context of
high-performance, parallel and distributed computing. They provide a
systematic way of describing a complex scientific process and rely on
sophisticated workflow management systems to execute on a variety of
parallel and distributed resources. With the dramatic increase of raw data
volume in every domain, they play an even more critical role to assist
scientists in organizing and processing their data and to leverage HPC or
HTC resources, being at the interface between end-users and computing
infrastructures.
This workshop focuses on the many facets of data-intensive workflow
management systems, ranging from actual execution to service management and
the coordination and optimization of data, service and job dependencies.
The workshop covers a broad range of issues in the scientific workflow
lifecycle that include: data-intensive workflows representation and
enactment; designing workflow composition interfaces; workflow mapping
techniques to optimize the execution of the workflow for different
infrastructures; workflow enactment engines that need to deal with failures
in the application and execution environment; and a number of computer
science problems related to scientific workflows such as semantic
technologies, compiler methods, scheduling and fault detection and
tolerance.
The topics of the workshop include but are not limited to:
Big Data analytics workflows
Data-driven workflow processing (including stream-based workflows)
Workflow composition, tools, and languages
Workflow execution in distributed environments (including HPC,
clouds, and grids)
Reproducible computational research using workflows
Dynamic data dependent workflow systems solutions
Exascale computing with workflows
Workflow fault-tolerance and recovery techniques
Workflow user environments, including portals
Workflow applications
Third IEEE Workshop on
Quantum Communications and Information Technology (QCIT’17)
-----------------------------------------------------------
http://qcit.committees.comsoc.org/qcit17-workshop/
At IEEE Globecom’17, Singapore, 4-8 December 2017
http://globecom2017.ieee-globecom.org
The scope of this dedicated workshop is to explore the opportunities for
application of communications theory and technologies to quantum
technology
and its applications. The workshop is the annual main event of ComSoc’s
Emerging Technical Committee on Quantum Communications and Information
Technology (ETC-QCIT).
Over the last decade, a wide variety of experimental quantum
communications
and processing devices has been invented and used for fundamental
demonstrations in laboratories. Results confirm feasibility of real
applications in quantum communications and information related fields.
Recently one can observe upcoming applications in areas like a quantum
communications, quantum sensors and random number generators which are
partially even commercially available. Companies and governments started
to
spend significant amounts of funding in research and development of
quantum
technologies. However, the step from quantum technology based devices to
real systems running a communications or information processing task has
not
completed yet. Moreover, many problems show opportunities to contribute
with
knowhow, technologies and engineering out of the communications area. The
following topics are crucial to the development of future quantum
technology
based systems:
- Algorithms and applications complexity
- Analysis of classical vs quantum software
- Coding theory
- Coherent routers, repeaters and converters
- Communications and information theory
- Devices and circuits
- Entanglement distillation
- Error correction
- Experimental results and demonstrations
- Interconnection and complexity theory
- Metrology for quantum systems
- Modeling and simulation
- Network coding
- Photonic communications technology
- Processing and systems architecture
- Quantum electro-dynamics
- Quantum information theory
- Quantum key distribution
- Quantum sensors
- Quantum-algorithms and applications
- Remote state preparation
- RF based programming and algorithms
- RF technology and control
- Signal processing for quantum control
It is the aim of this workshop to connect people from academia and
industry
to discuss about theory, technology and applications and exchange ideas to
move efficiently forward in research, engineering and development of this
exciting area.
Submission info for camera-ready manuscripts
--------------------------------------------
Original and unpublished regular papers are solicited from the
above-mentioned
areas. Regular papers have a length of 4 to 6 pages with an optional
payable
7th page. All manuscripts will be peer reviewed and published in the
workshop
proceedings and after presentation in IEEE Xplore. Templates for the
manuscripts can be downloaded from:
http://www.ieee.org/conferences_events/conferences/publishing/templates.html
The formatted manuscript should be electronically submitted as pdf via
EDAS:
https://edas.info/newPaper.php?c=23835
Further information is available in the Globecom 2017 webpages:
http://globecom2017.ieee-globecom.org
Important dates
---------------
Manuscript submission due date: 1. July, 2017
Notification date: 1. September, 2017
Final manuscript due date: 1. October, 2017
Conference date: 4.-8. December, 2017
Workshop organizers
-------------------
Andrea Conti, University of Ferrara, Italy, a.conti(a)ieee.org
Lajos Hanzo, University of Southampton, United Kingdom, lh(a)ecs.soton.ac.uk
Peter Mueller, IBM Research Zurich Laboratory, Switzerland,
pmu(a)zurich.ibm.com
Michael Ng, University of Southampton, United Kingdom, sxn(a)ecs.soton.ac.uk
Dear Colleagues,
We would like to invite you to submit your papers to the IEEE International
Workshop on Cyber-Physical Systems Security (CPS-Sec) to be held in
conjunction with the IEEE Conference on Communications and Network
Security (CNS), http://cns2017.ieee-cns.org/ in Las Vegas, NV USA,
October 9-11, 2017.
The CPS-Sec Workshop will primarily focus on the security and privacy
aspects of Cyber-Physical Systems and Internet of Things. The workshop will
include papers (both novel and work-in-progress submissions), invited
talks, panels, and discussions to facilitate the exchange of research ideas
in a community environment. We are sure that the CPS-Sec workshop will
greatly benefit from your contributions.
The submission deadline is July 18, 2017 and the author notification is
planned for August 9, 2017.
We look forward to your contributions. Please feel free to contact the TPC
Chairs of the CPS-Sec Workshop (suluagac(a)fiu.edu, conti(a)math.unipd.it,
kakkaya(a)fiu.edu) should you have any questions.
For more information regarding the workshop, please visit
http://cns2017.ieee-cns.org/workshop/cps-sec-international-workshop-cyber-
physical-systems-security
Thank you in advance.
----------------------------------
Nico Saputro
Department of Electrical and Computer Engineering
Florida International University