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13th HiPC Student Research Symposium (SRS)
by Sanmukh Kuppannagari 23 Sep '21

23 Sep '21

********************************************************************** We apologize if you received multiple copies of this email. Please feel free to distribute it to those who might be interested ********************************************************************** 13th HiPC Student Research Symposium (SRS) https://hipc.org/srs/ in conjunction with the 28th INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING, DATA, and ANALYTICS (HIPC 2021) December 17-18, 2021 | Virtual Event, INDIA | www.hipc.org OVERVIEW HiPC 2021 will feature the 13th Student Research Symposium on High Performance Computing, Data, and Analytics (HPC) aimed at stimulating and fostering student research, and providing an international forum to highlight student research accomplishments. The symposium will also provide exposure to students in the best practices in HPC in academia and industry. The symposium will feature student posters and provide students with other enriching experiences, such as workshops, industry exhibits, and demos. The Conference Reception and multiple Student Symposium Poster Exhibit sessions will provide an opportunity for students to interact with HPC researchers and practitioners (and recruiters) from academia and industry. Awards for Best Poster, sponsored by IEEE Computer Society – Technical Committee on Parallel Processing (TCPP) – will be presented at the symposium. An online book containing the resumes of the students participating in the symposium will be compiled and made available to the sponsors of the HiPC 2021 conference. TOPICS Papers are solicited in all areas of high-performance computing, data, and analytics, including but not limited to topics mentioned below. High-Performance Computing Algorithms: This track invites papers that describe original research on developing new parallel and distributed computing algorithms, and related advances. Examples of topics that are of interest include (but not limited to): * New parallel and distributed algorithms and design techniques; * Advances in enhancing algorithmic properties or providing guarantees (e.g., fault tolerance, resilience, concurrency, data locality, communication-avoiding); * Classical and emerging computation models (e.g., parallel/distributed models, quantum computing, neuromorphic and other bioinspired models); * Provably efficient parallel and distributed algorithms for advanced scientific computing and irregular applications (e.g., numerical linear algebra, graph algorithms, computational biology); and * Algorithmic techniques for resource allocation and optimization (e.g., scheduling, load balancing, resource management). Architectures: This track invites papers that describe original research on the design and evaluation of high-performance computing architectures, and related advances. Examples of topics of interest include (but not limited to): * Design and evaluation of high-performance processing architectures (e.g., reconfigurable, system-on-chip, many cores, vector processors); * Design and evaluation of networks for high-performance computing platforms (e.g., interconnect topologies, network-on-chip); * Design and evaluation of memory, cache and storage architectures (e.g., 3D, photonic, Processing-In-Memory, NVRAM, burst buffers, parallel I/O); * Approaches to improve architectural properties (e.g., energy/power efficiency, reconfigurable, resilience/fault tolerance, security/privacy); and * Emerging computational architectures (e.g., quantum computing, neuromorphic and other bioinspired architectures). Applications: This track invites papers that describe original research on the design and implementation of scalable applications for execution on parallel and distributed platforms, and related advances. Examples of topics of interest include (but not limited to): * Design and implementation of shared and distributed memory parallel applications (e.g., scientific computing and industry applications, emerging applications in IoT and life sciences – biology, medicine, chemistry, etc.); * Design and simulation methodologies for scaling applications on peta and exascale platforms (e.g., co-design approaches, hardware/software co-design, heterogeneous and hybrid programming); * Hardware acceleration of parallel applications (e.g., CPU/GPUs, multi-GPU clusters, FPGA, vector processors, manycore); and * Design of application benchmarks for parallel and distributed platforms. Systems Software: This track invites papers that describe original research on the design, implementation, and evaluation of systems software for high-performance computing platforms, and related advances. Examples of topics of interest include (but not limited to): * Scalable systems and software architectures for high-performance computing (e.g., middleware, operating systems, I/O services); * Techniques to enhance parallel performance (e.g., compiler/runtime optimization, learning from application traces, profiling); * Techniques to enhance parallel application development and productivity (e.g., Domain-Specific Languages, programming environments, performance/correctness checking and debugging); * Techniques to deal with uncertainties, hardware/software resilience, and fault tolerance; Software for the cloud, data center, and exascale platforms (e.g., middleware tools, schedulers, resource allocation, data migration, load balancing); and * Software and programming paradigms for heterogeneous platforms (e.g., libraries for CPU/GPU, multi-GPU clusters, and other accelerator platforms). Data Science Scalable Algorithms and Analytics: This track invites papers that describe original research on developing scalable algorithms for data analysis at scale, and related advances. Examples of topics of interest include (but not limited to): * New scalable algorithms for fundamental data analysis tasks (supervised, unsupervised learning, and pattern discovery); * Scalable algorithms that are designed to address the characteristics of different data sources and settings (e.g., graphs, social networks, sequences, data streams); * Scalable algorithms and techniques to reduce the complexity of large-scale data (e.g., streaming, sublinear data structures, summarization, compressive analytics); * Scalable algorithms that are designed to address requirements in different data-driven application domains (e.g., life sciences, business, agriculture); and * Scalable algorithms that ensure the transparency and fairness of the analysis. Scalable Systems and Software: This track invites papers that describe original research on developing scalable systems and software for handling data at scale, and related advances. Examples of topics of interest include (but not limited to): * Design of scalable system software to support various applications (e.g., recommendation systems, web search, crowdsourcing applications, streaming applications); * Design of scalable system software for various architectures (e.g., OpenPower, GPUs, FPGAs); * Architectures and systems software to support various operations in large data frameworks (e.g., storage, retrieval, automated workflows, data organization, visualization, visual analytics, human-in-the-loop); * Design and implementation of systems software for distributed data frameworks (e.g., distributed file system, virtualization, cloud services, resource optimization, scheduling); and * Standards and protocols for enhancing various aspects of data analytics (e.g., open data standards, privacy-preserving, and secure schemes). IMPORTANT DATES Submission Opens: August 19, 2021 Submission Deadline: October 01, 2021 Accept/Reject Decision Notification: November 01, 2021 Symposium: December 17-18, 2021 ELIGIBILITY Submissions should have at least one author who is a student during any part of the calendar year 2021. Submissions may have multiple student or non-student co-authors. Submissions must mark student authors with an asterisk (*). SUBMISSION INSTRUCTIONS In order to be considered for a poster at the Student Research Symposium, authors must submit papers/extended abstracts, not exceeding five (5) letter size (8.5in x 11in) pages, in 11 or 12 point font, single-spaced, with 1” margins on all sides. Papers are to be submitted online in PDF format through Easychair at: https://easychair.org/conferences/?conf=hipc2021 The papers will be used to select posters, but will NOT be published in the conference proceedings. This will provide students the flexibility to publish an extended version of their paper at other venues, after benefiting from reviewer feedback from the symposium. Papers submitted to the symposium are expected to be reviewed by at least three independent reviewers. Papers will be judged on technical merit, quality, relevance to the symposium, and related parameters. Plagiarism, in any form, especially verbatim reproduction from other published works, is prohibited. Papers that are plagiarized will be rejected, and the corresponding department and institution will be notified. Facilities for displaying posters will be made available, and the exact specifications of the poster size will be provided later. At least one student author of each paper that is accepted must register and attend the conference to present their work. Papers with no-shows will be retroactively rejected. SYMPOSIUM CHAIRS Ashok Srinivasan, University of West Florida, USA Dip Sankar Banerjee, Indian Institute of Technology Jodhpur, India TECHNICAL PROGRAM COMMITTEE Ashok Srinivasan (Co-chair), University of West Florida Dip Banerjee (Co-chair), Indian Institute of Technology Jodhpur Mainak Adhikari, Indian Institute of Information Technology Lucknow Vikram Aggarwal, Google Ashish Anand, Indian Institute of Technology Guwahati Jayvant Anantpur, Mentor Graphics India Pvt Ltd Manu Awasthi, Ashoka University Suren Byna, Lawrence Berkeley National Laboratory Venkatachalam Chandrasekaran, Sri Sathya Sai Institute of Higher Learning Mainak Chaudhuri, Indian Institute of Technology Kanpur Meysam Ghaffari, Memorial Sloan Kettering Cancer Center Subramaniam KV, PES University Dumitrel Loghin, National University of Singapore Arash Mahyari, Florida Institute for Human and Machine Cognition Amit Majumdar, University of California San Diego, San Diego Supercomputer Center Sreepathi Pai, University of Rochester Madhura Purnaprajna, PES University Ponnuswamy Sadayappan, University of Utah Fahad Saeed, Florida International University Subodh Sharma, Indian Institute of Technology Delhi Jaya Sreevalsan-Nair, International Institute of Information Technology Bangalore Parimala Thulasiraman, University of Manitoba Hemanth Venkateswara, Arizona State University CONTACT Write to us at student_symposium [AT] hipc [DOT] org for more details.

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Live e-Lecture by Mihaela van der Schaar: “Machine learning for medicine and healthcare”, 21st September 2021 17:00-18:00 CET. Upcoming AIDA AI excellence lectures
by Ioanna Koroni 15 Sep '21

15 Sep '21

Dear AI scientist/engineer/student/enthusiast, Prof. Mihaela van der Schaar is the John Humphrey Plummer Professor of Machine Learning, Artificial Intelligence and Medicine at the University of Cambridge, a Fellow at The Alan Turing Institute in London, and a Chancellor’s Professor at UCLA. This prominent AI researcher internationally, will deliver the e-lecture: ‘Machine learning for medicine and healthcare’, on Tuesday 21st September 2021 17:00-18:00 CET (8:00-9:00 am PST), (12:00 am-1:00am CST), see details in: <http://www.i-aida.org/event_cat/ai-lectures/> http://www.i-aida.org/event_cat/ai-lectures/ You can join for free using the zoom link: https://authgr.zoom.us/j/95489189852 & Password: 148148 The <http://www.i-aida.org/> International AI Doctoral Academy (AIDA), a joint initiative of the European R&D projects <https://ai4media.eu/> AI4Media, <https://www.elise-ai.eu/> ELISE, <https://www.humane-ai.eu/> Humane AI Net, <https://tailor-network.eu/> TAILOR, <https://www.vision4ai.eu/> VISION, currently in the process of formation, is very pleased to offer you top quality scientific lectures on several current hot AI topics. Lectures will be offered alternatingly by: Top highly-cited senior AI scientists internationally or Young AI scientists with promise of excellence (AI sprint lectures) The lectures are disseminated through multiple channels and email lists (we apologize if you received it through various channels). If you want to stay informed on future lectures, you can register in the email lists <https://lists.auth.gr/sympa/info/aida> AIDA email list and <https://lists.auth.gr/sympa/info/cvml> CVML email list. Best regards Profs. M. Chetouani, P. Flach, B. O’Sullivan, I. Pitas, N. Sebe -- This email has been checked for viruses by Avast antivirus software. https://www.avast.com/antivirus

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CFP: Parallel Computational Technologies 2022 (Dubna, Russia, March 29–31, 2022)
by Цымблер Михаил Леонидов ич 08 Sep '21

08 Sep '21

FIRST ANNOUNCEMENT AND CALL FOR PAPERS Parallel Computational Technologies (PCT’2022), 16th International Scientific Conference, March 29–31, 2022, Dubna, Russia http://agora.guru.ru/pavt/eng https://link.springer.com/conference/pct Conference founders: Russian Academy of Sciences (http://www.ras.ru) HPC Consortium of Russian Universities (http://hpc-russia.ru) WELCOME Russian Academy of Sciences, High-Performance Computing Consortium of Russian Universities, Moscow State University, Joint Institute for Nuclear Research, and South Ural State University are jointly organizing the 16th International Scientific Conference on Parallel Computational Technologies (PCT’2022) to be held in Dubna, Russia, March 29–31, 2022. The main purpose of the PCT’2022 conference is to provide an opportunity to report and discuss the results achieved by leading research groups in solving practical issues using supercomputer and neural network technologies. The scope of the conference covers all aspects of the application of cloud, supercomputer and neural network technologies in science and technology such as applications, hardware and software, specific languages and packages. The 36th edition of Top50 of the CIS's most powerful computers will be announced on the first day of the conference. On working days of the conference, a supercomputer exhibition will be organized, where leading manufacturers of hardware and software present their latest products in the field of high performance computing. LANGUAGE The official languages of the Conference are Russian and English. SCOPE The scope of the conference includes, but not limited to, the following topics: * Parallel and distributed computing technologies * Cloud computing * Prospective multiprocessor architectures * Parallel and distributed database systems * High performance data mining * Artificial neural networks and deep learning * Management, administration, monitoring and testing of multiprocessor systems * Computational Mathematics * Computational Physics * Computational Chemistry * Gas hydrodynamics and heat transfer * High nonlinear and rapid processes in mechanics * Bioinformatics and medicine * Nanotechnology * Geoinformatics * Cryptography * Image processing and visualization * Computer algebra * Supercomputer education. CALL FOR PAPERS PCT’2022 admits papers presenting original contribution that have not been previously published and are not being submitted to another conference or journal. There are three categories of submissions: * Full paper describes the results of completed scientific research (12 to 15 pages in the LNCS one-column page format). * Short paper reports preliminary results of uncompleted scientific research (up to 12 pages in the LNCS one-column page format). * Abstract of the poster contains information about plans and initial results of recently started scientific research (one standard A4 page). Papers may be prepared in LaTeX or MS Word according to the LNCS one-column page format (see guidelines at the conference website http://agora.guru.ru/pavt2022/, "For Authors" section). Papers should be submitted electronically in PDF format through EasyChair system https://easychair.org/conferences/?conf=pct2022 by December 15, 2021. Each paper will be reviewed by three Program Committee members and/or invited experts to ensure high quality and relevance to the conference. At least one author of the accepted paper must attend the conference and present the paper. PROCEEDINGS All accepted full papers will be published in Springer’s Communications in Computer and Information Science series (https://link.springer.com/conference/pct, indexed in Web of Science and Scopus), final approval pending. All accepted short papers and posters will be published electronically and indexed in Russian Science Index. The best short papers in English will be recommended for publication in Supercomputing Frontiers and Innovations (http://superfri.org, indexed in Scopus, Q2). The best short papers in Russian will be published (after further revision) in Computational Mathematics and Software Engineering series of the Bulletin of the South Ural State University (http://vestnikvmi.susu.ru, indexed in Russian Science Citation Index on the Web of Science platform). IMPORTANT DATES * Submission of abstracts: December 1, 2021 * Submission of the papers: December 15, 2021 * Notification of acceptance: February 1, 2022 * Camera-ready version: February 15, 2022 * Registration for participation in supercomputer exhibition: March 1, 2022 * Registration of participants (non-speakers): March 21, 2022 * Conference: March 28, 2022: arrival date March 29–31, 2022: conference work dates April 1, 2022: departure date CONTACT INFORMATION WEB PAGES Conference web site: http://agora.guru.ru/pavt/eng Submission web site: https://easychair.org/conferences/?conf=pct2022. Leonid Sokolinsky, DSc., Prof. (SUSU, Chelyabinsk) Co-chair of the PCT Program Committee E-mail: Leonid.Sokolinsky(a)susu.ru Tel.: (+7-351) 272 35 00 Mikhail Zymbler, DSc., Assoc. Prof. (SUSU, Chelyabinsk) Academic secretary of the PCT Program Committee E-mail: mzym(a)susu.ru Tel.: (+7-351) 267 90 06, ext. 112 PROGRAM COMMITTEE Chairman of the Program Committee: Viktor Sadovnichiy, academician of RAS, Moscow State University (Russia) Co-chairs of the Program Committee: Jack Dongarra, University of Tennessee (USA) Leonid Sokolinsky, South Ural State University (Russia) Vladimir Voevodin, corresponding member of RAS, Moscow State University (Russia) Academic secretary of the Program Committee: Mikhail Zymbler, South Ural State University (Russia) Members of the Program Committee: S.V. Ablameyko, Belarusian State University (Republic of Belarus) A.P. Afanasiev, Institute for Systems Analysis RAS (Russia) E.N. Akimova, Institute of Mathematics and Mechanics UrB RAS (Russia) A. Andrzejak, Heidelberg University (Germany) P. Balaji, Argonne National Laboratory (USA) Y.Ya. Boldyrev, Saint-Petersburg Polytechnic University (Russia) J. Carretero, Carlos III University of Madrid (Spain) R.K. Gazizov, Ufa State Aviation Technical University (Russia) B.M. Glinsky, Institute of Computational Mathematics and Mathematical Geophysics SB RAS (Russia) V.D. Goryachev, Tver State Technical University (Russia) V.P. Il'in, Institute of Computational Mathematics and Mathematical Geophysics SB RAS (Russia) H. Kobayashi, Tohoku University (Japan) J. Kunkel, University of Hamburg (Germany) S. Kumar, Rudrapur (India) J. Labarta, Barcelona Supercomputing Center (Spain) A. Lastovetsky, University College Dublin (Ireland) T. Ludwig, German Climate Computing Center (Germany) V.N. Lykosov, Institute of Numerical Mathematics RAS (Russia) D. Mallmann, Julich Supercomputing Centre (Germany) M. Michalewicz, A*STAR Computational Resource Centre (Singapore) V.E. Malyshkin, Institute of Computational Mathematics and Mathematical Geophysics SB RAS (Russia) V.Ya. Modorsky, Perm Polytechnic University (Russia) R. Prodan, Alpen-Adria-Universität Klagenfurt (Austria) A.V. Shamakina, High Performance Computing Center in Stuttgart (Germany) P. Shumyatsky, University of Brasilia (Brazil) H. Sithole, Centre for High Performance Computing (Republic of South Africa) A.V. Starchenko, Tomsk State University (Russia) T. Sterling, Indiana University (USA) M. Taufer, University of Delaware (USA) V.E. Turlapov, State University of Nizhny Novgorod (Russia) R. Wyrzykowski, Czestochowa University of Technology (Poland) M.V. Yakobovsky, Institute for Mathematical Modelling RAS (Russia) Y. Yamazaki, Federal University of Pelotas (Brazil)

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Invitation to join Short Course 'Deep Learning and Computer Vision', 6-7th October 2021
by Ioanna Koroni 08 Sep '21

08 Sep '21

Dear Machine Learning and Deep Neural Networks engineers, scientists and enthusiasts, you are welcomed to register in the CVML Short e-course on 'Deep Learning and Computer Vision', 6-7th October 2021: http://icarus.csd.auth.gr/cvml-short-course-on-deep-learning-and-computer-vi sion-for-autonomous-systems-2021/ It will take place as a two-day e-course (due to COVID-19 circumstances), hosted by the Aristotle University of Thessaloniki (AUTH), Thessaloniki, Greece, providing a series of live lectures delivered through a tele-education platform (Zoom). They will be complemented with on-line video recorded lectures and lecture pdfs, to facilitate international participants having time difference issues and to enable you to study at own pace. You can also self-assess your knowledge, by filling appropriate questionnaires (one per lecture). You will be provided programming to improve your programming skills. You will also have accesses to tutorial exercises to better your theoretical understanding of selected CVML topics. This 6th edition of this course is part of the very successful CVML short course series that took place in the last four years. Course description 'Deep Learning and Computer Vision' The short e-course consists of 16 1-hour live lectures organized in two Parts (1 Part per day): Part A lectures (8 hours) provide an in-depth presentation to autonomous systems imaging and the relevant architectures as well as a solid background on the necessary topics of computer vision (Image acquisition, camera geometry, Stereo and Multiview imaging, Mapping and Localization) and machine learning (Introduction to neural networks, Perceptron, backpropagation, Deep neural networks, Convolutional NNs). Part B lectures (8 hours) provide in-depth views of the various topics encountered in autonomous systems perception, ranging from vehicle localization and mapping, to Neural SLAM, target detection and tracking. Part B also contains application-oriented lectures on autonomous drones, cars and marine vessels, e.g., drone mission planning for cinematography and related applications (marine surveillance, infrastructure/building inspection, car vision). Course lectures Part A: (first day, 8 lectures) 1. Introduction to autonomous systems imaging 2. <http://icarus.csd.auth.gr/digital-image-and-videos> Digital Image and Videos 3. <http://icarus.csd.auth.gr/camera-geometry/> Camera geometry 4. <http://icarus.csd.auth.gr/stereo-and-multiview-imaging-lecture> Stereo and Multiview imaging 5. <http://icarus.csd.auth.gr/artificial-neural-networks-perceptron-lecture> Introduction to Artificial Neural Networks. Perceptron 6. <http://icarus.csd.auth.gr/multilayer-perceptron-backpropagation-lecture> Multilayer perceptron. Backpropagation 7. Deep neural networks. <http://icarus.csd.auth.gr/convolutional-neural-networks-lecture> Convolutional NNs 8. Introduction to multiple drone imaging Part B: (second day, 8 lectures) 1. <http://icarus.csd.auth.gr/3d-robot-localization-and-mapping-lecture> Simultaneous Localization and Mapping 2. <http://icarus.csd.auth.gr/neural-slam-lecture/> Neural Slam 3. <http://icarus.csd.auth.gr/deep-object-detection-lecture> Deep Object Detection 4. 2D Visual Object Tracking 5. Drone mission planning and control 6. Introduction to car vision 7. Introduction to autonomous marine vehicles 8. CVML Software Development Tools You can use the following link for course registration: http://icarus.csd.auth.gr/cvml-short-course-on-deep-learning-and-computer-vi sion-for-autonomous-systems-2021/ Lecture topics, sample lecture ppts and videos, self-assessment questionnaires, programming exercises and tutorial exercises can be found therein. For questions, please contact: Ioanna Koroni <koroniioanna(a)csd.auth.gr <mailto:koroniioanna@csd.auth.gr> > The short course is organized by Prof. I. Pitas, IEEE and EURASIP fellow and IEEE distinguished speaker. He is the coordinator of the EC funded International AI Doctoral Academy (AIDA <http://www.i-aida.org/> ), that is co-sponsored by all 5 European AI R&D flagship projects (H2020 ICT48). He was initiator and first Chair of the IEEE SPS Autonomous Systems Initiative. He is Director of the Artificial Intelligence and Information analysis Lab (AIIA Lab), Aristotle University of Thessaloniki, Greece. He was Coordinator of the European Horizon2020 R&D project Multidrone. He is ranked 249-top Computer Science and Electronics scientist internationally by Guide2research (2018). He has 33800+ citations to his work and h-index 86+. AUTH is ranked 153/182 internationally in Computer Science/Engineering, respectively, in USNews ranking. Relevant links: 1) Prof. I. Pitas: https://scholar.google.gr/citations?user=lWmGADwAAAAJ <https://scholar.google.gr/citations?user=lWmGADwAAAAJ&hl=el> &hl=el 2) Horizon2020 EU funded R&D project Aerial-Core: https://aerial-core.eu/ 3) Horizon2020 EU funded R&D project Multidrone: https://multidrone.eu/ 4) International AI Doctoral Academy (AIDA): http://www.i-aida.org/ 5) Horizon2020 EU funded R&D project AI4Media: https://ai4media.eu/ 6) AIIA Lab: https://aiia.csd.auth.gr/ Sincerely yours Prof. I. Pitas Director of the Artificial Intelligence and Information analysis Lab (AIIA Lab) Aristotle University of Thessaloniki, Greece Post scriptum: To stay current on CVML matters, you may want to register in the CVML email list, following instructions in: https://lists.auth.gr/sympa/info/cvml <https://www.avast.com/sig-email?utm_medium=email&utm_source=link&utm_campai gn=sig-email&utm_content=emailclient&utm_term=icon> Virus-free. <https://www.avast.com/sig-email?utm_medium=email&utm_source=link&utm_campai gn=sig-email&utm_content=emailclient&utm_term=link> www.avast.com -- This email has been checked for viruses by Avast antivirus software. https://www.avast.com/antivirus

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Call for Papers - 3rd EduHiPC workshop in conjunction with HiPC-2021
by Sanmukh Kuppannagari 06 Sep '21

06 Sep '21

********************************************************************** We apologize if you received multiple copies of this email. Please feel free to distribute it to those who might be interested ********************************************************************** 3rd Workshop on Education for High Performance Computing (EduHiPC 2021) https://hipc.org/eduhipc/ in conjunction with the 28th INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING, DATA, and ANALYTICS (HIPC 2021) December 17-18, 2021 | Virtual Event, INDIA | www.hipc.org OVERVIEW The 3rd EduHiPC (EduHiPC 2021) workshop invites unpublished manuscripts from academia, industry, and government laboratories on topics pertaining to needs and approaches for augmenting undergraduate and graduate education in Computer Science and Engineering, Computational Science, and computational courses for both STEM and business disciplines with PDC and HPC concepts. Additionally, we highly encourage manuscripts that validate their innovative approaches through the systematic collection and analysis of information to evaluate their performance and impact. The workshop is particularly dedicated to bringing together stakeholders from industry (both hardware vendors and employers), government labs, and academia in the context of HiPC 2021. The goal is to hear the challenges faced by others, to learn about various approaches to addressing these challenges, and to have opportunities to exchange ideas and solutions. We also encourage submissions related to the challenges in imparting education during this difficult pandemic situation. This effort is in coordination with the Center for Parallel and Distributed Computing Curriculum Development and Educational Resources (CDER). Topics of interest include, but are not limited to: - Pedagogical issues in incorporating PDC and HPC in undergraduate and graduate education, especially in core courses. - Novel ways of teaching PDC and HPC topics. - Issues and experiences addressing remote synchronous and asynchronous teaching of PDC/HPC during the current pandemic situation. - Data science and big data aspects of teaching HPC/PDC, including early experience with data science degree programs. - Evidence-based educational practices for teaching HPC/PDC topics that provide evidence about what works best under what circumstances. - Experience with incorporating PDC and HPC topics into core CS/CE courses and in domains. - Experience and challenges with HPC education in developing countries, especially in India, its vicinity, and Asia. - Computational Science and Engineering courses. - Pedagogical tools, programming environments, infrastructures, languages, and projects for PDC and HPC. - Employers’ experiences with new hires and expectation of the level of PDC and HPC proficiency among new graduates. - Education resources based on high-level programming languages and environments such as X10, Chapel, Haskell, Python, Cilk, CUDA, OpenCL, OpenACC, Hadoop, and Spark. - Parallel and distributed models of programming and computation suitable for teaching, learning, and workforce development. - Issues and experiences addressing the gender gap in computing and broadening participation of underrepresented groups. - Challenges in remote teaching, including those related to meaningful engagement of students and assessment. NOTICE ABOUT COVID-19 We are closely monitoring the COVID-19 situation globally and in India in particular. The decision whether to hold the conference on-site or virtually will be made before October 2021. Should the conference be held on-site, we understand that travel to India and within India may still be difficult or even impossible for some. Because travel from outside India will require an entry visa and that there may be travel restrictions still in place, we will arrange some form of remote presentation for those authors. We do not have changes to how accepted papers will be published in IEEE Xplore — every accepted paper will have at least one author who will register at the notified (reduced) registration fee and also present the paper at the conference (virtually/physically). SUBMISSION GUIDELINES Authors should submit papers in PDF format through the submission site (https://easychair.org/conferences/?conf=eduhipc21) We are accepting submissions for full papers (5-8 pages including figures, tables, and references). Submissions should be formatted as single-spaced, double-column pages (IEEE format). Authors must try to revise their papers to incorporate feedback from the reviewers. All accepted papers will be published in the HiPC Workshop Proceedings and will be included in the IEEE Xplore digital library. Accepted papers will be available from the CDER website approximately 2 weeks before the workshop so that attendees can read papers before attending the talks. Papers that are not accepted as full papers may be optionally accepted as short poster papers (2 pages). Authors of papers accepted as poster papers will be invited to revise their papers in a 2-page format. Authors of all accepted full and short papers must present at the workshop. Authors will be further invited to publish their work in a Journal of Parallel and Distributed Computing (JPDC) special issue, as in the past workshops. IMPORTANT DATES Abstract Submission Deadline: October 7, 2021 (encouraged) Paper Submission Deadline: October 12, 2021 (hard deadline) Paper Notification: November 5, 2021 Camera-ready Deadline: November 12, 2021 All deadlines are at 11:59 PM AOE (UTC-12). Organizing Committee Sushil Prasad, University of Texas, San Antonio, USA Sheikh Ghafoor, Tennessee Tech University, USA Alan Sussman, National Science Foundation & University of Maryland, USA Ramachandran Vaidyanathan, Louisiana State University, USA Anshul Gupta, IBM, USA Charles Weems, University of Massachusetts, USA Ashish Kuvelkar, CDAC, India Preeti Malakar, IIT Kanpur, India Workshop Co-Chairs Sushil K. Prasad, University of Texas San Antonio, USA, sushil.prasad(a)utsa.edu Sheikh Ghafoor, Tennessee Tech University, USA, sghafoor(a)tntech.edu Program Co-Chairs Ashish Kuvelkar, CDAC, India, ashishk(a)cdac.in Preeti Malakar, IIT Kanpur, India, pmalakar(a)cse.iitk.ac.in Proceedings Chair Satish Puri, Marquette University, USA Tentative Program Committee Ramachandran Vaidyanathan, Louisiana State University, USA Martina Barnas, Indiana University Bloomington, USA Nasser Giacaman, The University of Auckland, NZ Henry Gabb, Intel, USA Mike Rogers, Tennessee Tech University, USA Anshul Gupta, IBM Research, USA Ritu Arora, University of Texas, USA David Brown, Elmhurst University, USA Joel Adams, Calvin College, USA Charles Weems, University of Massachusetts, USA Alan Sussman, University of Maryland, USA David Bunde, Knox College, USA Chitra P., Thiagarajar College of Engineering, India Kazi A. Kalpoma, Ahsanullah University of Engineering and Technology, Bangladesh Devangi Parikh, University of Texas, USA Somnath Roy, IIT Kharagpur Unnikrishnan C, IIT Palakkad Swarnendu Biswas, IIT Kanpur Nikhil Hegde, IIT Dharwad Jagpreet Singh, IIIT Allahabad G. Ramakrishna, IIT Tirupati

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[Call for Nomination] - BenchCouncil Distinguished Doctoral Dissertation Award
by haotianshu＠ict.ac.cn 02 Sep '21

02 Sep '21

[Apologies if you receive multiple copies] CALL FOR NOMINATION ========================================================== 2021 BenchCouncil Distinguished Doctoral Dissertation Award (1000$) https://www.benchcouncil.org/html/awards.html#doctor Submission deadline: October 15, 2021 End of Day, Anywhere on Earth (AoE) Online Nomination Form: https://forms.gle/BSTqXUBTgB4gG3EM8 ========================================================== Introduction ---------------- International Open Benchmark Council (BenchCouncil) established the BenchCouncil Distinguished Doctoral Dissertation Award program to recognize and encourage superior research and writing by doctoral candidates in the broad field of benchmarks, data, standards, evaluations, and optimization. Prof. Jack Dongarra from the University of Tennessee, Prof. Xiaoyi Lu from the University of California, Merced, and Dr. Jeyan Thiyagalingam from STFC-RAL will co-lead the Award Committee. Among the submissions, four candidates will be selected as finalists. They will be invited to give a 30-minute presentation at the 2021 BenchCouncil International Symposium on Benchmarking, Measuring and Optimizing (Bench’21, virtual, Nov 14-16, 2021) and contribute research articles to BenchCouncil Transactions on Benchmarks, Standards and Evaluations. Finally, one among the four will receive the award, which carries a $1,000 honorarium. Eligibility ------------------------ The committee welcomes the proposals from the following communities (but not limited to): architecture, systems, database, high-performance computing, machine learning or AI, medicine, bioinformatics, or other scientific disciplines. An eligibility cycle opens October 1, 2019, and ends the following October 15, 2021. Nominations are welcomed from any country. -- Only those who were awarded Ph.D. in the past two years are eligible for this award. -- Only the accepted final version of a nominated Ph.D. dissertation will be considered, and it must have been filed with the writer’s institution during the nomination cycle. -- The writer or the writer’s Ph.D. advisor can nominate a dissertation, and a dissertation may be nominated only once. -- The benchmarks, data, or tools that are the essential contributions of the dissertation should be open-sourced. -- The committee members cannot nominate their students. -- Each dissertation version submitted for consideration must include an English abstract of 3,000 words maximum. Submissions ------------------------ Online Nomination Form: https://forms.gle/BSTqXUBTgB4gG3EM8 Nominations for the BenchCouncil Doctoral Dissertation Award should be submitted using the online nomination form. Submitted materials should explain the contribution in terms understandable to a non-specialist. Each nomination involves several components: -- Name, address, phone number, and email address of the candidate's thesis advisor -- Name, address, and email address of the candidate. Affiliation should be the name of the school. -- Suggested citation. The citation should be a concise statement (maximum of 25 words) describing the critical technical or professional accomplishment for which the candidate merits this award. Note that the final wording for awardees will be at the discretion of the Award Committee. -- Nomination statement (200-300 words in length) addressing why the candidate should receive this award. This should address the significance of the dissertation, not simply repeat the information in the abstract. -- A copy of the dissertation. Each submitted dissertation for consideration must include an English abstract of maximally 3000 words. -- Endorsement letters. At least two supporting letters should be included from experts in the field who can provide additional insights or evidence of the dissertation’s impact. (The nominator/advisor may not write a letter of support.) Each letter should include the name, address, and telephone number of the endorser. The nominator should collect the letters and bundle them for submission. The endorsement letter and supporting letters can be combined in one file in your pdf upload. Review Criteria ------------------------ Dissertations will be reviewed for technical depth and significance of the research contribution, the potential impact on theory and practice. In the first round, the four candidates will be singled out. Each one will give a 30-minute presentation in the distinguished Ph. D. dissertation session chaired by the committee, and contribute research articles to BenchCounncil Transactions on Benchmarks, Standards and Evaluation. Finally, one candidate will be awarded the BenchCouncil Distinguished Doctoral Dissertation Award carrying a $1,000 honorarium. The award is presented each year at the Awards Banquet during BenchCouncil Bench Conference ( https://www.benchcouncil.org/bench/ ). Award Committee Co-chairs --------------------- Prof. Jack Dongarra, University of Tennessee Dr. Xiaoyi Lu, The University of California, Merced Dr. Jeyan Thiyagalingam, STFC-RAL 2021 BenchCouncil International Symposium on Benchmarking, Measuring and Optimizing (Bench’21) ========================================================== Bench’21 Website: http://www.benchcouncil.org/bench21/index.html Conference date: Nov. 14th - Nov. 16th, 2021 (Virtual) ========================================================== Bench’21 conference invites manuscripts describing original work in the area of benchmarking, evaluation methods and tools in Big Data, Artificial Intelligence, High-Performance Computing and Architectures. All accepted papers will be presented at the Bench’21 conference and will be published in a special issue of the BenchCouncil Transactions on Benchmarks, Standards and Evaluation (TBench, https://www.benchcouncil.org/journal.html ). Sponsored and organized by the BenchCouncil, Bench’s multi-disciplinary emphasis provides an ideal environment for developers and researchers from the architecture, system, algorithm, and application communities to discuss practical and theoretical work covering workload characterization, benchmarks and tools, evaluation, measurement and optimization, and dataset generation. BenchCounncil Transactions on Benchmarks, Standards and Evaluations BenchCouncil Transactions on Benchmarks, Standards and Evaluations (TBench) is an open-access multi-disciplinary journal dedicated to benchmarks, standards, evaluations, optimizations, and data sets. It will take a hybrid publication mode with the Bench Conference. Both TBench and Bench use a double-blind review process. Papers that are accepted to present at the Bench conference will appear in the issue of TBench immediately following acceptance. Meanwhile, the accepted TBench papers will be encouraged but not mandatory to register and present at the Bench conference. TBench will be OA without any charge. It seeks a fast-track publication with an average turnaround time of two months. Submit your paper at https://www.editorialmanager.com/tbench/default.aspx TBench Editorial Board Co-EIC Prof. Dr. Jianfeng Zhan, ICT, Chinese Academy of Sciences and BenchCouncil Prof. Dr. Tony Hey, Rutherford Appleton Laboratory STFC, UK Advisory Board Prof. Jack Dongarra, University of Tennessee, USA Prof. Geoffrey Fox, Indiana University, USA Prof. D. K. Panda, The Ohio State University, USA

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Call for Papers - 13th HiPC Student Research Symposium (SRS)
by Sanmukh Kuppannagari 31 Aug '21

31 Aug '21

********************************************************************** We apologize if you received multiple copies of this email. Please feel free to distribute it to those who might be interested ********************************************************************** 13th HiPC Student Research Symposium (SRS) www.hipc.org/srs in conjunction with the 28th INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING, DATA, and ANALYTICS (HIPC 2021) December 17-20, 2021 | Virtual Event, INDIA | www.hipc.org OVERVIEW HiPC 2021 will feature the 13th Student Research Symposium on High Performance Computing, Data, and Analytics (HPC) aimed at stimulating and fostering student research, and providing an international forum to highlight student research accomplishments. The symposium will also provide exposure to students in the best practices in HPC in academia and industry. The symposium will feature student posters and provide students with other enriching experiences, such as workshops, industry exhibits, and demos. The Conference Reception and multiple Student Symposium Poster Exhibit sessions will provide an opportunity for students to interact with HPC researchers and practitioners (and recruiters) from academia and industry. Awards for Best Poster, sponsored by IEEE Computer Society – Technical Committee on Parallel Processing (TCPP) – will be presented at the symposium. An online book containing the resumes of the students participating in the symposium will be compiled and made available to the sponsors of the HiPC 2021 conference. TOPICS Papers are solicited in all areas of high-performance computing, data, and analytics, including but not limited to topics mentioned below. High-Performance Computing Algorithms: This track invites papers that describe original research on developing new parallel and distributed computing algorithms, and related advances. Examples of topics that are of interest include (but not limited to): - New parallel and distributed algorithms and design techniques; - Advances in enhancing algorithmic properties or providing guarantees (e.g., fault tolerance, resilience, concurrency, data locality, communication-avoiding); - Classical and emerging computation models (e.g., parallel/distributed models, quantum computing, neuromorphic and other bioinspired models); - Provably efficient parallel and distributed algorithms for advanced scientific computing and irregular applications (e.g., numerical linear algebra, graph algorithms, computational biology); and - Algorithmic techniques for resource allocation and optimization (e.g., scheduling, load balancing, resource management). Architectures: This track invites papers that describe original research on the design and evaluation of high-performance computing architectures, and related advances. Examples of topics of interest include (but not limited to): - Design and evaluation of high-performance processing architectures (e.g., reconfigurable, system-on-chip, many cores, vector processors); - Design and evaluation of networks for high-performance computing platforms (e.g., interconnect topologies, network-on-chip); - Design and evaluation of memory, cache and storage architectures (e.g., 3D, photonic, Processing-In-Memory, NVRAM, burst buffers, parallel I/O); - Approaches to improve architectural properties (e.g., energy/power efficiency, reconfigurable, resilience/fault tolerance, security/privacy); and - Emerging computational architectures (e.g., quantum computing, neuromorphic and other bioinspired architectures). Applications: This track invites papers that describe original research on the design and implementation of scalable applications for execution on parallel and distributed platforms, and related advances. Examples of topics of interest include (but not limited to): - Design and implementation of shared and distributed memory parallel applications (e.g., scientific computing and industry applications, emerging applications in IoT and life sciences – biology, medicine, chemistry, etc.); - Design and simulation methodologies for scaling applications on peta and exascale platforms (e.g., co-design approaches, hardware/software co-design, heterogeneous and hybrid programming); - Hardware acceleration of parallel applications (e.g., CPU/GPUs, multi-GPU clusters, FPGA, vector processors, manycore); and - Design of application benchmarks for parallel and distributed platforms. Systems Software: This track invites papers that describe original research on the design, implementation, and evaluation of systems software for high-performance computing platforms, and related advances. Examples of topics of interest include (but not limited to): - Scalable systems and software architectures for high-performance computing (e.g., middleware, operating systems, I/O services); - Techniques to enhance parallel performance (e.g., compiler/runtime optimization, learning from application traces, profiling); - Techniques to enhance parallel application development and productivity (e.g., Domain-Specific Languages, programming environments, performance/correctness checking and debugging); - Techniques to deal with uncertainties, hardware/software resilience, and fault tolerance; - Software for the cloud, data center, and exascale platforms (e.g., middleware tools, schedulers, resource allocation, data migration, load balancing); and - Software and programming paradigms for heterogeneous platforms (e.g., libraries for CPU/GPU, multi-GPU clusters, and other accelerator platforms). Data Science Scalable Algorithms and Analytics: This track invites papers that describe original research on developing scalable algorithms for data analysis at scale, and related advances. Examples of topics of interest include (but not limited to): - New scalable algorithms for fundamental data analysis tasks (supervised, unsupervised learning, and pattern discovery); - Scalable algorithms that are designed to address the characteristics of different data sources and settings (e.g., graphs, social networks, sequences, data streams); - Scalable algorithms and techniques to reduce the complexity of large-scale data (e.g., streaming, sublinear data structures, summarization, compressive analytics); - Scalable algorithms that are designed to address requirements in different data-driven application domains (e.g., life sciences, business, agriculture); and - Scalable algorithms that ensure the transparency and fairness of the analysis. Scalable Systems and Software: This track invites papers that describe original research on developing scalable systems and software for handling data at scale, and related advances. Examples of topics of interest include (but not limited to): - Design of scalable system software to support various applications (e.g., recommendation systems, web search, crowdsourcing applications, streaming applications); - Design of scalable system software for various architectures (e.g., OpenPower, GPUs, FPGAs); - Architectures and systems software to support various operations in large data frameworks (e.g., storage, retrieval, automated workflows, data organization, visualization, visual analytics, human-in-the-loop); - Design and implementation of systems software for distributed data frameworks (e.g., distributed file system, virtualization, cloud services, resource optimization, scheduling); and - Standards and protocols for enhancing various aspects of data analytics (e.g., open data standards, privacy-preserving, and secure schemes). IMPORTANT DATES Aug 19, 2021 > Submission Opens Sep 17, 2021 > Submission Deadline Nov 1, 2021 > Accept/Reject Decision Notification Dec 17-20, 2021 > Symposium ELIGIBILITY Submissions should have at least one author who is a student during any part of the calendar year 2021. Submissions may have multiple student or non-student co-authors. Submissions must mark student authors with an asterisk (*). SUBMISSION INSTRUCTIONS In order to be considered for a poster at the Student Research Symposium, authors must submit papers/extended abstracts, not exceeding five (5) letter size (8.5in x 11in) pages, in 11 or 12 point font, single-spaced, with 1'' margins on all sides. Papers are to be submitted online in PDF format through Easychair at: https://easychair.org/conferences/?conf=hipc2021 The papers will be used to select posters, but will NOT be published in the conference proceedings. This will provide students the flexibility to publish an extended version of their paper at other venues, after benefiting from reviewer feedback from the symposium. Papers submitted to the symposium are expected to be reviewed by at least three independent reviewers. Papers will be judged on technical merit, quality, relevance to the symposium, and related parameters. Plagiarism, in any form, especially verbatim reproduction from other published works, is prohibited. Papers that are plagiarized will be rejected, and the corresponding department and institution will be notified. Facilities for displaying posters will be made available, and the exact specifications of the poster size will be provided later. At least one student author of each paper that is accepted must register and attend the conference to present their work. Papers with no-shows will be retroactively rejected. SYMPOSIUM CO-CHAIRS Ashok Srinivasan, University of West Florida, USA Dip Sankar Banerjee, IIT Jodhpur, India CONTACT Contact student_symposium at hipc dot org for more details.

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Call for Participation - International Conference on Logic Programming (ICLP 2021)
by Miguel Areias 30 Aug '21

30 Aug '21

========================================================================= CALL FOR PARTICIPATION ========================================================================= The 37th International Conference on Logic Programming (ICLP 2021) https://iclp2021.dcc.fc.up.pt/ ========================================================================= The virtual edition of ICLP 2021 will run from September 20 until September 27, 2021. The conference will be held online and we strongly encourage all interested people to register to access the event and interact with other participants. The registration conditions are available at https://iclp2021.dcc.fc.up.pt/index.html#registration The main program is available at https://iclp2021.dcc.fc.up.pt/index-program.html This year's edition includes five outstanding talks by William Cohen (Google AI), John Hooker (CMU), Phokion Kolaitis (UC Santa Cruz and IBM Almaden), Stuart Russell (UC Berkeley) and Jeff Ullman (Stanford University) https://iclp2021.dcc.fc.up.pt/index.html#keynotes and eight affiliated events https://iclp2021.dcc.fc.up.pt/index.html#affiliatedevents Looking forward to meet you in the ICLP 2021 virtual conference. Miguel Areias (on behalf of ICLP 2021 Chairs). ========================================================================= Any additional question can be directed towards ICLP 2021 Chairs: iclp2021(a)easychair.org =========================================================================

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Deadline Extension ScalA@SC: 12th Workshop on Latest Advances in Scalable Algorithms for Large-Scale Systems - Papers due September 19
by Engelmann, Christian 28 Aug '21

28 Aug '21

We apologize if you receive multiple copies of this notice. ----------------------------------------------------------------------------- ScalA21: 12th Workshop on Latest Advances in Scalable Algorithms for Large-Scale Systems held in conjunction with the SC21: The International Conference on High Performance Computing, Networking, Storage and Analysis in cooperation with the IEEE Computer Society Technical Consortium on High Performance Computing (TCHPC) November 19, 2021, St. Louis, MO, USA <http://www.csm.ornl.gov/srt/conferences/Scala/2021> Novel scalable scientific algorithms are needed in order to enable key science applications to exploit the computational power of large-scale systems. This is especially true for the current tier of leading petascale machines and the road to exascale computing as HPC systems continue to scale up in compute node and processor core count. These extreme-scale systems require novel scientific algorithms to hide network and memory latency, have very high computation/communication overlap, have minimal communication, and have no synchronization points. With the advent of Big Data and AI in the past few years the need of such scalable mathematical methods and algorithms able to handle data and compute intensive applications at scale becomes even more important. Scientific algorithms for multi-petaflop and exa-flop systems also need to be fault tolerant and fault resilient, since the probability of faults increases with scale. Resilience at the system software and at the algorithmic level is needed as a crosscutting effort. Finally, with the advent of heterogeneous compute nodes that employ standard processors as well as GPGPUs, scientific algorithms need to match these architectures to extract the most performance. This includes different system-specific levels of parallelism as well as co-scheduling of computation. Key science applications require novel mathematical models and system software that address the scalability and resilience challenges of current- and future-generation extreme-scale HPC systems. Submission Guidelines --------------------- Authors are invited to submit manuscripts in English structured as technical papers at a length of at least 6 letter size (8.5in x 11in) pages and not exceeding 8 pages, including figures, tables, and references using the IEEE format for conference proceedings. Reference style files are available at <http://www.ieee.org/conferences_events/conferences/publishing/templates.html>. Submitted papers must represent original unpublished research that is not currently under review for any other conference or journal. Papers not following these guidelines will be rejected without review and further action may be taken, including (but not limited to) notifications sent to the heads of the institutions of the authors and sponsors of the conference. Submissions received after the due date, exceeding length limit, or not appropriately structured may also not be considered. Papers should be submitted electronically at <https://submissions.supercomputing.org>. All manuscripts will be peer-reviewed and judged on correctness, originality, technical strength, and significance, quality of presentation, and interest and relevance to the workshop attendees. Accepted papers will be published with the IEEE Computer Society as part of the SC21 workshop proceedings in the IEEE Xplore Digital Library. At least one author of an accepted paper must register for and present the paper at the workshop. Authors may contact the workshop program chair, Christian Engelmann at engelmannc(a)ornl.gov<mailto:engelmannc@ornl.gov>, for more information. Transparency and Reproducibility Initiative ------------------------------------------- As part of a major initiative that aims to increase the level of reproducibility and replicability of results, ScalA20 invites authors of technical papers to submit optional appendix information that can promote better reproducibility of computational results. Authors are highly encouraged to provide a 2-page Artifact Description Appendix, which will not count toward the page limit of the submission. Notes: - A paper cannot be disqualified based on information provided or not provided in this appendix, nor if the appendix is not available. - The availability and quality of an appendix can be used in ranking a paper. In particular, if two papers are of similar quality, the existence and quality of the appendices can be part of the evaluation process. - Appendices should not be used to circumvent the page limit. Further information about the SC Transparency and Reproducibility Initiative can be found at <https://sc21.supercomputing.org/submit/transparency-reproducibility-initiat…>. Important Web Sites ------------------- - ScalA21 Website: <https://www.csm.ornl.gov/srt/conferences/Scala/2021> - ScalA21 Submissions: <https://submissions.supercomputing.org> - SC21 website: <http://sc21.supercomputing.org/> Important Dates --------------- - Full paper submission: September 19, 2021 - Notification of acceptance: October 1, 2021 - IEEE e-Copyright submission (firm): October 7, 2021 - Final paper submission (firm): October 11, 2021 - Workshop/conference early registration: October 15, 2021 - Workshop: 8:30am - 12pm CST, November 19, 2021 Topics of interest include, but are not limited to: --------------------------------------------------- - Novel scientific algorithms that improve performance, scalability, resilience, and power efficiency - Porting scientific algorithms and applications to many-core and heterogeneous architectures - Performance and resilience limitations of scientific algorithms and applications at scale, including Data Science approaches in dealing with Big Data - Crosscutting approaches (system software and applications) in addressing scalability challenges - Scientific algorithms that can exploit extreme concurrency (e.g. 1 billion for exascale by 2023) - Naturally fault tolerant, self-healing, or fault oblivious scientific algorithms - Programming model and system software support for algorithm scalability and resilience (including ones enabling Big Data processing) Workshop Chairs --------------- - Vassil Alexandrov, Hartree Centre, Science and Technology Facilities Council, UK - Al Geist, Oak Ridge National Laboratory, USA - Jack Dongarra, University of Tennessee, Knoxville, USA Workshop Program Chair ---------------------- - Christian Engelmann, Oak Ridge National Laboratory, USA Contact at engelmannc(a)ornl.gov<mailto:engelmannc@ornl.gov> Program Committee ----------------- - Hartwig Anzt, University of Tennessee, Knoxville, USA - Rick Archibald, Oak Ridge National Laboratory, USA - Marco Berghoff, Karlsruhe Institute of Technology, Germany - Hans-Joachim Bungartz, Technical University of Munich, Germany - Florina M. Ciorba, University of Basel, Switzerland - James Elliott, Sandia National Laboratories, USA - Nahid Emad, University of Versailles SQ, France - Wilfried Gansterer, University of Vienna, Austria - Yasuhiro Idomura, Japan Atomic Energy Agency, Japan - Kirk E. Jordan, IBM T.J. Watson Research, USA - Dieter Kranzlmueller, Ludwig-Maximilians-University Munich, Germany - Sriram Krishnamoorthy, Pacific Northwest National Laboratory, USA - Paul Lin, Lawrence Berkeley National Laboratory, USA - Kengo Nakajima, RIKEN, Japan - Yves Robert, ENS Lyon, France - Stuart Slattery, Oak Ridge National Laboratory, USA - Valerie Taylor, Argonne National Laboratory, USA - Keita Teranishi, Sandia National Laboratories, USA -- Christian Engelmann, Ph.D. Senior Scientist & Group Leader Intelligent Systems and Facilities Group Advanced Computing Systems Research Section Computer Science and Mathematics Division Oak Ridge National Laboratory Mail: P.O. Box 2008, Oak Ridge, TN 37831-6173, USA Phone: +1 (865) 574-3132 / Fax: +1 (865) 576-5491 e-Mail: engelmannc(a)ornl.gov<mailto:engelmannc@ornl.gov> / Home: www.christian-engelmann.info

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HiPar21@SC21: Call For Participation - Submit by August 30th!
by Francesco Rizzi 24 Aug '21

24 Aug '21

``` *************************************************************************** CALL FOR PARTICIPATION 2nd Workshop on Hierarchical Parallelism for Exascale Computing ---HiPar21--- Sunday, Nov. 14th Held in conjunction with SC21, Nov. 14-19 2021, St. Louis, USA In cooperation with: IEEE and TCHPC. www.hipar.net *************************************************************************** ================================ Summary ================================ High Performance Computing (HPC) platforms are evolving towards having fewer but more powerful nodes, driven by the increasing number of physical cores in multiple sockets and accelerators. The boundary between nodes and networks is starting to blur, with some nodes now containing tens of compute elements and memory sub-systems connected via a memory fabric. The immediate consequence is an increase in complexity due to ever more complex architectures (e.g., memory hierarchies), novel accelerator designs, and energy constraints. Spurred largely by this trend, hierarchical parallelism is gaining momentum. This approach embraces, rather than avoiding, the intrinsic complexity of current and future HPC systems by exploiting parallelism at all levels: compute, memory and network. This workshop focuses on hierarchical parallelism. It aims to bring together application, hardware, and software practitioners proposing new strategies to fully exploit computational hierarchies, and examples to illustrate their benefits to achieve extreme scale parallelism. ================================ Scope and Aims ================================ HiPar21 welcomes HPC practitioners from all areas, ranging from hardware and compiler experts to algorithms and software developers, to present and discuss new studies, approaches, and cutting-edge ideas to utilize multi-level parallelism for extreme scale computing. We welcome contributions from the HPC community addressing the use of emerging architectures, focusing particularly on those characterized by fewer but more powerful nodes as well as systems with hierarchical network with tiered communication semantics. Specifically, the emphasis is on the design, implementation, and application of programming models for multi-level parallelism, including abstractions for hierarchical memory access, heterogeneity, multi-threading, vectorization, and energy efficiency, as well as scalability and performance studies thereof. Of particular interest are models addressing these concerns portably: providing ease of programming and maintaining performance in the presence of varied accelerators, hardware configurations, and execution models. Studies that explore the merits of specific approaches to addressing these concerns, such as generic programming or domain specific languages, are also in scope. The workshop is not limited to the traditional HPC software community. As one example, another key topic is the use of hierarchical parallelism in dealing with the challenges arising in machine learning due to the growing importance of this field, the large scale of systems tackled in that area, and the increasing interest from more traditional HPC areas. Finally, we remark that a key goal of HiPar21 is to highlight not just success stories. We welcome contributions that provide compelling results and discussions on the hardest challenges to overcome leading to exascale, the role hierarchical parallelism can play in them, as well as relevant drawbacks. ================================ Topics ================================ Submissions are encouraged in, but not limited to the following areas: * Hardware, software, and algorithmic advances for efficient use of memory hierarchies, multi-threading and vectorization; * Efficient use of nested parallelism, for example CUDA dynamic parallelism, for large scale simulations; * Hierarchical work scheduling and execution; * Programming heterogeneous nodes; * Leading-edge programming models, for example fully distributed task-based models and hybrid MPI+X, with X representing shared memory parallelism via threads, vectorization, tasking or parallel loop constructs. * Implementations of algorithms that are natural fits for nested work (for example approaches that use recursion); * Challenges and successes in managing computing hierarchies; * Examples demonstrating effective use of the combination of inter-node and intra-node parallelism; * Novel approaches leveraging asynchronous execution to maximize efficiency; * Challenges and successes of porting of existing applications to many-core and heterogeneous platforms; * Recent developments in compiler optimizations for emerging architectures; * Applications of hierarchical programming models from emerging AI fields, for example deep learning and extreme-scale data analytics. ================================ Papers Submission Guidelines ================================ We solicit papers submissions in the following categories: (a) Regular research papers: Intended for submissions describing original work and ideas that have NOT appeared in another conference or journal, and are NOT currently under review for any other conference or journal. Regular papers must be at least (6) and must not exceed (10) letter size pages (U.S. letter – 8.5"x11"). Accepted regular papers will be published in the workshop proceedings in cooperation with IEEE TCHPC. (b) Short papers: Intended for material that is not mature enough for a full paper, to present novel, interesting ideas or preliminary results that will be formally submitted elsewhere. Short papers must not exceed four (4) pages. Short papers will NOT be included in the proceedings. Please note that: - The page limits above only apply to the core text, content-related appendices, and figures. References and reproducibility appendix do not count against the page limit. - When deciding between submissions with comparable evaluations, priority will be given to those with higher quality of presentation and whose focus relates more directly to the workshop themes. - Papers and must be submitted electronically at https://submissions.supercomputing.org/ and must follow the IEEE format: www.ieee.org/conferences/publishing/templates.html ==================================================== !!New concept!!: Algorithm Brainstorming Session ==================================================== Are you working on code/algorithms and would like to see if and how it can benefit from a hierarchical approach? Or exploring state-of-the-art hierarchical approaches and leading edge programming models and desire feedback about how to approach such problems in practice? This new idea we are proposing might be of interest to you! We invite practitioners at all levels (especially encouraging participation from junior scholars) to submit a one-page summary describing an algorithm of their interest that is NOT already exploiting hierarchical parallelism and they would like to improve/change. We will select a subset of these submissions and, on the workshop day, we will host parallel breakout sessions moderated by experts in the field, to guide the brainstorming discussions on if/how one can exploit hierarchical parallelism to improve them. The submission must be 1 page and should address (at a high-level) these sections: motivation/application, core algorithm, desired scale of execution, and current bottlenecks (if any). The single page limit only applies to the core text: figures, references, and appendices do not count against the page limit. Please note that: - We will prioritize submissions by junior people. We believe this would be most beneficial as a way of allowing more experienced engineers and researchers to share their experience and approaches to solving this sort of problem. - We expect each submission to present code/algorithms that are relevant to the person/group submitting it. For example, if you are a researcher working on CFD, we expect your submission to be related to *your* code and computational issues, not on a different group's or commercial code. - We envision holding two or three parallel sessions. Each session will be approximately 45/60 mins: 10/15 mins for the author to present the algorithm and motivation, followed by the discussion until the time ends. However, we reserve to expand the number of sessions if we receive a substantial number of submissions/interest. ================================ Reproducibility Initiative ================================ HiPar21 follows the SC21 reproducibility and transparency initiative. The SC21 details can be found at: https://sc21.supercomputing.org/submit/reproducibility-initiative. HiPar21 requires all submission to include an Artifact Description (AD) Appendix. Note that the AD will be auto-generated from the author's responses to a form embedded in the online submission system. The Artifact Evaluation (AE) remains optional. We also encourage authors to follow the transparency initiative for two reasons: (a) it helps the authors themselves with the actual writing and structuring of the paper to express the research process; (b) it helps reviewers and readers to understand the thinking process used by the authors to plan, obtain and explain their results. ================================ Important dates ================================ Submission Deadline: August 30th, 2021 (AoE) Author Notification: September 13, 2021 Camera Ready: October 4, 2021 Final Program: October 9, 2021 Workshop Date: Sunday, Nov. 14th Note that SC21 is currently planning to host the conference in person, but to also include a virtual platform to support remote attendance and to enhance the in-person activities. However, at this time the virtual platform support is still unknown, and we want to explicitly state that there is always the possibility of SC21 becoming fully virtual. Therefore, please refer to the our workshop and SC21 websites for the latest information. ================================ Chairs and Committees ================================ Workshop chair: - Francesco Rizzi NexGen Analytics Organizing Committee: - Daisy Hollman Google - Lee Howes Facebook - Xiaoye Sherry Li Lawrence Berkeley National Lab Program Committee Chairs: - Christian Trott Sandia National Labs - Filippo Spiga NVIDIA Program Committee: - Mark Bull EPCC - Irina Demeshko LANL - Marta Garcia Gasulla BSC - Anja Gerbes TU Dresden - Mark Hoemmen Stellar Science - Toshiyuki Imamura RIKEN - Guido Juckeland Helmholtz Center - Hartmut Kaiser LSU - Vivek Kale Brookhaven Labs - Jonathan Lifflander Sandia National Labs - James Lin Shanghai J.Tong Univ. - Nicholas Malaya AMD - Aram Markosyan Xilinx - Rui Oliveira INESC TEC - Philippe Pebay NexGen Analytics - Zhiqi Tao Intel - Flavio Vella Univ. of Bozen - Michèle Weiland EPCC - Jeremiah Wilke Google ================================ Contact information: ================================ For questions, please email us at: hiparws(a)gmail.com ```

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