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Postdoctoral position in computer science at IRISA laboratory: Automatic « Clustering » of handwriting gestures
by Eric Anquetil 07 Sep '17

07 Sep '17

Postdoctoral position in computer science at IRISA laboratory (France, Rennes) : Automatic « Clustering » of handwriting gestures We apologize in advance if you receive multiple copies of this CFP. This position is related to the new project “e-fran” called ACTIF with a 4 years funding from the French government (“programme investissement d’avenir”). ACTIF aims at designing and experimenting tools and pedagogical approaches to help the “active” and “collaborative” learning in secondary school based on digital tablets oriented “stylus”. Among the partnership of the project can be cited INSA, IRISA, LP3C, Loustic, the company Script&Go, the Brittany region and the academy of Rennes. * Institution : INSA Rennes, IRISA Laboratory * Service : INTUIDOC research team – IRISA (France) * Project : e-fran /ACTIF (Learning et Collaboration with digital Tablets, Interactions and Feedback) * Position available from: September 1st, 2017 * Duration : fixed-term contract of 12 months (possibility of extension) * Salary: around 2100 € / month (net) Job description : <https://www-intuidoc.irisa.fr/files/2017/09/PostDoctoral-Automatic-Clusteri…>https://www-intuidoc.irisa.fr/files/2017/09/PostDoctoral-Automatic-Clusteri… must have a completed PhD and research experience in patternrecognition.Candidates should send a CV and a motivation letter toeric.anquetil(a)irisa.fr.---Eric ANQUETILProfessor at INSA, IRISA LaboratoryHead of Intuidoc team (http://www.irisa.fr/intuidoc)Program Manager of the Master of Science "Innovation and Entrepreneurship"Phone : +33 (0)6 22 93 44 18

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CFP: Parallel Computational Technologies 2018 (Rostov-on-Don, Russia, April 2-6, 2018)
by Цымблер Михаил Леонидович 07 Sep '17

07 Sep '17

FIRST ANNOUNCEMENT AND CALL FOR PAPERS Parallel Computational Technologies (PCT'2018), 12th International Scientific Conference, April 2-6, 2018, Rostov-on-Don, Russia http://agora.guru.ru/pavt/eng Conference founders: Russian Academy of Sciences (http://www.ras.ru) HPC Consortium of Russian Universities (http://hpc-russia.ru) Sponsored by Russian Foundation for Basic Research (http://www.rfbr.ru/rffi/eng) WELCOME Russian Academy of Sciences, High-Performance Computing Consortium of Russian Universities, Moscow State University, Don State Technical University, and South Ural State University are jointly organizing the 12th International Scientific Conference on Parallel Computational Technologies (PCT'2018) to be held in Rostov-on-Don, Russia, April 2-6, 2018. The main purpose of the PCT'2018 conference is to provide an opportunity to discuss the future of parallel computing as well as to report the results achieved by leading research groups in solving science and equipment issues using supercomputer technologies. The scope of the conference includes all aspects of high performance computing in science and technology such as applications, hardware and software, programming languages, etc. The 28th edition of Top50 of the CIS's most powerful computers will be announced on the first day of the conference. On working days of the conference, a supercomputer exhibition will be organized, where leading manufacturers of hardware and software present their latest products in the field of high performance computing. LANGUAGE The official languages of the Conference are Russian and English. SCOPE The scope of the conference includes, but not limited to, the following topics: * Parallel and distributed computing technologies * Cloud computing * Prospective multiprocessor architectures * Parallel and distributed database systems * High performance data mining * Artificial neural networks and deep learning * Management, administration, monitoring and testing of multiprocessor systems * Computational Mathematics * Computational Physics * Computational Chemistry * Gas hydrodynamics and heat transfer * High nonlinear and rapid processes in mechanics * Bioinformatics and medicine * Nanotechnology * Geoinformatics * Cryptography * Image processing and visualization * Computer algebra * Supercomputer education. CALL FOR PAPERS PCT'2018 admits papers presenting original contribution that have not been previously published and are not being submitted to another conference or journal. There are three categories of submissions: * Full paper describes the results of completed scientific research (12 to 15 pages in the LNCS one-column page format). * Short paper reports preliminary results of uncompleted scientific research (up to 12 pages in the LNCS one-column page format). * Abstract of the poster contains information about plans and initial results of recently started scientific research (one standard A4 page). Papers may be prepared in LaTeX or MS Word according to the LNCS one-column page format (cf. guidelines at the conference website http://agora.guru.ru/pavt2018/, "For Authors" section). Papers should be submitted electronically in PDF format through EasyChair system https://easychair.org/conferences/?conf=pct2018 by December 1, 2017. Each paper will be reviewed by three Program Committee members and/or invited experts to ensure high quality and relevance to the conference. At least one author of the accepted paper must attend the conference and present the paper. PROCEEDINGS All accepted full papers will be published in Springer's Communications in Computer and Information Science series (indexed in Web of Science and Scopus). All accepted short papers and posters will be published electronically and indexed in Russian Science Index. The best short papers will be published (after further revision) in Computational Mathematics and Software Engineering series of the Bulletin of the South Ural State University (http://vestnikvmi.susu.ru/) IMPORTANT DATES * Submission of abstracts: November 1, 2017 * Submission of the papers: December 1, 2017 * Notification of acceptance: January 15, 2018 * Camera-ready version: February 15, 2018 * Registration for participation in supercomputer exhibition: February 25, 2018 * Registration of participants (non-speakers): March 26, 2018 * Conference: April 2-6, 2018 April 2: arrival date April 3-5: conference work dates April 6: departure date CONTACT INFORMATION WEB PAGES Conference web site: http://agora.guru.ru/pavt/eng Submission web site: https://easychair.org/conferences/?conf=pct2018. Leonid Sokolinsky, DSc., Prof. (SUSU, Chelyabinsk) Co-chair of the PCT Program Committee E-mail: Leonid.Sokolinsky(a)susu.ru Tel.: (+7-351) 272 35 00 Mikhail Zymbler, CSc., Assoc. Prof. (SUSU, Chelyabinsk) Academic secretary of the PCT Program Committee E-mail: mzym(a)susu.ru Tel.: (+7-351) 267 90 06, ext. 112 PROGRAM COMMITTEE Chairman of the Program Committee: Viktor Sadovnichiy, academician of RAS, Moscow State University (Russia) Co-chairs of the Program Committee: Jack Dongarra, University of Tennessee (USA) Leonid Sokolinsky, South Ural State University (Russia) Vladimir Voevodin, corresponding member of RAS, Moscow State University (Russia) Academic secretary of the Program Committee: Mikhail Zymbler, South Ural State University (Russia) Members of the Program Committee: S.V. Ablameyko, Belarusian State University (Republic of Belarus) A.P. Afanasiev, Institute for Systems Analysis RAS (Russia) E.N. Akimova, Institute of Mathematics and Mechanics UrB RAS (Russia) A. Andrzejak, Heidelberg University (Germany) P. Balaji, Argonne National Laboratory (USA) Y.Ya. Boldyrev, Saint-Petersburg Polytechnic University (Russia) J. Carretero, Carlos III University of Madrid (Spain) R.K. Gazizov, Ufa State Aviation Technical University (Russia) V.P. Gergel, State University of Nizhny Novgorod (Russia) B.M. Glinsky, Institute of Computational Mathematics and Mathematical Geophysics SB RAS (Russia) V.D. Goryachev, Tver State Technical University (Russia) V.P. Il'in, Institute of Computational Mathematics and Mathematical Geophysics SB RAS (Russia) H. Kobayashi, Tohoku University (Japan) J. Kunkel, University of Hamburg (Germany) J. Labarta, Barcelona Supercomputing Center (Spain) A. Lastovetsky, University College Dublin (Ireland) T. Ludwig, German Climate Computing Center (Germany) V.N. Lykosov, Institute of Numerical Mathematics RAS (Russia) D. Mallmann, Julich Supercomputing Centre (Germany) M. Michalewicz, A*STAR Computational Resource Centre (Singapore) V.E. Malyshkin, Institute of Computational Mathematics and Mathematical Geophysics SB RAS (Russia) V.Ya. Modorsky, Perm Polytechnic University (Russia) A.V. Shamakina, High Performance Computing Center in Stuttgart (Germany) P. Shumyatsky, University of Brasilia (Brazil) H. Sithole, Centre for High Performance Computing (Republic of South Africa) A.V. Starchenko, Tomsk State University (Russia) T. Sterling, Indiana University (USA) M. Taufer, University of Delaware (USA) V.E. Turlapov, State University of Nizhny Novgorod (Russia) R. Wyrzykowski, Czestochowa University of Technology (Poland) M.V. Yakobovsky, Institute for Mathematical Modelling RAS (Russia) Y. Yamazaki, Federal University of Pelotas (Brazil)

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[CFP] REMINDER: IA^3 2017 Deadline upcoming
by Tumeo, Antonino 05 Sep '17

05 Sep '17

NEWS: UPCOMING DEADLINE!!! IA^3 2017 Seventh Workshop on Irregular Applications: Architectures and Algorithms http://hpc.pnl.gov/IA3/ November 13, 2017 In conjunction with SC17 In collaboration with ACM SIGHPC Sponsored by IEEE TCHPC Call for Papers Irregular applications occur in many subject matters. While inherently parallel, they exhibit highly variable execution performance at a local level due to unpredictable memory access patterns and/or network transfers, divergent control structures, and data imbalances. Moreover, they often require fine-grain synchronization and communication on large-data structures such as graphs, trees, unstructured grids, tables, sparse matrices, deep nets, and their combinations (such as, for example, attributed graphs). They have a significant degree of latent parallelism, which however is difficult to exploit due to their complex behavior. Current high performance architectures rely on data locality and regular computation to reduce access latencies, and often do not cope well with the requirements of these applications. Furthermore, irregular applications are difficult to scale on current supercomputing machines, due to their limits in fine-grained synchronization and small data transfers. Irregular applications pertain both to well established and emerging fields, such as machine learning, social network analysis, bioinformatics, semantic graph databases, Computer Aided Design (CAD), and computer security. Many of these application areas also process massive sets of unstructured data, which keep growing exponentially. Addressing the issues of irregular applications on current and future architectures will become critical to solve the challenges in science and data analysis of the next few years. This workshop seeks to explore solutions for supporting efficient execution of irregular applications in the form of new features at the level of the micro- and system-architecture, network, languages and libraries, runtimes, compilers, analysis, algorithms. Topics of interest, of both theoretical and practical significance, include but are not limited to: * Micro- and System-architectures, including multi- and many-core designs, heterogeneous processors, accelerators (GPUs, vector processors, Automata processor), reconfigurable (coarse grained reconfigurable and FPGA designs) and custom processors * Network architectures and interconnect (including high-radix networks, optical interconnects) * Novel memory architectures and designs (including processors-in memory) * Impact of new computing paradigms on irregular workloads (including neuromorphic processors and quantum computing) * Modeling, simulation and evaluation of novel architectures with irregular workloads * Innovative algorithmic techniques * Combinatorial algorithms (graph algorithms, sparse linear algebra, etc.) * Impact of irregularity on machine learning approaches * Parallelization techniques and data structures for irregular workloads * Data structures combining regular and irregular computations (e.g., attributed graphs) * Approaches for managing massive unstructured datasets (including streaming data) * Languages and programming models for irregular workloads * Library and runtime support for irregular workloads * Compiler and analysis techniques for irregular workloads * High performance data analytics applications, including graph databases Besides regular papers, papers describing work-in-progress or incomplete but sound, innovative ideas related to the workshop theme are also encouraged. We solicit both 8-page regular papers and 4-page position papers. Authors of exciting but not mature enough regular papers may be offered the option of a short 4-page paper and related short presentation. Artifact Evaluation For this edition of IA^3, authors of accepted regular papers will be invited to formally submit their supporting materials to the Artifact Evaluation process, similarly to the process followed for SC17. The participation to the Artifact Evaluation process is voluntary and will not change decisions regarding the paper. However, papers that undergo the evaluation process will receive a seal of approval on the paper, and will be able to participate in the BEST PAPER AWARD selection. DIVIDITI will provide an Amazon Gift Voucher (valued $200) to the authors of the paper that passes artifact evaluation with the highest score and that shares the artifact in the CK (Collective Knowledge - https://github.com/ctuning/ck) format. Authors that go through the Artifact Evaluation process are also encouraged (but not mandated) to submit the supporting materials as “Source Materials” in the digital library. For details on how to submit supporting materials to the Artifact Evaluation process, please refer to: http://ctuning.org/ae/submission.html. For any additional question on the Artifact Evaluation process please contact the Artifact Evaluation Chair Flavio Vella. Important Dates Abstract submission: 7 September 2017 - EXTENDED - FIRM Position or full paper submission: 7 September 2017 - EXTENDED - FIRM Notification of acceptance: 3 October 2017 Camera-ready position and full papers: 10 October 2017 Workshop: 13 November 2017 Submissions Submission site: https://easychair.org/conferences/?conf=ia32017 All submissions should be in double-column, single-spaced letter format, with at least one-inch margins on each side and respect the ACM standard proceedings templates (sigconf) available at: https://www.acm.org/publications/proceedings-template. The proceedings of the workshop will be published in cooperation with ACM SIGHPC. Submitted manuscripts may not exceed eight (8) pages in length for regular papers and four(4) pages for position papers including figures, tables and references. Organizers Antonino Tumeo, PNNL, US John Feo, PNNL/NIAC, US, Vito Giovanni Castellana, PNNL, US Artifact Evaluation Chair Flavio Vella, DIVIDITI, UK Publication Chair Marco Minutoli, PNNL, US Program Committee Scott Beamer, LBNL, US Michela Becchi, North Carolina State University, US Erik Boman, Sandia National Laboratories, US David Brooks, Harvard University, US Aydin Buluc, LBNL, US Sunita Chandrasekaran, University of Delaware, US Fabio Checconi, IBM, US Rajiv Gupta, Univerisity of California Riverside, US Maya Gokhale, LLNL, US Peter Kogge, Univ. of Notre Dame, US Vivek Kumar, Rice University, US John Leidel, Texas Tech University, US Kamesh Madduri, Pennsylvania State University, US Naoya Maruyama, RIKEN AICS, JP Tim Mattson, Intel, US Miquel Moreto, BSC and UPC, SP Richard Murphy, Micron Technology Inc, US Walid Najjar, University of California Riverside, US Maxim Naumov, NVIDIA, US Jacob Nelson, University of Washington, US Sreepathi Pai, University of Rochester, US Roger Pearce, LLNL, US Miquel Pericas, Chalmers University, SE Viktor Prasanna, University Of Southern California, US Alejandro Rico, ARM, US Jason Riedy, Georgia Institute of Technology, US Erik Saule, University of North Carolina at Charlotte, US John Shalf, LBNL, US Shaden Smith, University of Minnesota, US Bora Ucar, CNRS and LIP ENS Lyon, FR Ruud Van Der Pas, Oracle, US Flavio Vella, DIVIDITI, UK Ana Lucia Varbanescu, University of Amsterdam, NL Regards, Antonino Tumeo Research Scientist High Performance Computing Pacific Northwest National Laboratory

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5th Special Session on HPC in Modelling and Simulation - PDP 2018 - Cambridge, UK
by William Spataro 04 Sep '17

04 Sep '17

(sorry for cross postings) ************************************************************************** CALL FOR PAPERS: Fifth Special Session on High Performance Computing in Modelling and Simulation (HPCMS) Within PDP 2018 The 26th Euromicro International Conference on Parallel, and Network-Based Computing Cambridge, UK 21-23 March 2018 http://www.pdp2018.org/specialsessions/hpcms.html Deadline: September 15th, 2017 Contact: William Spataro - spataro(a)unical.it ************************************************************************* AIMS AND SCOPE The development of models through which computers can simulate the evolution of artificial and natural systems is fundamental for the advancement of Science. In the last decades, the increasing power of computers has allowed to considerably extend the application of computing methodologies in research and industry, but also to the quantitative study of complex phenomena. This has permitted a broad application of numerical methods for differential equation systems (e.g., FEM, FDM, etc.) on one hand, and the application of alternative computational paradigms, such as Cellular Automata, Genetic Algorithms, Neural networks, Swarm Intelligence, etc., on the other. These latter have demonstrated their effectiveness for modelling purposes when traditional simulation methodologies have proven to be impracticable. Following the success of our past HPCMS workshops which were held in Turin, Turku and Crete, we are glad to invite you to our fourth edition which will take place in St. Petersburg (Russia). An important mission of the HPCMS Workshop is to provide a platform for a multidisciplinary community composed of scholars, researchers, developers, educators, practitioners and experts from world leading Universities, Institutions, Agencies and Companies in Computational Science, and thus in the High Performance Computing for Modelling and Simulation field. HPCMS intent is to offer an opportunity to express and confront views on trends, challenges, and state-of-the art in diverse application fields, such as engineering, physics, chemistry, biology, geology, medicine, ecology, sociology, traffic control, economy, etc. Topics of interest include, but are not limited to, the following: - High-performance computing in computational science: intra-disciplinary and multi-disciplinary research applications - Complex systems modelling and simulation - Cellular Automata, Genetic Algorithms, Neural networks, Swarm Intelligence implementations - Integrated approach to optimization and simulation - MPI, OpenMP, GPGPU applications in Computational Science - Optimization algorithms, modelling techniques related to optimization in Computational Science - High-performance Software developed to solve science (e.g., biological, physical, and social), engineering, medicine, and humanities problems - Hardware approaches of high performance computing in modeling and simulation IMPORTANT DATES Paper submission: 15th Sep 2017 Acceptance notification: 13th Oct 2017 Camera ready due: 17nd Nov 2017 Conference: 21th - 23th Mar 2018 Submission guidelines Prospective authors should submit a full paper not exceeding 8 pages in the IEEE Conference proceedings format (IEEEtran, double-column, 10pt). Double-bind review: the first page of the paper should contain only the title and abstract; in the reference list, references to the authors’ own work should appear as "omitted for blind review" entries. For submission, please use the following link: http://www.easychair.org/conferences/?conf=pdp2018 Manuscript submission Publication All accepted papers will be included in the same volume, published by the Conference Publishing Services (CPS). The Final Paper Preparation and Submission Instructions will be published after the notification of acceptance. Authors of accepted papers are expected to register and present their papers at the Conference. Conference proceedings will be submitted for inclusion in Xplore and the CSDL, and for indexing, among others, to DBLP, Scopus ScienceDirect, and ISI Web of Knowledge. Special Issue As for previous editions, organizers of the HPCMS session are planning a Special Issue of an important international ISI Journal, based on distinguished papers that will be accepted for the session. For instance, a selected number of papers of the past workshop editions have been published on the ISI Journal “International Journal of High Performance Computing Applications” and “Concurrency and Computation: Practice and Experience”. Organizers William Spataro – University of Calabria, Italy Georgios Sirakoulis - Democritus University of Thrace, Greece Giuseppe A. Trunfio – University of Sassari, Italy Program Committee Gihan R. Mudalige, University of Warwick, UK Angelos Amanatiadis, Democritus University of Thrace, Greece Donato D’Ambrosio, University of Calabria, Italy Pawel Topa, AGH University of Science and Technology, Poland Gianluigi Folino, ICAR-CNR, Italy Lou D’Alotto, York College/CUNY, New York, USA Antonios Gasteratos, Democritus University of Thrace, Greece Ioakeim Georgoudas, Democritus University of Thrace, Greece Marco Beccutti, University of Torino, Italy Rolf Hoffmann, Darmstadt University, Germany Ioannis Karafyllidis, Democritus University of Thrace, Greece Yaroslav Sergeyev, University of Calabria, Italy Antisthenis Tsompanas, University of the West of England, UK Rocco Rongo, University of Calabria, Italy Georgios Sirakoulis, Democritus University of Thrace, Greece William Spataro, University of Calabria, Italy Giuseppe A. Trunfio, University of Sassari, Italy Marco Villani, University of Modena and Reggio Emilia, Italy Jaroslaw Was, AGH University of Science and Technology, Poland Davide Spataro, University of Calabria, Italy Massimo Cafaro, University of Salento, Italy Mario Cannataro, University Magna Graecia of Catanzaro, Italy -- ------------------------------------------------------------------------------- Il banner è generato automaticamente dal servizio di posta elettronica dell'Università della Calabria <http://www.unical.it>

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Call for papers ICSPS 2017
by Luis Anido Rifon 04 Sep '17

04 Sep '17

*2017 9th International Conference on Signal Processing Systems (ICSPS 2017)* AUT University, Auckland, New Zealand, November 27-30, 2017 www.icsps.org *Important dates* Paper Submission Deadline: Oct. 1, 2017 *Invited speakers* Prof. Robert Minasian, FIEEE, FOSA The University of Sydney, Australia; Prof. Liyanage C De Silva, Dean, Faculty of Integrated Technologies University of Brunei Darussalam, Brunei Darussalam; Assoc. Prof. Waleed Habib Abdulla The University of Auckland, New Zealand; Assoc. Prof. Ruili Wang Massey University, New Zealand; Prof. Luis Anido-Rifón University of Vigo, Spain *Publication* Submitted papers will be peer-reviewed and the accepted ones after proper registration and presentation will be published in the International Conference Proceedings Series by ACM (ISBN: 978-1-4503-5384-7), which will be archived in the ACM Digital Library and submitted for index by Ei Compendex, Scopus, Thomson Reuters Conference Proceedings Citation Index (ISI Web of Science), etc. *Conference venue* This year 9th ICSPS will be held at The Sir Paul Reeves Building at AUT University, Auckland, New Zealand for the third time. *Schedule* November 27, 2017 10:00 AM - 17:00 PM Participants Onsite Registration & Conference Materials Collection November 28, 2017 9:30 AM - 12:00 AM Opening Ceremony and Keynote Speeches November 28, 2017 13:30 PM - 18:00 PM Oral and Poster Sessions November 29, 2017 9:30 AM - 12:00 AM Keynote Speeches November 29, 2017 13:30 PM - 18:00 PM Oral and Poster Sessions November 30, 2017 10:00 AM- 12:00 AM Academic Visit *Contact* Conference secretary: Yolanda Dong E-mail: icsps(a)iacsit.org Tel:+86-28-86528758

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CFP: 2018 IEEE/ACM Design Automation Conference Hardware Design Contest
by Yiyu Shi 01 Sep '17

01 Sep '17

The 2018 IEEE/ACM Design Automation Conference Hardware Design Contest features embedded hardware implementation of neural network based target tracking for drones. Contestants will receive training dataset provided by our industry sponsor DJI <https://www.dji.com/>, and a hidden dataset will be used to evaluate the performance of the designs in terms of accuracy and power. Contestants will compete in two different categories: FPGA and GPU, and grand cash awards will be given to the top three teams in each category. In addition, our industry sponsor Xilinx and Nvidia will provide a limited number of successfully registered teams with a free design kit (on a first-come-first-served basis). The award ceremony will be held at 2018 IEEE/ACM Design Automation Conference <https://dac.com/>. For more details or to register, please go to http://www.cse.cuhk.edu.hk/ ~byu/2018-DAC-HDC/ Cordially, 2018 HDC Organizing Committee

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Deadline extension: 3rd Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC 2017) at SC17: Extended abstracts due Sept. 15
by Jason D. Bakos 01 Sep '17

01 Sep '17

========================================================================== ** Call for Papers ** ========================================================================== Third International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC 2017) Held in conjunction with Supercomputing 2017 Friday Morning, November 17, 2017 Denver, CO http://h2rc.cse.sc.edu ========================================================================== Submission Deadline (EXTENDED): September 15, 2017 (one page extended abstracts) ========================================================================== As conventional von-Neumann architectures are suffering from rising power densities, we are facing an era with power, energy efficiency, and cooling as first-class constraints for scalable HPC. FPGAs can tailor the hardware to the application, avoiding overheads and achieving higher hardware efficiency than general-purpose architectures. Leading FPGA manufacturers have recently made a concerted effort to provide a range of higher-level, easier to use high-level programming models for FPGAs. Such initiatives are already stimulating new interest within the HPC community around the potential advantages of FPGAs over other architectures. With this in mind, this workshop, now in its third year, brings together HPC and heterogeneous-computing researchers to demonstrate and share experiences on legacy and new high-level programming models, optimizations specific to scientific computing and data analytics, tools for performance/energy improvements, FPGA computing in the cloud, and popular applications for reconfigurable computing such as machine learning and big data. ========================================================================== Submissions (one page extended abstract): Submissions are solicited that explore the state of the art in the use of FPGAs in heterogeneous high-performance computing architectures and, at a system level, in data centers and supercomputers. FPGAs may be considered from either or both the distributed, parallel and composable fabric of compute elements or from their dynamic reconfigurability. We particularly encourage submissions which focus on the mapping of algorithms and applications to heterogeneous FPGA-based systems as well as the overall impact of such architectures on the compute capacity, cost, power efficiency, and overall computational capabilities of data centers and supercomputers. Submissions may report on theoretical or applied research, implementation case studies, benchmarks, standards, or any other area that promises to make a significant contribution to our understanding of heterogeneous high-performance reconfigurable computing and will help to shape future research and implementations in this domain. A non-comprehensive list of potential topics of interest is given below: 1. FPGAs in Supercomputer, Cloud and Data Center: FPGAs in relation to challenges to Cloud/Data Center/Supercomputing posed by the end of Dennard scaling 2. Supercomputing, Cloud and Data Center Applications: Exploiting FPGA compute fabric to implement critical cloud/HPC applications 3. Leveraging Reconfigurability: Using reconfigurability for new approaches to algorithms used in cloud/HPC applications 4. Benchmarks: Compute performance and/or power and cost efficiency for cloud/HPC with heterogeneous architectures using FPGAs 5. Implementation Studies: Heterogenous Hardware and Management Infrastructure 6. Programming Languages/Runtimes/OS/Tools/Frameworks for Heterogeneous High Performance Reconfigurable Computing 7. Future-gazing: New Applications/The Cloud Enabled by Heterogeneous High Performance Reconfigurable Computing, Evolution of Computer Architecture in relation to Heterogeneous High Performance Reconfigurable Computing 8. Community building: Standards, consortium activity, open source, education, initiatives to enable and grow Heterogeneous High Performance Reconfigurable Computing Prospective authors are invited to submit original and unpublished contributions as a ONE PAGE EXTENDED ABSTRACT in ACM SIG Proceedings format. ========================================================================== You can submit your contribution(s) through a link on the H2RC website: http://h2rc.cse.sc.edu ========================================================================== Important dates: Submission Deadline (extended): September 15, 2017 Acceptance Notification: October 15, 2017 Camera-ready Manuscripts Due: November 4, 2017 Workshop Date: November 17, 2017 ========================================================================== Workshop Format: H2RC is a half-day Friday workshop. It will be comprised of Keynote and invited talks and talks selected from paper submissions. Preliminary Agenda: 8:30 a.m. Opening Remarks 8:35 a.m. Keynote 1: FPGAs in AWS and First Use Cases (joint talk by AWS, Ngcodc and Xilinx) 9:35 a.m. Lightning Talks 10:00 a.m. Coffee break 10:30 a.m. Keynote 2: Brainwave (Microsoft Research) 11:30 p.m. Lightning talks 12:00 p.m. Invited talk 12:30 p.m. Adjorn ========================================================================== Organizing Committee: Workshop Organizers: Michaela Blott, Xilinx Franck Cappello, Argonne National Lab Torsten Hoefler, ETH Zurich Jason D. Bakos, University of South Carolina Program Committee: Rizwan Ashraf, Oak Ridge National Laboratory Paul Chow, University of Toronto Hans Eberle, NVIDIA Alan George, University of Florida Christoph Hagleitner, IBM Miriam Leeser, Northeastern University Viktor Prasanna, Univ. of Southern California Marco Santambrogio, Politecnico Di Milano Jeffrey Vetter, Oak Ridge National Lab -- Jason D. Bakos, Ph.D. Professor Dept. of Computer Science and Engineering Univ. of South Carolina 301 Main St., Suite 3A01L Columbia, SC 29208 803-777-8627 (voice), 803-777-3767 (fax) http://www.cse.sc.edu/~jbakos jbakos(a)cse.sc.edu

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Call For Papers [Extended Deadline]: ESPM2@SC17 - Third International Workshop on Extreme Scale Programming Models and Middleware
by Hari Subramoni 01 Sep '17

01 Sep '17

======================================================================== Call For Papers Third International IEEE Workshop on Extreme Scale Programming Models and Middleware (ESPM2 2017) November 12, 2017, Denver, Colorado to be held in conjunction with SuperComputing 2017, November 12 - 16, 2017 Denver, Colorado http://nowlab.cse.ohio-state.edu/espm2/ ======================================================================== Based on requests from authors, we have extended the technical paper submission deadline for ESPM2'17 to 09/11/17. A complete and updated "Call for Papers" follows. Next generation architectures and systems being deployed are characterized by high concurrency, low memory per-core, and multiple levels of hierarchy and heterogeneity. These characteristics bring out new challenges in energy efficiency, fault-tolerance and, scalability. It is commonly believed that software has the biggest share of the responsibility to tackle these challenges. In other words, this responsibility is delegated to the next generation programming models and their associated middleware/runtimes. This workshop focuses on different aspects of programming models such as task-based parallelism (Charm++, OCR, Habanero, Legion, X10, HPX, etc), PGAS (OpenSHMEM, UPC, CAF, Chapel, UPC++, etc.), BigData (Hadoop, Spark, etc), Deep Learning (Caffe, Microsoft CNTK, Google TensorFlow), directive-based languages (OpenMP, OpenACC) and Hybrid MPI+X, etc. It also focuses on their associated middleware (unified runtimes, interoperability for hybrid programming, tight integration of MPI+X, and support for accelerators) for next generation systems and architectures. The ultimate objective of the ESPM2 workshop is to serve as a forum that brings together researchers from academia and industry working in the areas of programming models, runtime systems, compilers, programming languages, and application developers. ESPM2 2017 will be held as a full day workshop in conjunction with the SuperComputing (SC 2017), Denver, Colorado, USA, Sunday, November 12th, 2017. Topics ------ ESPM2 2017 welcomes original submissions in a range of areas, including but not limited to: * New programming models, languages and constructs for exploiting high concurrency and heterogeneity * Experience with and improvements for existing parallel languages and run-time environments such as: - MPI - PGAS (OpenSHMEM, UPC, CAF, Chapel, UPC++, etc.) - Directive-based programming (OpenMP, OpenACC) - Asynchronous Task-based models (Charm++, OCR, Habanero, Legion, X10, HPX, etc) - Hybrid MPI+X models - BigData (Hadoop, Spark, etc), and - Deep Learning (Caffe, Microsoft CNTK, Google TensorFlow) * Parallel compilers, programming tools, and environments * Software and system support for extreme scalability including fault tolerance * Programming environments for heterogeneous multi-core systems and accelerators such as KNL, OpenPOWER, ARM, GPUs, FPGAs, MICs, and DSPs Papers should present original research and should provide sufficient background material to make them accessible to the broader community. Best Paper Award ---------------- Intel has generously offered to sponsor the Best Paper Award. This award will be given to the author(s) of the paper selected by the Technical Program Committee and the Program Chairs. The award will be determined from viewpoints of the technical and scientific merits, impact on the science and engineering of the research work and the clarity of presentation of the research contents in the paper. Keynote Speakers ---------------- We are happy to announce that Prof. William D. Gropp, Interim Director and Chief Scientist at the National Center for Supercomputing Applications and the Thomas M. Siebel Chair in Computer Science at the University of Illinois Urbana-Champaign will deliver the keynote address at ESPM2'17. Panel Information ----------------- Panel Topic : Effective Programming Models for Deep Learning at Scale Panel Moderator : Daniel Holmes, EPCC, The University of Edinburgh, UK. Panel Members : Coming soon! Paper Submission and Registration --------------------------------- Abstracts and papers need to be submitted via the EasyChair conference system. EasyChair URL for ESPM2'17: https://easychair.org/conferences/?conf=espm22017 Submissions should not exceed 8 pages using ACM format with 10pt font. Each submission must be a single PDF file. Papers must be submitted in PDF format (readable by Adobe Acrobat Reader 5.0 and higher) and formatted for 8.5" x 11" (U.S. Letter). The manuscript should be formatted according to ACM format (see http://www.acm.org/sigs/publications/proceedings-templates) Papers should present original research and should provide sufficient background material to make them accessible to the broader community. It should not be submitted in parallel to any other conference or journal. At least one of the authors of each accepted paper must register as a participant of the workshop and present the paper at the workshop, in order to have the paper published in the proceedings. Each research paper will be taken through a comprehensive peer review process by an internationally recognized group of experts in the field. Papers will be evaluated along the metrics of a) Quality of Presentation; b) Novelty / Originality; c) Relation to State of the Art; d) Technical Strength; e) Significance of Work; and f) Relevance to Workshop. Every effort will be made to ensure that each paper receives multiple reviews. Please contact the Program Chairs for any questions/clarifications Proceedings Information ----------------------- ACM SigHPC will publish the workshop proceedings which will be available through the ACM Digital Library. The camera-ready versions need to be submitted via the EasyChair conference management system. The link to the submission site will be provided soon. Please contact the Program Chairs for any questions/clarifications. Important Dates --------------- Technical paper submission deadline : 11:59 PM, AoE, September 11, 2017 Author notification : October 7, 2017 Camera-ready deadline : 11:59 PM, AoE, October 13, 2017 Workshop : Sunday, November 12, 2017 ESPM2'17 Workshop Organizers ---------------------------- Hari Subramoni, The Ohio State University Karl Schulz, Intel Corporation Dhabaleswar K. (DK) Panda, The Ohio State University Program Committee ----------------- * Guang R. Gao, University of Delaware * Vladimir Getov, University of Westminster, UK * Jeff Hammond, Intel Labs * Michael A. Heroux, Sandia National Laboratories * Costin Iancu, Lawrence Berkeley National Laboratory * Darren Kerbyson, Pacific Northwest National Laboratory * Guangming Tan, Institute of Computing Technology, Chinese Academy of Sciences, China * Olivier Tardieu, IBM T.J. Watson Research Center * Daniel Tian, The Portland Group * Sean Treichler, NVIDIA Corporation * Abhinav Vishnu, Pacific Northwest National Laboratory Further Information ------------------- See the ESPM2'17 website at http://nowlab.cse.ohio-state.edu/espm2/ Thanks, The ESPM2'17 Organizing Committee.

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JSC Special Issue on Dynamic Geometry and Automated Reasoning - Deadline Extension
by Francisco Botana 31 Aug '17

31 Aug '17

Please help us disseminating this announcement. Sorry for duplicates. ===================== DEADLINE EXTENSION: Due to the concurrence, in this coming month of September 2017, of several call for papers for different journals and conference proceedings, on topics related to automated reasoning, symbolic computation and dynamic geometry, we have considered extending substantially the deadline for our JSC Special Issue on Dynamic Geometry and Automated Reasoning. Please notice the new submission deadline of February 2018! Further details follow: *** CALL FOR PAPERS *** Journal of Symbolic Computation* https://www.journals. elsevier.com/journal-of-symbolic-computation <http://elsevier.com/journal-of-symbolic-computation> Call for contributions to the Special Issue on Dynamic Geometry and Automated Reasoning https://sites.google.com/site/kovzol/jsc-si-dg-ar GUEST EDITORS: Francisco Botana, University of Vigo, Spain Zoltán Kovács, The Private University College of Education of the Diocese of Linz, Austria Tomas Recio, University of Cantabria, Spain IMPORTANT DATES (EXTENDED) * submission deadline: February 1, 2018 * notification of acceptance / rejection: July 1, 2018 * final versions: September 15, 2018 SCOPE: Since the last half century, automated deduction in elementary geometry has become one of the most successful achievements in the field of automated reasoning. Along these decades various methods and techniques have been studied and developed for automated proving and discovering of elementary geometry statements. On the other hand, dynamic geometry software systems have emerged, such as Cabri Geometry, C.a.R., Cinderella, DrGeo, GeoGebra, The Geometer's Sketchpad, Geometry Expert, Geometry Expressions or Kig with an ever-increasing presence in mathematics education. Some of them possess a large number of users (over thirty million) all around the world. The merging of these two tools (automatic proving and dynamic geometry) is, thus, a very natural, challenging and promising issue, currently involving logic, symbolic computation, software development, algebraic geometry and mathematics education experts all from over the world. The Special Issue intends to be an opportunity for - presenting the current state of the art concerning the development of automatic proving features on dynamic geometry systems, - discussing the current and potential applications of such features in different contexts, such as CAGD or mathematics education. TOPICS (not restricted to): - Algorithmic aspects: formal, logic and algebraic geometry approaches, constraint solving, invariant and coordinate-free methods, real and complex geometry issues, probabilistic, synthetic approaches, techniques from discrete mathematics, combinatorics, and numerics. - Software aspects: Implementation of automated proving methods in dynamic geometry programs, design of packages and systems, data representation. Parallel and distributed computing, considerations for modern hardware and new devices. User-interface issues, use with systems for digital libraries, courseware, ... - Application aspects: applications to mechanics, geometric modeling, CAGD/CAD, computer vision, robotics and education. Papers must not duplicate work already published or submitted for publication elsewhere. All the papers will be refereed according to the JSC standards. Papers should follow the guidelines for JSC submissions (see https://www.elsevier.com/journals/journal-of-symbolic-computation/0747-7171…) and should be submitted through Easychair (https://easychair.org/conferences/?conf=jscdgarsi2018) The introduction of the paper must explicitly address the following questions in succinct and informal manner: - What is the problem? - Why is the problem important? - What has been done so far on the problem? - What is the main contribution of the paper on the problem? - Why is the contribution original? (see below for clarification) - Why is the contribution non-trivial? Make the paper complete (since there is no page limit): - All the related works and issues must be completely and carefully discussed. - All the previous relevant JSC papers must be properly cited and discussed. - All the theorems must be rigorously proved (no sketch allowed). - All the important definitions/theorems/algorithms must be illustrated by well-chosen examples. * An international journal, the Journal of Symbolic Computation, founded by Bruno Buchberger in 1985, is directed to mathematicians and computer scientists who have a particular interest in symbolic computation. Automated theorem proving is one of the research areas of interest highlighted in the Journal’s description. The Journal of Symbolic Computation has a 1.274 Impact Factor, according to the last Thompson Reuters Journal Citation Reports (Clarivate Analytics, 2017).

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Deadline extension: CFP Journal Symbolic Computation Special Issue on Dynamic Geometry and Automated Reasoning
by Prof. Tomas Recio 30 Aug '17

30 Aug '17

Please help us disseminating this announcement. Sorry for duplicates. ===================== DEADLINE EXTENSION: Due to the concurrence, in this coming month of September 2017, of several call for papers for different journals and conference proceedings, on topics related to automated reasoning, symbolic computation and dynamic geometry, we have considered extending substantially the deadline for our JSC Special Issue on Dynamic Geometry and Automated Reasoning. Please notice the new submission deadline of February 2018! Further details follow: *** CALL FOR PAPERS *** Journal of Symbolic Computation* https://www.journals <https://www.journals/>. elsevier.com/journal-of-symbolic-computation <http://elsevier.com/journal-of-symbolic-computation> Call for contributions to the Special Issue on Dynamic Geometry and Automated Reasoning https://sites.google.com/site/kovzol/jsc-si-dg-ar <https://sites.google.com/site/kovzol/jsc-si-dg-ar> GUEST EDITORS: Francisco Botana, University of Vigo, Spain Zoltán Kovács, The Private University College of Education of the Diocese of Linz, Austria Tomas Recio, University of Cantabria, Spain IMPORTANT DATES (EXTENDED) submission deadline: February 1, 2018 notification of acceptance / rejection: July 1, 2018 final versions: September 15, 2018 SCOPE: Since the last half century, automated deduction in elementary geometry has become one of the most successful achievements in the field of automated reasoning. Along these decades various methods and techniques have been studied and developed for automated proving and discovering of elementary geometry statements. On the other hand, dynamic geometry software systems have emerged, such as Cabri Geometry, C.a.R., Cinderella, DrGeo, GeoGebra, The Geometer's Sketchpad, Geometry Expert, Geometry Expressions or Kig with an ever-increasing presence in mathematics education. Some of them possess a large number of users (over thirty million) all around the world. The merging of these two tools (automatic proving and dynamic geometry) is, thus, a very natural, challenging and promising issue, currently involving logic, symbolic computation, software development, algebraic geometry and mathematics education experts all from over the world. The Special Issue intends to be an opportunity for - presenting the current state of the art concerning the development of automatic proving features on dynamic geometry systems, - discussing the current and potential applications of such features in different contexts, such as CAGD or mathematics education. TOPICS (not restricted to): - Algorithmic aspects: formal, logic and algebraic geometry approaches, constraint solving, invariant and coordinate-free methods, real and complex geometry issues, probabilistic, synthetic approaches, techniques from discrete mathematics, combinatorics, and numerics. - Software aspects: Implementation of automated proving methods in dynamic geometry programs, design of packages and systems, data representation. Parallel and distributed computing, considerations for modern hardware and new devices. User-interface issues, use with systems for digital libraries, courseware, ... - Application aspects: applications to mechanics, geometric modeling, CAGD/CAD, computer vision, robotics and education. Papers must not duplicate work already published or submitted for publication elsewhere. All the papers will be refereed according to the JSC standards. Papers should follow the guidelines for JSC submissions (see https://www.elsevier.com/journals/journal-of-symbolic-computation/0747-7171… <https://www.elsevier.com/journals/journal-of-symbolic-computation/0747-7171…>), and should be submitted through Easychair (https://easychair.org/conferences/?conf=jscdgarsi2018 <https://easychair.org/conferences/?conf=jscdgarsi2018>). The introduction of the paper must explicitly address the following questions in succinct and informal manner: - What is the problem? - Why is the problem important? - What has been done so far on the problem? - What is the main contribution of the paper on the problem? - Why is the contribution original? (see below for clarification) - Why is the contribution non-trivial? Make the paper complete (since there is no page limit): - All the related works and issues must be completely and carefully discussed. - All the previous relevant JSC papers must be properly cited and discussed. - All the theorems must be rigorously proved (no sketch allowed). - All the important definitions/theorems/algorithms must be illustrated by well-chosen examples. * An international journal, the Journal of Symbolic Computation, founded by Bruno Buchberger in 1985, is directed to mathematicians and computer scientists who have a particular interest in symbolic computation. Automated theorem proving is one of the research areas of interest highlighted in the Journal’s description. The Journal of Symbolic Computation has a 1.274 Impact Factor, according to the last Thompson Reuters Journal Citation Reports (Clarivate Analytics, 2017).

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ESORICS 2017: Call for Participation
by Cristina Alcaraz 29 Aug '17

29 Aug '17

============================================================================== ESORICS 2017: CALL FOR PARTICIPATION 22nd European Symposium on Research in Computer Security Oslo, Norway — September 11-15, 2017 ============================================================================== WWW: https://www.ntnu.edu/web/esorics2017/ Overview ------------------------------------ ESORICS is the annual European research event in Computer Security. The Symposium started in 1990 and has been held in several European countries, attracting a wide international audience from both the academic and industrial communities. The 22nd European Symposium on Research in Computer Security (ESORICS 2017) will be held in Oslo, Norway. ESORICS 2017 spans a total of 3 days, featuring: * 3 keynote speeches (Cormac Herley, Paul Syverson, Sandro Etalle) * 54 paper presentations in 3 days (Sep 11-13) * 8 workshops (Sept 14 - 15) Presentations Program ------------------------------------ The 54 papers of ESORICS 2017 are distributed between **18 sessions** in **two parallel tracks**. Following is the list of paper presentations for the main ESORICS conference. For the workshop programs, please consult their corresponding websites: * SECPRE 2017: https://samosweb.aegean.gr/secpre2017/ * SecSE 2017: http://secse.org * CBT 2017: http://www.deic.uab.cat/~jherrera/CBT/ * DPM 2017: http://deic.uab.cat/conferences/dpm/dpm2017/ * STM 2017: http://stm2017.di.unimi.it * QASA 2017: http://www.iit.cnr.it/qasa2017/ * CyberICPS: http://www.ds.unipi.gr/cybericps2017/ * SIoT 2017: http://siot-workshop.org ### September 11 - Day 1 ########### 09:30 - 10:30 * Keynote: Cormac Herley - Justifying Security Measures - a Position Paper 11:00 - 12:30 * Session 1: Security of embedded things - Shortfall-based Optimal Placement of Security Resources for Mobile IoT Scenarios Antonino Rullo, Edoardo Serra, Elisa Bertino and Jorge Lobo - Analyzing the Capabilities of the CAN Attacker Sibylle Froeschle and Alexander Stühring - Boot Attestation: Secure Remote Reporting with Off-The-Shelf IoT Sensors Steffen Schulz, André Schaller, Florian Kohnhäuser, and Stefan Katzenbeisser * Session 2: Cryptographic Application I - Per-Session Security: Password-Based Cryptography Revisited Gregory Demay, Peter Gazi, Ueli Maurer and Björn Tackmann - Non-Interactive Provably Secure Attestations for Arbitrary RSA Prime Generation Algorithm Fabrice Benhamouda, Houda Ferradi, Rémi Géraud and David Naccache - Tightly Secure Ring-LWE Based Key Encapsulation with Short Ciphertexts Martin Albrecht, Emmanuela Orsini, Kenneth Paterson, Guy Peer and Nigel Smart 14:00 - 15:30 * Session 3: Documents and Authorship - Identifying Multiple Authors in a Binary Program Xiaozhu Meng, Barton Miller and Kwang-Sung Jun - Verifiable Document Redacting Herve Chabanne, Rodolphe Hugel and Julien Keuffer - Source Code Authorship Attribution using Long Short-Term Memory Based Networks Bander Alsulami, Edwin Dauber, Richard Harang, Spiros Mancoridis and Rachel Greenstadt * Session 4: Analysis of Security Protocols - Automated analysis of equivalence properties for security protocols using else branches Ivan Gazeau and Steve Kremer and Levente Buttyán - Secure Authentication in the Grid: A formal analysis of DNP3: SAv5 Cas Cremers, Martin Dehnel-Wild and Kevin Milner - Modular Verification of Protocol Equivalence in the Presence of Randomness Matthew Bauer, Rohit Chadha and Mahesh Viswanathan 16:00 - 17:30 * Session 5: Threat Analysis - Preventing Advanced Persistent Threats in Complex Control Networks Juan E. Rubio, Cristina Alcaraz and Javier Lopez - MTD CBITS: Moving Target Defense for Cloud-Based IT Systems Alexandru G. Bardas, Sathya C. Sundaramurthy, Xinming Ou and Scott A. Deloach - Is my attack tree correct? Maxime Audinot, Sophie Pinchinat and Barbara Kordy * Session 6: Side Channels and data leakage - On-Demand Time Blurring to Support Side-Channel Defense Weijie Liu, Debin Gao and Mike Reiter - Acoustic Data Exfiltration from Speakerless Air-Gapped Computers via Covert Hard-Drive Noise Mordechai Guri, Yosef Solewicz, Andrey Daidakulov and Yuval Elovici - Practical Keystroke Timing Attacks in Sandboxed JavaScript Moritz Lipp, Daniel Gruss, Michael Schwarz, David Bidner, Clémentine Maurice and Stefan Mangard ### September 12 - Day 2 ########### 09:00 - 10:00 * Keynote: Paul Syverson - The Once and Future Onion 10:30 - 12:00 * Session 7: Vulnerabilities and Malware - Mirage: Toward a Stealthier and Modular Malware Analysis Sandbox for Android Lorenzo Bordoni, Mauro Conti and Riccardo Spolaor - VuRLE: Automatic Vulnerability Detection and Repair by Learning from Examples Siqi Ma, Ferdian Thung, David Lo, Cong Sun and Robert Deng - Adversarial Examples for Malware Detection Kathrin Grosse, Nicolas Papernot, Praveen Manoharan, Backes Michael and Patrick McDaniel Russo * Session 8: Privacy in Systems - PerfWeb: How to Violate Web Privacy with Hardware Performance Events Berk Gulmezoglu, Andreas Zankl, Thomas Eisenbarth and Berk Sunar - SePCAR: A Secure and Privacy-enhancing Protocol for Car Access Provision Iraklis Symeonidis, Abdelrahaman Aly, Mustafa Asan Mustafa, Bart Mennink, Siemen Dhooghe and Bart Preneel - Privacy Implications of Room Climate Data Philipp Morgner, Christian Müller, Matthias Ring, Björn Eskofier, Christian Riess, Frederik Armknecht and Zinaida Benenson 13:30 - 15:00 * Session 9: Network security - Link-Layer Device Type Classification on Encrypted Wireless Traffic with COTS Radios Rajib Ranjan Maiti, Sandra Siby, Ragav Sridharan and Nils Ole Tippenhauer - Preventing DNS amplification attacks using the history of DNS queries with SDN Soyoung Kim, Sora Lee, Geumhwan Cho, Muhammad Ejaz Ahmed, Jaehoon Paul Jeong and Hyoungshick Kim - Zero Round-Trip Time for the Extended Access Control Protocol Jacqueline Brendel and Marc Fischlin * Session 10: Controlling Access - No sugar but all the taste! Memory Encryption without Architectural Support Panagiotis Papadopoulos, George Christou, Giorgos Vasiliadis, Evangelos Markatos and Sotiris Ioannidis - Tree-based Cryptographic Access Control James Alderman, Naomi Farley and Jason Crampton - Securing Data Analytics on SGX With Randomization Swarup Chandra, Vishal Karande, Zhiqiang Lin, Latifur Khan, Murat Kantarcioglu and Bhavani Thuraisingham 15:30 - 17:00 * Session 11: Information Flow - We are Family: Relating Information-Flow Trackers Musard Balliu, Daniel Schoepe and Andrei Sabelfeld - A Better Composition Operator for Quantitative Information Flow Analyses Kai Engelhardt - WebPol: Fine-grained Information Flow Policies for Web Browsers Abhishek Bichhawat, Vineet Rajani, Jinank Jain, Deepak Garg and Christian Hammer * Session 12: Blockchain and social networks - A Traceability Analysis of Monero’s Blockchain Amrit Kumar, Clément Fischer, Shruti Tople and Prateek Saxena -RingCT 2.0: A Compact Linkable Ring Signature Based Protocol for Blockchain Cryptocurrency Monero Shi-Feng Sun, Man Ho Au, Joseph Liu and Tsz Hon Yuen - Secure Computation in Online Social Networks Foteini Baldimtsi, Dimitrios Papadopoulos, Stavros Papadopoulos, Alessandra Scafuro and Nikos Triandopoulos ### September 13 - Day 3 ########### 09:00 - 10:00 * Keynote: Sandro Etalle - From Intrusion Detection to Software Design 10:30 - 12:30 * Session 13: Web Security - DeltaPhish: Detecting Phishing Webpages in Compromised Websites Igino Corona, Battista Biggio, Matteo Contini, Luca Piras, Roberto Corda, Mauro Mereu, Guido Mureddu, Davide Ariu and Fabio Roli - DOMPurify: Client-Side Protection against XSS and Markup Injection Mario Heiderich, Christopher Späth, and Jörg Schwenk - Quantifying Web Adblocker Privacy Arthur Gervais, Alexandros Filios, Vincent Lenders and Srdjan Capkun * Session 14: Cryptographic signatures - Reusing Nonces in Schnorr Signatures Marc Beunardeau, Aisling Connolly, Remi Geraud, David Naccache and Damien Vergnaud - How to Circumvent the Structure-Preserving Signatures Lower Bounds MEssam Ghadafi - Server-Supported RSA Signatures for Mobile Devices Ahto Buldas, Aivo Kalu, Peeter Laud and Mart Oruaas 13:30 - 15:00 * Session 15: Formal techniques - Inference-Proof Updating of a Weakened View under the Modification of Input Parameters Joachim Biskup and Marcel Preuß - Verifying Constant-Time Implementations by Abstract Interpretation Sandrine Blazy, David Pichardie and Alix Trieu - AVR Processors as a Platform for Language-Based Security Florian Dewald, Heiko Mantel and Alexandra Weber * Session 16: Privacy and garbled circuits - Labeled Homomorphic Encryption: Scalable and Privacy-Preserving Processing of Outsourced Data Manuel Barbosa, Dario Catalano and Dario Fiore - New Way for Privacy-Preserving Decision Tree Evaluation Raymond K. H. Tai, Jack P. K. Ma, Yongjun Zhao and Sherman S. M. Chow - Enforcing Input Correctness via Certification in Garbled Circuit Evaluation Yihua Zhang, Marina Blanton and Fattaneh Bayatbabolghani 15:30 - 17:00 * Session 17: Intrusion Detection - Secure IDS Offloading with Nested Virtualization and Deep VM Introspection Shohei Miyama and Kenichi Kourai - Network Intrusion Detection based on Semi-Supervised Variational Auto-Encoder Genki Osada, Kazumasa Omote and Takashi Nishide - LeaPS: Learning-Based Proactive Security Auditing for Clouds Suryadipta Majumdar, Yosr Jarraya, Momen Oqaily, Amir Alimohammadifar, Makan Pourzandi, Lingyu Wang and Mourad Debbabi * Session 18: Cryptographic Applications II - Multiple Rate Threshold FlipThem David Leslie, Chris Sherfield and Nigel Smart - Stringer: Measuring the Importance of Static Data Comparisons to Detect Backdoors and Undocumented Functionality Sam L. Thomas, Tom Chothia and Flavio D. Garcia - Generic Constructions for Fully Secure Revocable Attribute-Based Encryption Kotoko Yamada, Nuttapong Attrapadung, Keita Emura, Goichiro Hanaoka and Keisuke Tanaka

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Cyber Security PhD Scholarship – The University of Newcastle with the Defense Science and Technology (DST) Group
by Vijay Varadharajan 29 Aug '17

29 Aug '17

Cyber Security PhD Scholarship – The University of Newcastle with the Defense Science and Technology (DST) Group Supervisors: Prof. Vijay Varadharajan, The University of Newcastle and Dr. Anton V. Uzunov, DST Group Topic Area: Advanced Authorization Infrastructures for Distributed Autonomic Systems Autonomic computing – or equivalently, self-adaptive computing – is concerned with supporting dynamic system evolution in response to changing internal or external circumstances, by endowing systems with automated self-management capabilities, thereby turning ordinary software systems into autonomic systems (or equivalently, self-adaptive or self-managing systems). One of the core properties whose enforcement leads to supporting such self-management capabilities is self-protection, which can be defined as a system’s ability to anticipate, to prevent, to detect and guard itself against cyber security threats. A significant problem with self-protection is how to constrain and control system actions, which involves aspects such as specification of privileges to perform actions, propagation of privileges in a distributed environment and their enforcement in heterogeneous systems and devices, ranging from cloud servers to mobile Internet of Things. The project is expected to investigate cryptographically enforced access control models and distributed capability-based models. The research will consider how access classes and capabilities with different privileges can be specified, keys and capabilities can be securely propagated in distributed, heterogeneous environments, how access to services and to devices/nodes should be enforced in a decentralized context, and what adaptation mechanisms should be applied in response to changing system/operational conditions. The project will involve the design of security architecture, development of new algorithms as well as the development of proof-of-concept implementations or case studies to validate the developed models and techniques in simulated or real-life scenarios. It is envisioned that the outcomes and outputs of the project will be specifically applicable to both IoT and autonomous cyber defense scenarios, and all case studies and/or application examples will be drawn from these areas. Scholarship Duration: 3 and 1/2 years Eligibility * Australian Citizenship required. * Must be Motivated and Committed to Doing Research * Knowledge of Cryptography and Security Techniques will be helpful. Contact: vijay.varadharajan(a)newcastle.edu.au<mailto:vijay.varadharajan@newcastle.edu.au> or Anton.Uzunov(a)dst.defence.gov.au<mailto:Anton.Uzunov@dst.defence.gov.au>

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Research Fellow Position in Software Defined Networks Security at Advanced Cyber Security Engineering Research Centre, The University of Newcastle
by Vijay Varadharajan 29 Aug '17

29 Aug '17

Research Fellow Position in Software Defined Networks Security at the Advanced Cyber Security Engineering Research Centre, The University of Newcastle A post doc Research Fellow position on Software Defined Networks (SDN) Security is available at the Advanced Cyber Security Engineering Research Centre. This position is funded by the Defence Science and Technology Group and it involves research and development in SDN Security. The Research Fellow is expected to work in the design and implementation of security architectures for SDN network services. Work will involve the design and implementation of security policies across distributed SDN domains under different management authorities. The Research Fellow is expected to work in the development of a Policy based Security Application at the SDN Controller and in the specification and management of security policies for provision of services across multiple autonomous domains. Programming and implementation experience is required as well as the ability to design network systems. In particular, experience python and java programming would be required. Background and expertise in security, especially systems and network security is highly desirable. Experience in writing good quality research papers is also necessary. The position is available immediately. Please send your expression of interest describing why you would be suitable for this position and attach your CV as well as your research and implementation experience in network systems and security. Start Date: The starting date of the position is immediate. Duration: Initially the Fellowship is for 1 year. There is potential for the Fellowship to be extended further subject to funding. Salary will be at the academic pay scale Level A Step 6. Contact Details: For further information, please contact Professor Vijay Varadharajan, Global Innovation Chair Professor in Cyber Security, vijay.varadharajan(a)newcastle.edu.au<mailto:vijay.varadharajan@newcastle.edu.au>, Tel: +61 2 4921 8687

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Call For Papers: The 1st International Workshop on Big Data Analytic for Cyber Crime Investigation and Prevention
by Andrii Shalaginov 28 Aug '17

28 Aug '17

Dear Colleague, (Apologies for multiple postings) We would like to invite you to submit your contributions to the 1st International Workshop on Big Data Analytic for Cyber Crime Investigation and Prevention. It is co-located with IEEE International Conference on Big Data 2017 that will take place in Boston, USA, December 11-14, 2017. Workshop webpage: https://www.ntnu.edu/iik/digital_forensics/ieeebigdata2017 *** IMPORTANT DATES *** Sept 10, 2017: Due date for full workshop papers submission Oct 15, 2017: Notification of paper acceptance to authors Nov 15, 2017: Camera-ready for accepted papers Dec 11-14, 2017: Workshop *** INTRODUCTION *** The big data paradigm has become inevitable in every aspect of the digital forensics process. Increase in personal devices (such as computers, smart phones, tablets, sensors and storage mediums) results in an expanding volume of potential evidence found in them. The increase in data is one of the largest challenges facing law enforcements’ timely prosecutions; with the effect, that human analysts can no longer be the lone actor in the loop. There is a need to create innovative and advanced models and analysis methods to help human analysts within law enforcements in order to automatically aid with the discovery, correlation, examination, analysis and understanding of evidence in criminal cases. Advanced big data analytics are important for cybercrime investigation and require novel approaches for automation. *** PROPOSED TOPICS *** Note that the topics are not limited to this proposed list. 1. Algorithms - Machine learning-aided analysis - Graph-based detection - Topic modeling - Secure platforms - Distributed storage and processing - Secure collaborative platforms 2. Applications - Network forensics readiness - Cyber threats intelligence - Malware analysis and detection - Emails mining - Events correlations - Access logs analysis - Mobile and Internet of Things forensics - Fraud detection - Database forensics 3. Data - Novel datasets - Digital forensics data simulation - Anonymised case data - Data storage standards - New formats and taxonomies *** PROGRAM CO-CHAIRS *** Andrii Shalaginov, Norwegian University of Science and Technology Katrin Franke, Norwegian University of Science and Technology Jan William Johnsen, Norwegian University of Science and Technology *** PROGRAM COMMITTEE *** Asif Iqbal (KTH Royal Institute of Technology) Bojan Kolosnjaji (Technical University of Munich) Carl Leichter (Norwegian University of Science and Technology) Dmitry Kangin (University of Exeter) Emiliano Casalicchio (Blekinge Institute of Technology) Ethan Rudd (University of Colorado Colorado Springs) Hamid Ebadi (Chalmers University of Technology) Hanno Langweg (Konstanz University of Applied Sciences) Heri Ramampiaro (Norwegian University of Science and Technology) Martin Boldt (Blekinge Institute of Technology) Michael McGuire (Towson University) Olaf M. Maennel (Tallinn University of Technology) Pavel Gladyshev (Dublin School of Computer Science) Pierre Lison (Norwegian Computing Centre) *** PAPER SUBMISSION *** Our workshop invites authors to submit: full-length papers (up to ten pages), short papers (up to six pages) or abstract papers (up to three pages) through the online submission system: https://wi-lab.com/cyberchair/2017/bigdata17/scripts/submitform.php?subarea… Papers have to follow the IEEE 2-column format and the Computer Society Proceedings Manuscript Formatting Guidelines. See formatting instructions here: https://www.ntnu.edu/iik/digital_forensics/ieee-bigdata-2017-formatting-ins… *** BEST PAPERS *** Selected papers are nominated for submission to “Special Issue on Cyber Threat Intelligence and Analytics”. Extended papers should have at least 60% of new material and will be sent through a review process to ensure the quality of contributions. *** CONTACTS*** If you have any questions, do not hesitate to contact Andrii Shalaginov (andrii.shalaginov(a)ntnu.no) and Jan William Johnsen (jan.w.johnsen(a)ntnu.no) Best regards, Andrii Shalaginov, on behalf of Katrin Franke and Jan William Johnsen Norwegian University of Science and Technology, Gjøvik, Norway

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CFP: 3rd Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC 2017) at SC17: Extended abstracts due Sept. 1
by Jason D. Bakos 25 Aug '17

25 Aug '17

========================================================================== ** Call for Papers ** ========================================================================== Third International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC 2017) Held in conjunction with Supercomputing 2017 Friday Morning, November 17, 2017 Denver, CO http://h2rc.cse.sc.edu ========================================================================== Submission Deadline: September 1, 2017 (one page extended abstracts) ========================================================================== As conventional von-Neumann architectures are suffering from rising power densities, we are facing an era with power, energy efficiency, and cooling as first-class constraints for scalable HPC. FPGAs can tailor the hardware to the application, avoiding overheads and achieving higher hardware efficiency than general-purpose architectures. Leading FPGA manufacturers have recently made a concerted effort to provide a range of higher-level, easier to use high-level programming models for FPGAs. Such initiatives are already stimulating new interest within the HPC community around the potential advantages of FPGAs over other architectures. With this in mind, this workshop, now in its third year, brings together HPC and heterogeneous-computing researchers to demonstrate and share experiences on legacy and new high-level programming models, optimizations specific to scientific computing and data analytics, tools for performance/energy improvements, FPGA computing in the cloud, and popular applications for reconfigurable computing such as machine learning and big data. ========================================================================== Submissions (one page extended abstract): Submissions are solicited that explore the state of the art in the use of FPGAs in heterogeneous high-performance computing architectures and, at a system level, in data centers and supercomputers. FPGAs may be considered from either or both the distributed, parallel and composable fabric of compute elements or from their dynamic reconfigurability. We particularly encourage submissions which focus on the mapping of algorithms and applications to heterogeneous FPGA-based systems as well as the overall impact of such architectures on the compute capacity, cost, power efficiency, and overall computational capabilities of data centers and supercomputers. Submissions may report on theoretical or applied research, implementation case studies, benchmarks, standards, or any other area that promises to make a significant contribution to our understanding of heterogeneous high-performance reconfigurable computing and will help to shape future research and implementations in this domain. A non-comprehensive list of potential topics of interest is given below: 1. FPGAs in Supercomputer, Cloud and Data Center: FPGAs in relation to challenges to Cloud/Data Center/Supercomputing posed by the end of Dennard scaling 2. Supercomputing, Cloud and Data Center Applications: Exploiting FPGA compute fabric to implement critical cloud/HPC applications 3. Leveraging Reconfigurability: Using reconfigurability for new approaches to algorithms used in cloud/HPC applications 4. Benchmarks: Compute performance and/or power and cost efficiency for cloud/HPC with heterogeneous architectures using FPGAs 5. Implementation Studies: Heterogenous Hardware and Management Infrastructure 6. Programming Languages/Runtimes/OS/Tools/Frameworks for Heterogeneous High Performance Reconfigurable Computing 7. Future-gazing: New Applications/The Cloud Enabled by Heterogeneous High Performance Reconfigurable Computing, Evolution of Computer Architecture in relation to Heterogeneous High Performance Reconfigurable Computing 8. Community building: Standards, consortium activity, open source, education, initiatives to enable and grow Heterogeneous High Performance Reconfigurable Computing Prospective authors are invited to submit original and unpublished contributions as a ONE PAGE EXTENDED ABSTRACT in ACM SIG Proceedings format. ========================================================================== You can submit your contribution(s) through a link on the H2RC website: http://h2rc.cse.sc.edu ========================================================================== Important dates: Submission Deadline: September 1, 2017 Acceptance Notification: October 15, 2017 Camera-ready Manuscripts Due: November 4, 2017 Workshop Date: November 17, 2017 ========================================================================== Workshop Format: H2RC is a half-day Friday workshop. It will be comprised of Keynote and invited talks and talks selected from paper submissions. ========================================================================== Organizing Committee: Workshop Organizers: Michaela Blott, Xilinx Franck Cappello, Argonne National Lab Torsten Hoefler, ETH Zurich Jason D. Bakos, University of South Carolina Program Committee: Rizwan Ashraf, Oak Ridge National Laboratory Paul Chow, University of Toronto Carl Ebeling, Altera Hans Eberle, NVIDIA Alan George, University of Florida Christoph Hagleitner, IBM Miriam Leeser, Northeastern University Viktor Prasanna, Univ. of Southern California Marco Santambrogio, Politecnico Di Milano Jeffrey Vetter, Oak Ridge National Lab -- Jason D. Bakos, Ph.D. Professor Dept. of Computer Science and Engineering Univ. of South Carolina 301 Main St., Suite 3A01L Columbia, SC 29208 803-777-8627 (voice), 803-777-3767 (fax) http://www.cse.sc.edu/~jbakos jbakos(a)cse.sc.edu

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[CFP] IA^3 2017 - Deadline Extended!
by Tumeo, Antonino 23 Aug '17

23 Aug '17

[Apologies if you receive multiple copies of this CFP] NEWS: DEADLINE EXTENDED TO SEPTEMBER 7! IA^3 2017 Seventh Workshop on Irregular Applications: Architectures and Algorithms http://hpc.pnl.gov/IA3/ November 13, 2017 In conjunction with SC17 In collaboration with ACM SIGHPC Sponsored by IEEE TCHPC Call for Papers Irregular applications occur in many subject matters. While inherently parallel, they exhibit highly variable execution performance at a local level due to unpredictable memory access patterns and/or network transfers, divergent control structures, and data imbalances. Moreover, they often require fine-grain synchronization and communication on large-data structures such as graphs, trees, unstructured grids, tables, sparse matrices, deep nets, and their combinations (such as, for example, attributed graphs). They have a significant degree of latent parallelism, which however is difficult to exploit due to their complex behavior. Current high performance architectures rely on data locality and regular computation to reduce access latencies, and often do not cope well with the requirements of these applications. Furthermore, irregular applications are difficult to scale on current supercomputing machines, due to their limits in fine-grained synchronization and small data transfers. Irregular applications pertain both to well established and emerging fields, such as machine learning, social network analysis, bioinformatics, semantic graph databases, Computer Aided Design (CAD), and computer security. Many of these application areas also process massive sets of unstructured data, which keep growing exponentially. Addressing the issues of irregular applications on current and future architectures will become critical to solve the challenges in science and data analysis of the next few years. This workshop seeks to explore solutions for supporting efficient execution of irregular applications in the form of new features at the level of the micro- and system-architecture, network, languages and libraries, runtimes, compilers, analysis, algorithms. Topics of interest, of both theoretical and practical significance, include but are not limited to: * Micro- and System-architectures, including multi- and many-core designs, heterogeneous processors, accelerators (GPUs, vector processors, Automata processor), reconfigurable (coarse grained reconfigurable and FPGA designs) and custom processors * Network architectures and interconnect (including high-radix networks, optical interconnects) * Novel memory architectures and designs (including processors-in memory) * Impact of new computing paradigms on irregular workloads (including neuromorphic processors and quantum computing) * Modeling, simulation and evaluation of novel architectures with irregular workloads * Innovative algorithmic techniques * Combinatorial algorithms (graph algorithms, sparse linear algebra, etc.) * Impact of irregularity on machine learning approaches * Parallelization techniques and data structures for irregular workloads * Data structures combining regular and irregular computations (e.g., attributed graphs) * Approaches for managing massive unstructured datasets (including streaming data) * Languages and programming models for irregular workloads * Library and runtime support for irregular workloads * Compiler and analysis techniques for irregular workloads * High performance data analytics applications, including graph databases Besides regular papers, papers describing work-in-progress or incomplete but sound, innovative ideas related to the workshop theme are also encouraged. We solicit both 8-page regular papers and 4-page position papers. Authors of exciting but not mature enough regular papers may be offered the option of a short 4-page paper and related short presentation. Artifact Evaluation For this edition of IA^3, authors of accepted regular papers will be invited to formally submit their supporting materials to the Artifact Evaluation process, similarly to the process followed for SC17. The participation to the Artifact Evaluation process is voluntary and will not change decisions regarding the paper. However, papers that undergo the evaluation process will receive a seal of approval on the paper, and will be able to participate in the BEST PAPER AWARD selection. DIVIDITI will provide an Amazon Gift Voucher (valued $200) to the authors of the paper that passes artifact evaluation with the highest score and that shares the artifact in the CK (Collective Knowledge - https://github.com/ctuning/ck) format. Authors that go through the Artifact Evaluation process are also encouraged (but not mandated) to submit the supporting materials as “Source Materials” in the digital library. For details on how to submit supporting materials to the Artifact Evaluation process, please refer to: http://ctuning.org/ae/submission.html. For any additional question on the Artifact Evaluation process please contact the Artifact Evaluation Chair Flavio Vella. Important Dates Abstract submission: 7 September 2017 - EXTENDED - FIRM Position or full paper submission: 7 September 2017 - EXTENDED - FIRM Notification of acceptance: 3 October 2017 Camera-ready position and full papers: 10 October 2017 Workshop: 13 November 2017 Submissions Submission site: https://easychair.org/conferences/?conf=ia32017 All submissions should be in double-column, single-spaced letter format, with at least one-inch margins on each side and respect the ACM standard proceedings templates (sigconf) available at: https://www.acm.org/publications/proceedings-template. The proceedings of the workshop will be published in cooperation with ACM SIGHPC. Submitted manuscripts may not exceed eight (8) pages in length for regular papers and four(4) pages for position papers including figures, tables and references. Organizers Antonino Tumeo, PNNL, US John Feo, PNNL/NIAC, US, Vito Giovanni Castellana, PNNL, US Artifact Evaluation Chair Flavio Vella, DIVIDITI, UK Publication Chair Marco Minutoli, PNNL, US Program Committee Scott Beamer, LBNL, US Michela Becchi, North Carolina State University, US Erik Boman, Sandia National Laboratories, US David Brooks, Harvard University, US Aydin Buluc, LBNL, US Sunita Chandrasekaran, University of Delaware, US Fabio Checconi, IBM, US Rajiv Gupta, Univerisity of California Riverside, US Maya Gokhale, LLNL, US Peter Kogge, Univ. of Notre Dame, US Vivek Kumar, Rice University, US John Leidel, Texas Tech University, US Kamesh Madduri, Pennsylvania State University, US Naoya Maruyama, RIKEN AICS, JP Tim Mattson, Intel, US Miquel Moreto, BSC and UPC, SP Richard Murphy, Micron Technology Inc, US Walid Najjar, University of California Riverside, US Maxim Naumov, NVIDIA, US Jacob Nelson, University of Washington, US Sreepathi Pai, University of Rochester, US Roger Pearce, LLNL, US Miquel Pericas, Chalmers University, SE Viktor Prasanna, University Of Southern California, US Alejandro Rico, ARM, US Jason Riedy, Georgia Institute of Technology, US Erik Saule, University of North Carolina at Charlotte, US John Shalf, LBNL, US Shaden Smith, University of Minnesota, US Bora Ucar, CNRS and LIP ENS Lyon, FR Ruud Van Der Pas, Oracle, US Flavio Vella, DIVIDITI, UK Ana Lucia Varbanescu, University of Amsterdam, NL

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ESORICS 2017: Call for Participation
by Cristina Alcaraz 21 Aug '17

21 Aug '17

============================================================================== ESORICS 2017: CALL FOR PARTICIPATION 22nd European Symposium on Research in Computer Security Oslo, Norway — September 11-15, 2017 ============================================================================== WWW: https://www.ntnu.edu/web/esorics2017/ Overview ------------------------------------ ESORICS is the annual European research event in Computer Security. The Symposium started in 1990 and has been held in several European countries, attracting a wide international audience from both the academic and industrial communities. The 22nd European Symposium on Research in Computer Security (ESORICS 2017) will be held in Oslo, Norway. ESORICS 2017 spans a total of 3 days, featuring: * 3 keynote speeches (Cormac Herley, Paul Syverson, Sandro Etalle) * 54 paper presentations in 3 days (Sep 11-13) * 8 workshops (Sept 14 - 15) Presentations Program ------------------------------------ The 54 papers of ESORICS 2017 are distributed between **18 sessions** in **two parallel tracks**. Following is the list of paper presentations for the main ESORICS conference. For the workshop programs, please consult their corresponding websites: * SECPRE 2017: https://samosweb.aegean.gr/secpre2017/ * SecSE 2017: http://secse.org * CBT 2017: http://www.deic.uab.cat/~jherrera/CBT/ * DPM 2017: http://deic.uab.cat/conferences/dpm/dpm2017/ * STM 2017: http://stm2017.di.unimi.it * QASA 2017: http://www.iit.cnr.it/qasa2017/ * CyberICPS: http://www.ds.unipi.gr/cybericps2017/ * SIoT 2017: http://siot-workshop.org ### September 11 - Day 1 ########### 09:30 - 10:30 * Keynote: Cormac Herley - Justifying Security Measures - a Position Paper 11:00 - 12:30 * Session 1: Security of embedded things - Shortfall-based Optimal Placement of Security Resources for Mobile IoT Scenarios Antonino Rullo, Edoardo Serra, Elisa Bertino and Jorge Lobo - Analyzing the Capabilities of the CAN Attacker Sibylle Froeschle and Alexander Stühring - Boot Attestation: Secure Remote Reporting with Off-The-Shelf IoT Sensors Steffen Schulz, André Schaller, Florian Kohnhäuser, and Stefan Katzenbeisser * Session 2: Cryptographic Application I - Per-Session Security: Password-Based Cryptography Revisited Gregory Demay, Peter Gazi, Ueli Maurer and Björn Tackmann - Non-Interactive Provably Secure Attestations for Arbitrary RSA Prime Generation Algorithm Fabrice Benhamouda, Houda Ferradi, Rémi Géraud and David Naccache - Tightly Secure Ring-LWE Based Key Encapsulation with Short Ciphertexts Martin Albrecht, Emmanuela Orsini, Kenneth Paterson, Guy Peer and Nigel Smart 14:00 - 15:30 * Session 3: Documents and Authorship - Identifying Multiple Authors in a Binary Program Xiaozhu Meng, Barton Miller and Kwang-Sung Jun - Verifiable Document Redacting Herve Chabanne, Rodolphe Hugel and Julien Keuffer - Source Code Authorship Attribution using Long Short-Term Memory Based Networks Bander Alsulami, Edwin Dauber, Richard Harang, Spiros Mancoridis and Rachel Greenstadt * Session 4: Analysis of Security Protocols - Automated analysis of equivalence properties for security protocols using else branches Ivan Gazeau and Steve Kremer and Levente Buttyán - Secure Authentication in the Grid: A formal analysis of DNP3: SAv5 Cas Cremers, Martin Dehnel-Wild and Kevin Milner - Modular Verification of Protocol Equivalence in the Presence of Randomness Matthew Bauer, Rohit Chadha and Mahesh Viswanathan 16:00 - 17:30 * Session 5: Threat Analysis - Preventing Advanced Persistent Threats in Complex Control Networks Juan E. Rubio, Cristina Alcaraz and Javier Lopez - MTD CBITS: Moving Target Defense for Cloud-Based IT Systems Alexandru G. Bardas, Sathya C. Sundaramurthy, Xinming Ou and Scott A. Deloach - Is my attack tree correct? Maxime Audinot, Sophie Pinchinat and Barbara Kordy * Session 6: Side Channels and data leakage - On-Demand Time Blurring to Support Side-Channel Defense Weijie Liu, Debin Gao and Mike Reiter - Acoustic Data Exfiltration from Speakerless Air-Gapped Computers via Covert Hard-Drive Noise Mordechai Guri, Yosef Solewicz, Andrey Daidakulov and Yuval Elovici - Practical Keystroke Timing Attacks in Sandboxed JavaScript Moritz Lipp, Daniel Gruss, Michael Schwarz, David Bidner, Clémentine Maurice and Stefan Mangard ### September 12 - Day 2 ########### 09:00 - 10:00 * Keynote: Paul Syverson - The Once and Future Onion 10:30 - 12:00 * Session 7: Vulnerabilities and Malware - Mirage: Toward a Stealthier and Modular Malware Analysis Sandbox for Android Lorenzo Bordoni, Mauro Conti and Riccardo Spolaor - VuRLE: Automatic Vulnerability Detection and Repair by Learning from Examples Siqi Ma, Ferdian Thung, David Lo, Cong Sun and Robert Deng - Adversarial Examples for Malware Detection Kathrin Grosse, Nicolas Papernot, Praveen Manoharan, Backes Michael and Patrick McDaniel Russo * Session 8: Privacy in Systems - PerfWeb: How to Violate Web Privacy with Hardware Performance Events Berk Gulmezoglu, Andreas Zankl, Thomas Eisenbarth and Berk Sunar - SePCAR: A Secure and Privacy-enhancing Protocol for Car Access Provision Iraklis Symeonidis, Abdelrahaman Aly, Mustafa Asan Mustafa, Bart Mennink, Siemen Dhooghe and Bart Preneel - Privacy Implications of Room Climate Data Philipp Morgner, Christian Müller, Matthias Ring, Björn Eskofier, Christian Riess, Frederik Armknecht and Zinaida Benenson 13:30 - 15:00 * Session 9: Network security - Link-Layer Device Type Classification on Encrypted Wireless Traffic with COTS Radios Rajib Ranjan Maiti, Sandra Siby, Ragav Sridharan and Nils Ole Tippenhauer - Preventing DNS amplification attacks using the history of DNS queries with SDN Soyoung Kim, Sora Lee, Geumhwan Cho, Muhammad Ejaz Ahmed, Jaehoon Paul Jeong and Hyoungshick Kim - Zero Round-Trip Time for the Extended Access Control Protocol Jacqueline Brendel and Marc Fischlin * Session 10: Controlling Access - No sugar but all the taste! Memory Encryption without Architectural Support Panagiotis Papadopoulos, George Christou, Giorgos Vasiliadis, Evangelos Markatos and Sotiris Ioannidis - Tree-based Cryptographic Access Control James Alderman, Naomi Farley and Jason Crampton - Securing Data Analytics on SGX With Randomization Swarup Chandra, Vishal Karande, Zhiqiang Lin, Latifur Khan, Murat Kantarcioglu and Bhavani Thuraisingham 15:30 - 17:00 * Session 11: Information Flow - We are Family: Relating Information-Flow Trackers Musard Balliu, Daniel Schoepe and Andrei Sabelfeld - A Better Composition Operator for Quantitative Information Flow Analyses Kai Engelhardt - WebPol: Fine-grained Information Flow Policies for Web Browsers Abhishek Bichhawat, Vineet Rajani, Jinank Jain, Deepak Garg and Christian Hammer * Session 12: Blockchain and social networks - A Traceability Analysis of Monero’s Blockchain Amrit Kumar, Clément Fischer, Shruti Tople and Prateek Saxena -RingCT 2.0: A Compact Linkable Ring Signature Based Protocol for Blockchain Cryptocurrency Monero Shi-Feng Sun, Man Ho Au, Joseph Liu and Tsz Hon Yuen - Secure Computation in Online Social Networks Foteini Baldimtsi, Dimitrios Papadopoulos, Stavros Papadopoulos, Alessandra Scafuro and Nikos Triandopoulos ### September 13 - Day 3 ########### 09:00 - 10:00 * Keynote: Sandro Etalle - From Intrusion Detection to Software Design 10:30 - 12:30 * Session 13: Web Security - DeltaPhish: Detecting Phishing Webpages in Compromised Websites Igino Corona, Battista Biggio, Matteo Contini, Luca Piras, Roberto Corda, Mauro Mereu, Guido Mureddu, Davide Ariu and Fabio Roli - DOMPurify: Client-Side Protection against XSS and Markup Injection Mario Heiderich, Christopher Späth, and Jörg Schwenk - Quantifying Web Adblocker Privacy Arthur Gervais, Alexandros Filios, Vincent Lenders and Srdjan Capkun * Session 14: Cryptographic signatures - Reusing Nonces in Schnorr Signatures Marc Beunardeau, Aisling Connolly, Remi Geraud, David Naccache and Damien Vergnaud - How to Circumvent the Structure-Preserving Signatures Lower Bounds MEssam Ghadafi - Server-Supported RSA Signatures for Mobile Devices Ahto Buldas, Aivo Kalu, Peeter Laud and Mart Oruaas 13:30 - 15:00 * Session 15: Formal techniques - Inference-Proof Updating of a Weakened View under the Modification of Input Parameters Joachim Biskup and Marcel Preuß - Verifying Constant-Time Implementations by Abstract Interpretation Sandrine Blazy, David Pichardie and Alix Trieu - AVR Processors as a Platform for Language-Based Security Florian Dewald, Heiko Mantel and Alexandra Weber * Session 16: Privacy and garbled circuits - Labeled Homomorphic Encryption: Scalable and Privacy-Preserving Processing of Outsourced Data Manuel Barbosa, Dario Catalano and Dario Fiore - New Way for Privacy-Preserving Decision Tree Evaluation Raymond K. H. Tai, Jack P. K. Ma, Yongjun Zhao and Sherman S. M. Chow - Enforcing Input Correctness via Certification in Garbled Circuit Evaluation Yihua Zhang, Marina Blanton and Fattaneh Bayatbabolghani 15:30 - 17:00 * Session 17: Intrusion Detection - Secure IDS Offloading with Nested Virtualization and Deep VM Introspection Shohei Miyama and Kenichi Kourai - Network Intrusion Detection based on Semi-Supervised Variational Auto-Encoder Genki Osada, Kazumasa Omote and Takashi Nishide - LeaPS: Learning-Based Proactive Security Auditing for Clouds Suryadipta Majumdar, Yosr Jarraya, Momen Oqaily, Amir Alimohammadifar, Makan Pourzandi, Lingyu Wang and Mourad Debbabi * Session 18: Cryptographic Applications II - Multiple Rate Threshold FlipThem David Leslie, Chris Sherfield and Nigel Smart - Stringer: Measuring the Importance of Static Data Comparisons to Detect Backdoors and Undocumented Functionality Sam L. Thomas, Tom Chothia and Flavio D. Garcia - Generic Constructions for Fully Secure Revocable Attribute-Based Encryption Kotoko Yamada, Nuttapong Attrapadung, Keita Emura, Goichiro Hanaoka and Keisuke Tanaka

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[simu-conf] EXTENDED DEADLINE - WSC 2017 - Posters, Case Studies, PhD Colloquium, Vendor track
by vsim-conf＠sce.carleton.ca 18 Aug '17

18 Aug '17

Winter Simulation Conference (WSC) 2017 - Call for Papers December 3-6, 2017 Red Rock Casino Resort & Spa www.wintersim.org DEADLINE EXTENDED - SEPTEMBER 1 Posters, Case Studies, PhD Colloquium, Vendor tracks WSC TURNS 50: SIMULATION EVERYWHERE! With 360 accepted papers, panels, special tracks, and an amazing venue, this 50th Anniversary Winter Simulation Conference promises to be a very exciting event. This is a reminder that there are other upcoming deadlines: . Poster Track http://meetings2.informs.org/wordpress/wsc2017/poster-sessions/ . PhD Colloquium http://meetings2.informs.org/wordpress/wsc2017/phd-colloquium/ . Case Studies http://meetings2.informs.org/wordpress/wsc2017/tracks/#caseStudies . Vendor Track http://meetings2.informs.org/wordpress/wsc2017/tracks/#vendor KEYNOTE & TITAN SPEAKERS 50th Anniversary Keynote - Barry L Nelson Northwestern University WSC 2067: What Are The Chances? At the November 1967 "Conference on the Applications of Simulation Using GPSS" it seems unlikely that anyone was wondering if the conference would still be occupying a big hotel in 2017. Conferences persist for many reasons, but a technical conference like WSC has to remain relevant to users, vendors, researchers and consumers (not just hotels) to survive. If our kind of simulation vanished, then so (eventually) would WSC. What is required for simulation to "remain relevant" for the next 50 years? Without fear of having to answer for my crimes in 2067, I boldly speculate on what SHOULD matter for the next 10-20 years, if not the next 50, with a focus on our strength: dealing with uncertainty. 50th Anniversary Titans Robert G. Sargent Professor Emeritus - Syracuse University A Prospective on Fifty-Five Years of the Evolution of Scientific Respect for Simulation Bernard P. Zeigler Professor Emeritus of Electrical and Computer Engineering - University of Arizona MASM Keynote Stephane Dauzere-Peres Professor, Ecole des Mines de Saint-Etienne Achievements and Lessons Learned from a Long-term Academic-Industrial Collaboration Military Keynote Douglas Hodson Associate Professor, Professor of Computer Engineering at the Air Force Institute of Technology (AFIT) Military Simulation: A Ubiquitous Future 50th Anniversary Track Keynote Brian Hollocks Professor, Bournemouth University, Faculty of Management. History of Simulation in the United Kingdom Further information about submission and the conference: http://www.wintersim.org Twitter: @WSConf Facebook: https://www.facebook.com/wintersimulationconference/ [apologies for duplicated messages. Problems/issues: vsim-conf-owner(a)sce.carleton.ca]

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IEEE VP TA - Vote for Doug
by fzuconf 18 Aug '17

18 Aug '17

Dear Colleague, The 2017 IEEE elections are August 15 – October 2 and I am running for IEEE VP Technical Activities. My main goal is leveraging IEEE to strengthen members’ careers and “mobilize their future.” It would be my great honor to serve the IEEE community in this role, I hope for your support and your vote! Experience, vision and accomplishment count. My diverse background in industry – and my professional and technical contributions – uniquely qualify me to deal with our current and future challenges. If elected, I shall work with you to maintain and grow IEEE’s position as the world’s leading volunteer-driven professional association – one that focuses on growing careers. My platform includes expanding new technology initiatives, growing standards activities, building education and training, leveraging collaboration across IEEE and externally, achieving diversity, and perhaps most important, assuring affordability as we do more for members’ careers. My website, www.dougzuckerman.org, has more information about me and shares my thoughts on how we shall work together on the theme, "Mobilize Your Future!" Please vote for me, help spread the word, and encourage your friends and colleagues to do likewise. Thanks, Doug Dr. Douglas N. Zuckerman IEEE Life Fellow IEEE Board of Directors – Division III Director (2012-13) IEEE Communications Society President (2008-9) IEEE Technical Activities Board Member (2008-9, 2012-13) IEEE Future Directions Committee (2014 - current) Senior Scientist, Telcordia Technologies (Retired) Consultant, Vencore Labs (www.vencorelabs.com) Ocean, New Jersey, USA Vote August 15th – October 2nd at www.ieee.org/elections. -- | | | Dr. Douglas N. Zuckerman | Candidate for IEEE VP Technical Activities | Ocean, New Jersey, USA | Campaign Website | | | ftin | |

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CFP: 3rd Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC 2017) at SC17: Extended abstracts due Sept. 1
by Jason D. Bakos 18 Aug '17

18 Aug '17

========================================================================== ** Call for Papers ** ========================================================================== Third International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC 2017) Held in conjunction with Supercomputing 2017 Friday Morning, November 17, 2017 Denver, CO http://h2rc.cse.sc.edu ========================================================================== Submission Deadline: September 1, 2017 (one page extended abstracts) ========================================================================== As conventional von-Neumann architectures are suffering from rising power densities, we are facing an era with power, energy efficiency, and cooling as first-class constraints for scalable HPC. FPGAs can tailor the hardware to the application, avoiding overheads and achieving higher hardware efficiency than general-purpose architectures. Leading FPGA manufacturers have recently made a concerted effort to provide a range of higher-level, easier to use high-level programming models for FPGAs. Such initiatives are already stimulating new interest within the HPC community around the potential advantages of FPGAs over other architectures. With this in mind, this workshop, now in its third year, brings together HPC and heterogeneous-computing researchers to demonstrate and share experiences on legacy and new high-level programming models, optimizations specific to scientific computing and data analytics, tools for performance/energy improvements, FPGA computing in the cloud, and popular applications for reconfigurable computing such as machine learning and big data. ========================================================================== Submissions (one page extended abstract): Submissions are solicited that explore the state of the art in the use of FPGAs in heterogeneous high-performance computing architectures and, at a system level, in data centers and supercomputers. FPGAs may be considered from either or both the distributed, parallel and composable fabric of compute elements or from their dynamic reconfigurability. We particularly encourage submissions which focus on the mapping of algorithms and applications to heterogeneous FPGA-based systems as well as the overall impact of such architectures on the compute capacity, cost, power efficiency, and overall computational capabilities of data centers and supercomputers. Submissions may report on theoretical or applied research, implementation case studies, benchmarks, standards, or any other area that promises to make a significant contribution to our understanding of heterogeneous high-performance reconfigurable computing and will help to shape future research and implementations in this domain. A non-comprehensive list of potential topics of interest is given below: 1. FPGAs in Supercomputer, Cloud and Data Center: FPGAs in relation to challenges to Cloud/Data Center/Supercomputing posed by the end of Dennard scaling 2. Supercomputing, Cloud and Data Center Applications: Exploiting FPGA compute fabric to implement critical cloud/HPC applications 3. Leveraging Reconfigurability: Using reconfigurability for new approaches to algorithms used in cloud/HPC applications 4. Benchmarks: Compute performance and/or power and cost efficiency for cloud/HPC with heterogeneous architectures using FPGAs 5. Implementation Studies: Heterogenous Hardware and Management Infrastructure 6. Programming Languages/Runtimes/OS/Tools/Frameworks for Heterogeneous High Performance Reconfigurable Computing 7. Future-gazing: New Applications/The Cloud Enabled by Heterogeneous High Performance Reconfigurable Computing, Evolution of Computer Architecture in relation to Heterogeneous High Performance Reconfigurable Computing 8. Community building: Standards, consortium activity, open source, education, initiatives to enable and grow Heterogeneous High Performance Reconfigurable Computing Prospective authors are invited to submit original and unpublished contributions as a ONE PAGE EXTENDED ABSTRACT in ACM SIG Proceedings format. ========================================================================== You can submit your contribution(s) through a link on the H2RC website: http://h2rc.cse.sc.edu ========================================================================== Important dates: Submission Deadline: September 1, 2017 Acceptance Notification: October 15, 2017 Camera-ready Manuscripts Due: November 4, 2017 Workshop Date: November 17, 2017 ========================================================================== Workshop Format: H2RC is a half-day Friday workshop. It will be comprised of Keynote and invited talks and talks selected from paper submissions. ========================================================================== Organizing Committee: Workshop Organizers: Michaela Blott, Xilinx Franck Cappello, Argonne National Lab Torsten Hoefler, ETH Zurich Jason D. Bakos, University of South Carolina Program Committee: Rizwan Ashraf, Oak Ridge National Laboratory Paul Chow, University of Toronto Carl Ebeling, Altera Hans Eberle, NVIDIA Alan George, University of Florida Christoph Hagleitner, IBM Miriam Leeser, Northeastern University Viktor Prasanna, Univ. of Southern California Marco Santambrogio, Politecnico Di Milano Jeffrey Vetter, Oak Ridge National Lab -- Jason D. Bakos, Ph.D. Professor Dept. of Computer Science and Engineering Univ. of South Carolina 301 Main St., Suite 3A01L Columbia, SC 29208 803-777-8627 (voice), 803-777-3767 (fax) http://www.cse.sc.edu/~jbakos jbakos(a)cse.sc.edu

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WHPC Workshop @ SC17 - Poster Deadline Extended
by Toni Collis 17 Aug '17

17 Aug '17

================================================================= 7th International Women in HPC workshop Sunday November 12th 2017 — Denver, CO, USA Call for posters and participation - deadline for posters extended: 27th August 2017 https://www.womeninhpc.org/whpc-sc17/workshop/ <https://www.womeninhpc.org/whpc-sc17/workshop/> ================================================================= Call for posters: Deadline extended Deadline for submissions: August 27th 2017 AOE Women in HPC will once again attend the Supercomputing conference to discuss diversity and inclusivity topics. Activities will bring together women from across the international HPC community, provide opportunities to network, showcase the work of inspiring women, and discuss how we can all work towards improving the under-representation of women in supercomputing. The 7th International Women in High Performance Computing (WHPC) workshop at SC17 in Denver brings together the HPC community to discuss the growing importance of increasing diversity in the workplace. This workshop will recognize and discuss the challenges of improving the proportion of women in the HPC community, and is relevant for employers and employees throughout the supercomputing workforce who are interested in addressing diversity. Sessions include: - Improving Diversity in the Workplace: What methods have been put in place and tested to improve workplace diversity and inclusion? - Career Development and Mentoring: Skills to thrive; sharing your experiences and advice on how to succeed in the workplace. - Virtual Poster Showcase: Highlighting work from women across industry and academia. Call for posters: Deadline extended Deadline for submissions: August 27th 2017 AOE As part of the workshop, we invite submissions from women in industry and academia to present their work as a virtual poster. This will promote the engagement of women in HPC research and applications, provide opportunities for peer to peer networking, and the opportunity to interact with female role models and employers. Submissions are invited on all topics relating to HPC from users and developers. All abstracts should emphasise the computational aspects of the work, such as the facilities used, the challenges that HPC can help address and any remaining challenges etc. For full details please see: http://www.womeninhpc.org/whpc-sc17/workshop/submit/ <http://www.womeninhpc.org/whpc-sc17/workshop/submit/> Workshop Committee Chairs - Workshop Chair: Toni Collis, EPCC, UK and Women in HPC Network, UK - Poster Chair: Misbah Mubarak, Argonne National Laboratory, USA - Mentoring Chair: Elsa Gonsiorowski, Lawrence Livermore National Laboratory, USA - Publicity Chair: Kimberly McMahon, McMahon Consulting, USA Steering and Organisation Committee - Sunita Chandrasekaran, University of Delaware, USA - Trish Damkroger, Intel, USA - Kelly Gaither, TACC, USA - Rebecca Hartman-Baker, NERSC, USA - Daniel Holmes, EPCC, UK - Adrian Jackson, EPCC, UK - Alison Kennedy, Hartree Centre, STFC, UK - Lorna Rivera, CEISMC, Georgia Institute of Technology, USA Programme Committee (for early career posters) - Sunita Chandrasekaran, University of Delaware, USA - Toni Collis, EPCC, UK and Women in HPC Network, UK - Elsa Gonsiorowski, Lawrence Livermore National Laboratory, USA - Rebecca Hartman-Baker, NERSC, USA - Daniel Holmes, EPCC, UK - Adrian Jackson, EPCC, UK - Alison Kennedy, Hartree Centre, STFC, UK - Misbah Mubarak, Argonne National Laboratory, USA - Lorna Rivera, CEISMC, Georgia Institute of Technology, USA - Jesmin Jahan Tithi, Parallel Computing Lab, Intel Corporation, USA The University of Edinburgh is a charitable body, registered in Scotland, with registration number SC005336.

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Call For Papers [Updated Information]: ESPM2@SC17 - Third International Workshop on Extreme Scale Programming Models and Middleware
by Hari Subramoni 15 Aug '17

15 Aug '17

======================================================================== Call For Papers Third International IEEE Workshop on Extreme Scale Programming Models and Middleware (ESPM2 2017) November 12, 2017, Denver, Colorado to be held in conjunction with SuperComputing 2017, November 12 - 16, 2017 Denver, Colorado http://nowlab.cse.ohio-state.edu/espm2/ ======================================================================== Next generation architectures and systems being deployed are characterized by high concurrency, low memory per-core, and multiple levels of hierarchy and heterogeneity. These characteristics bring out new challenges in energy efficiency, fault-tolerance and, scalability. It is commonly believed that software has the biggest share of the responsibility to tackle these challenges. In other words, this responsibility is delegated to the next generation programming models and their associated middleware/runtimes. This workshop focuses on different aspects of programming models such as task-based parallelism (Charm++, OCR, Habanero, Legion, X10, HPX, etc), PGAS (OpenSHMEM, UPC, CAF, Chapel, UPC++, etc.), BigData (Hadoop, Spark, etc), Deep Learning (Caffe, Microsoft CNTK, Google TensorFlow), directive-based languages (OpenMP, OpenACC) and Hybrid MPI+X, etc. It also focuses on their associated middleware (unified runtimes, interoperability for hybrid programming, tight integration of MPI+X, and support for accelerators) for next generation systems and architectures. The ultimate objective of the ESPM2 workshop is to serve as a forum that brings together researchers from academia and industry working in the areas of programming models, runtime systems, compilers, programming languages, and application developers. ESPM2 2017 will be held as a full day workshop in conjunction with the SuperComputing (SC 2017), Denver, Colorado, USA, Sunday, November 12th, 2017. Topics ------ ESPM2 2017 welcomes original submissions in a range of areas, including but not limited to: * New programming models, languages and constructs for exploiting high concurrency and heterogeneity * Experience with and improvements for existing parallel languages and run-time environments such as: - MPI - PGAS (OpenSHMEM, UPC, CAF, Chapel, UPC++, etc.) - Directive-based programming (OpenMP, OpenACC) - Asynchronous Task-based models (Charm++, OCR, Habanero, Legion, X10, HPX, etc) - Hybrid MPI+X models - BigData (Hadoop, Spark, etc), and - Deep Learning (Caffe, Microsoft CNTK, Google TensorFlow) * Parallel compilers, programming tools, and environments * Software and system support for extreme scalability including fault tolerance * Programming environments for heterogeneous multi-core systems and accelerators such as KNL, OpenPOWER, ARM, GPUs, FPGAs, MICs, and DSPs Papers should present original research and should provide sufficient background material to make them accessible to the broader community. Best Paper Award ---------------- Intel has generously offered to sponsor the Best Paper Award. This award will be given to the author(s) of the paper selected by the Technical Program Committee and the Program Chairs. The award will be determined from viewpoints of the technical and scientific merits, impact on the science and engineering of the research work and the clarity of presentation of the research contents in the paper. Keynote Speakers ---------------- We are happy to announce that Prof. William D. Gropp, Interim Director and Chief Scientist at the National Center for Supercomputing Applications and the Thomas M. Siebel Chair in Computer Science at the University of Illinois Urbana-Champaign will deliver the keynote address at ESPM2'17. Panel Information ----------------- Panel Topic : Effective Programming Models for Deep Learning at Scale Panel Moderator : Daniel Holmes, EPCC, The University of Edinburgh, UK. Panel Members : Coming soon! Paper Submission and Registration --------------------------------- Abstracts and papers need to be submitted via the EasyChair conference system. EasyChair URL for ESPM2'17: https://easychair.org/conferences/?conf=espm22017 Submissions should not exceed 8 pages using ACM format with 10pt font. Each submission must be a single PDF file. Papers must be submitted in PDF format (readable by Adobe Acrobat Reader 5.0 and higher) and formatted for 8.5" x 11" (U.S. Letter). The manuscript should be formatted according to ACM format (see http://www.acm.org/sigs/publications/proceedings-templates) Papers should present original research and should provide sufficient background material to make them accessible to the broader community. It should not be submitted in parallel to any other conference or journal. At least one of the authors of each accepted paper must register as a participant of the workshop and present the paper at the workshop, in order to have the paper published in the proceedings. Each research paper will be taken through a comprehensive peer review process by an internationally recognized group of experts in the field. Papers will be evaluated along the metrics of a) Quality of Presentation; b) Novelty / Originality; c) Relation to State of the Art; d) Technical Strength; e) Significance of Work; and f) Relevance to Workshop. Every effort will be made to ensure that each paper receives multiple reviews. Please contact the Program Chairs for any questions/clarifications Proceedings Information ----------------------- ACM SigHPC will publish the workshop proceedings which will be available through the ACM Digital Library. The camera-ready versions need to be submitted via the EasyChair conference management system. The link to the submission site will be provided soon. Please contact the Program Chairs for any questions/clarifications. Important Dates --------------- Technical paper submission deadline : 11:59 PM, AoE, August 31, 2017 Author notification : October 1, 2017 Camera-ready deadline : 11:59 PM, AoE, October 7, 2017 Workshop : Sunday, November 12, 2017 ESPM2'17 Workshop Organizers ------------------------------ Hari Subramoni, The Ohio State University Karl Schulz, Intel Corporation Dhabaleswar K. (DK) Panda, The Ohio State University Program Committee ----------------- * Guang R. Gao, University of Delaware * Vladimir Getov, University of Westminster, UK * Jeff Hammond, Intel Labs * Michael A. Heroux, Sandia National Laboratories * Costin Iancu, Lawrence Berkeley National Laboratory * Darren Kerbyson, Pacific Northwest National Laboratory * Guangming Tan, Institute of Computing Technology, Chinese Academy of Sciences, China * Olivier Tardieu, IBM T.J. Watson Research Center * Daniel Tian, The Portland Group * Sean Treichler, NVIDIA Corporation * Abhinav Vishnu, Pacific Northwest National Laboratory Further Information ------------------- See the ESPM2'17 website at http://nowlab.cse.ohio-state.edu/espm2/ Thanks, The ESPM2'17 Organizing Committee.

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[Deadline Extended] - BI 2017 - Call for Abstracts
by Yang 15 Aug '17

15 Aug '17

[Apologies if you receive this more than once] CALL FOR ABSTRACTS The 2017 International Conference on Brain Informatics (BI'17) "Investigating the Brain and Mind from Informatics Perspective" November 16-18, 2017, Beijing, China Homepage: http://bii.ia.ac.cn/bi-2017/ --------------------------------------- SUBMISSION DEADLINE: August 30, 2017 One-line submission: https://wi-lab.com/cyberchair/2017/bi17/scripts/submit.php?subarea=B --------------------------------------- *** INVITED SPEECHES *** 1. "Multimodal Modelling of Network Propagation of Neuropathology in Dementia" Alan Evans (McGill University, Canada) 2. "Neural Correlates of Word, Sentence and Story Comprehension" Tom Mitchell (Carnegie Mellon University, US) 3. "The Cognitive Neural Basis of Object Knowledge" Yanchao Bi (Beijing Normal University, China) 4. "Harnessing Large-Scale Data-Sharing to Drive Discovery and Bench-to-Bedside Translation in Traumatic Brain Injury and Spinal Cord Injury" Adam Ferguson (University of California San Francisco, US) 5. "Computational Psychophysiology Based Research Methodology for Mental Health" Bin Hu (Lanzhou University, China) 6. "Multiscale Gene Expression Signatures in the Mammalian Brain in Health and Disease" Michael Hawrylycz (Allen Institute for Brain Science, US) 7. "Machine Learning in Medical Imaging Analysis" Dinggang Shen (University of North Carolina at Chapel Hill, US) *** WORKSHOPS AND SPECIAL SESSIONS *** ++++++++++++++++++++++++++++++++++++++++++++ Abstract submission (TYPE II) is still open! ++++++++++++++++++++++++++++++++++++++++++++ To submit abstracts to workshops/special sessions, please visit http://bii.ia.ac.cn/bi-2017/workshops.htm # Workshop on Brain and Artificial Intelligence (BAI 2017) Organizers: Yi Zeng, Chinese Academy of Sciences, China Shuliang Wang, Beijing Institute of Technology, China # Workshop on Knowledge Representation: Brain and Machine (KRBM 2017) Organizers: Yanchao Bi, Beijing Normal University, China Yi Zeng, Chinese Academy of Sciences, China # Workshop on Affective, Psychological and Physiological Computing (APPC 2017) Organizers: Bin Hu, Lanzhou University, China Zhijun Yao, Lanzhou University, China Mi Li, Beijing University of Technology, China # Workshop on Big Data and Visualization for Brainsmatics (BDVB 2017) Organizers: Qingming Luo, Huazhong University of Science and Technology, China Anan LI, Huazhong University of Science and Technology, China # Workshop on Brain Big Data Based Wisdom Service (BBDBWS 2017) Organizer: Jiajin Huang, Beijing University of Technology, China # Workshop on Semantic Technology for eHealth (STeH 2017) Organizers: Jiao Li, Chinese Academy of Medical Sciences, China Zhisheng Huang, Vrije University Amsterdam, The Netherlands # Workshop on Big Data Neuroimaging Analytics for Brain and Mental Health (BDNABMH 2017) Organizer: Shouyi Wang, University of Texas at Arlington, USA # Workshop on Novel Methods of the Brain Imaging in the Clinical and Preclinical Neuroscience (NMBICPN 2017) Organizers: Vassiliy Tsytsarev, University of Maryland School of Medicine, USA Vicky Yamamoto, Keck School of Medicine of USC, USA Yan Li, University of Southern Queensland, Australia # The 1st International Workshop on Deep Learning in Brain MRI and Pathology Images (DLBMPI 2017) Organizers: Yan Xu, School of Biological Science and Medical Engineering, BUAA Eric Chang, Microsoft Research Asia # Workshop on Mesoscopic Brainformatics (MBAI 2017) Organizers: Dezhong Yao, University of Electronic Science and Technology of China, China Pedro A. Valdes-Sosa, University of Electronic Science and Technology of China, China Yong He, Beijing Normal University, China Li Dong, University of Electronic Science and Technology of China, China # Special Session on Brain Informatics in Neurogenetics (BIN 2017) Organizers: Hong Liang, Harbin Engineering University, China Lei Du, Northwestern Polytechnical University, China Li Shen, Indiana University School of Medicine, USA # Special Session on BigNeuron Project (BP 2017) Organizers: Zhi Zhou, Allen Institute for Brain Sciences, USA Min Liu, Hunan University, China ================================================== Brain Informatics (BI) conference series provides a premier forum to bring together researchers and practitioners in the fields of neuroscience, cognitive science, computer science, data science, artificial intelligence, information communication technologies, and neuroimaging technologies. BI'17 addresses the computational, cognitive, physiological, biological, physical, ecological and social perspectives of brain informatics, as well as topics relating to mental health and well-being. It also welcomes emerging information technologies, including but not limited to Internet/Web of Things (IoT/WoT), cloud computing, big data analytics and interactive knowledge discovery related to brain research. BI'17 also encourages submissions that explore how advanced computing technologies are applied to and make a difference in various large-scale brain studies and their applications. BI'17 welcomes paper submissions (full paper and abstract submissions). Both research and application papers are solicited. All submitted papers will be reviewed on the basis of technical quality, relevance, significance and clarity. Accepted full papers will be included in the proceedings by Springer LNCS/LNAI. Workshop, Special-Session and Tutorial proposals, and Industry/Demo-Track papers are also welcome. The organizers of Workshops and Special-Sessions are invited to prepare a book proposal based on the topics of the workshop/special session for possible book publication in the Springer-Nature Brain Informatics & Health book series (http://www.springer.com/series/15148) *** Topics and Areas *** Track 1: Cognitive and Computational Foundations of Brain Science Track 2: Investigations of Human Information Processing Systems Track 3: Brain Big Data Analytics, Curation and Management Track 4: Informatics Paradigms for Brain and Mental Health Track 5: Brain-Inspired Intelligence and Computing IMPORTANT DATES : =========================== May 1, 2017: Submission deadline for full papers June 20, 2017: Notification of full paper acceptance July 20, 2017: Submission deadline for workshop/special-session papers August 30, 2017: Submission deadline for abstracts (TYPE-II) (for both main conference and workshops/special sessions) November 16, 2017: Tutorials, workshops and special-sessions November 17-18, 2017: Main conference ABSTRACT (TYPE-II) SUBMISSIONS : ================================= (Submission Deadline: August 30, 2017): Abstracts have a word limit of 500 words. Experimental research is particularly welcome. Accepted abstract submissions will be included in the conference program, and will be published as a single, collective proceedings volume. Title: Include in the title of the abstract all words critical for a subject index. Write your title in sentence case (first letter is capitalized; remaining letters are lower case). Do not bold or italicize your full title. Author: List all authors who contributed to the work discussed in the abstract. The presenting author must be listed in the first author slot of the list. Be prepared to submit contact information as well as conflict of interest information for each author listed. Abstract: Enter the body of the abstract and attach any applicable graphic files or tables here. Do not re-enter the title, author, support, or other information that is collected in other steps of the submission form. Presentation Preference: Authors may select from three presentation formats when submitting an abstract: "poster only", "talk preferred" or "no preference." The "talk preferred" selection indicates that you would like to give a talk, but will accept a poster format if necessary. Marking "poster only" indicates that you would not like to be considered for an oral-presentation session. Selecting "no preference" indicates the author's willingness to be placed in the best format for the program. Each paper or abstract requires one sponsoring attendee (i.e. someone who registered and is attending the conference). A single attendee can not sponsor more than two abstracts or papers. Oral presentations will be selected from both full length papers and abstracts. ----------------------------------------------- One-line submission: https://wi-lab.com/cyberchair/2017/bi17/scripts/submit.php?subarea=B ----------------------------------------------- *** Post-Conference Journal Publication *** The Brain Informatics conferences have the formal ties with Brain Informatics journal (Springer-Nature, http://www.springer.com/40708) Accepted abstracts from the conference will be expanded and revised for possible inclusion in the Brain Informatics journal each year. It is fully sponsored and no any article-processing fee charged for authors of Brain Informatics conference. ORGANIZERS ========== General Chairs Bo Xu (Chinese Academy of Sciences, China) Hanchuan Peng (Allen Institute for Brain Sciences, USA) Qingming Luo (Huazhong University of Science and Technology, China) Program Committee Chairs Yi Zeng (Chinese Academy of Sciences, China) Yong He (Beijing Normal University, China) Jeanette Kotaleski (Karolinska Institute, Sweden) Maryann Martone (University of California, San Diego, USA) Organizing Chairs Ning Zhong (Maebashi Institute of Technology, Japan, and Beijing Advanced Innovation Center for Future Internet Technology, Beijing University of Technology, China Jianzhou Yan (Beijing Advanced Innovation Center for Future Internet Technology, Beijing University of Technology, China) Shengfu Lu (Beijing Advanced Innovation Center for Future Internet Technology, Beijing University of Technology, China) Workshop/Special-Session Chairs An'an Li (Huazhong University of Science and Technology, China) Sen Song (Tsinghua University, China) Tutorial Chair Wenming Zheng (South East University, China) Publicity Chairs Tielin Zhang (Chinese Academy of Sciences, China) Shouyi Wang (University of Texas at Arlington, USA) Yang Yang (Maebashi Institute of Technology, Japan, and Beijing Advanced Innovation Center for Future Internet Technology, Beijing University of Technology, China) Steering Committee Chairs Ning Zhong (Maebashi Institute of Technology, Japan) Hanchuan Peng (Allen Institute for Brain Science, USA) *** Contact Information *** tielin.zhang(a)ia.ac.cn shouyiw(a)uta.edu yang(a)maebashi-it.org

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CFP: Special Issue on 'Software Defined Networking and Network Function Virtualization' in Scalable Computing and Communications (Springer)
by Javid Taheri 14 Aug '17

14 Aug '17

--------------------------------------------------------------------------------- Please accept our apologies if you receive multiple copies of this CFP --------------------------------------------------------------------------------- CALL FOR PAPERS Scalable Computing and Communications ~Special Issue Call for Papers~ Software Defined Networking and Network Function Virtualization IMPORTANT DATES: - Submission Deadline: 15 Dec 2017 - Notification of Acceptance: 31 March 2018 - Final Version: 31 May 2018 INTRODUCTION AND MOTIVATION With maturity of virtualization techniques, more and more services are to be run inside virtualized Data Centers vDCs) to further reduce Operational (OPEX) and Capital Expenditures (CAPEX). Aligned with the general trend of migrating traditional IT architectures to clouds (public or private), next generation of telecommunication networks such as 5G are also envisaged to be run on virtualized environments where network functions are deployed on virtual machines and/or containers instead of current proprietary equipment. Several proof-of-concept and initial industrial deployments proved that Software Defined Networking (SDN) and Network Function Virtualization (NFV) are two promising technologies to enable such technological shift. Nevertheless, how to optimize and guarantee the performance of such virtualized systems is still challenging, because they require accurate modelling and efficient optimization to satisfy ever increasing demand of future networks. To address several major issues raised by migrating network applications to virtualized infrastructures, this special issue aims to highlight challenges, state-of-the-art, and solutions to a set of currently unresolved key questions including, but not limited to: performance, modelling, optimizations, reliability, security, and techno-economic aspects of virtualized networks. By addressing these concerns, technology might be one step closer to understanding, and consequently, closing the gap between the performance of the next generation SDN/NFV-based networks and their current counterparts in proprietary boxes. In this special issue, we welcome contributions that can shed light onto any of the following questions: 1. How virtualized networks should be designed to guarantee the performance required by network operations? 2. How virtualized services can be benchmarked and/or compared? 3. How virtualized services should be designed and/or operated to take advantage of cloud infrastructures and further provide flexibilities (such as load migration) that current proprietary equipment cannot provide? 4. How network functions should be placed and/or network capacities should be sliced to optimize network critical metrics such as throughput, delay, jitter, etc.? 5. How virtualized services should/can be efficiently orchestrated, monitored, and managed? PAPER SUBMISSION: - Authors are encouraged to submit high-quality, original work that has neither appeared in, nor is under consideration by, other journals. - All papers will be reviewed following standard reviewing procedures for the Journal. - Papers must be prepared in accordance with the Journal guidelines: www.springer.com/41122 - Submit manuscripts to: http://SCAC.edmgr.com. Topics to be covered in this Special Issue are including, but not limited to: 1. Model, benchmark, and/or optimize operation of SDN/NFV-based networks and services. 2. Resource and/or content allocation for SDN/NFV-based networks and services. 3. Reliability and resiliency of SDN/NFV-based networks and services. 4. Dynamic/flexible construction and deployment of Service Function Chains using SDN/NFV technologies. 5. Fault detection and/or correction for SDN/NFV-based networks and services. 6. Architectures, applications, and use cases of SDN/NFV to provide networking services. 7. Monitoring techniques for SDN/NFV-based networks and services. 8. Deployment, management, and orchestration of SDN/NFV-based networks and services. 9. Business/economic aspects of SDN/NFV-based networks and services. 10. Security concerns of SDN/NFV-based networks and services. 11. Mobile and/or Wireless Networks enabled by SDN/NFV-based networks and services.

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[CFP] IA^3 2017 - Seventh SC Workshop on Irregular Applications: Architectures and Algorithms
by Tumeo, Antonino 12 Aug '17

12 Aug '17

[Apologies if you receive multiple copies of this CFP] IA^3 2017 Seventh Workshop on Irregular Applications: Architectures and Algorithms http://hpc.pnl.gov/IA3/ November 13, 2017 In conjunction with SC17 In collaboration with ACM SIGHPC Sponsored by IEEE TCHPC Call for Papers Irregular applications occur in many subject matters. While inherently parallel, they exhibit highly variable execution performance at a local level due to unpredictable memory access patterns and/or network transfers, divergent control structures, and data imbalances. Moreover, they often require fine-grain synchronization and communication on large-data structures such as graphs, trees, unstructured grids, tables, sparse matrices, deep nets, and their combinations (such as, for example, attributed graphs). They have a significant degree of latent parallelism, which however is difficult to exploit due to their complex behavior. Current high performance architectures rely on data locality and regular computation to reduce access latencies, and often do not cope well with the requirements of these applications. Furthermore, irregular applications are difficult to scale on current supercomputing machines, due to their limits in fine-grained synchronization and small data transfers. Irregular applications pertain both to well established and emerging fields, such as machine learning, social network analysis, bioinformatics, semantic graph databases, Computer Aided Design (CAD), and computer security. Many of these application areas also process massive sets of unstructured data, which keep growing exponentially. Addressing the issues of irregular applications on current and future architectures will become critical to solve the challenges in science and data analysis of the next few years. This workshop seeks to explore solutions for supporting efficient execution of irregular applications in the form of new features at the level of the micro- and system-architecture, network, languages and libraries, runtimes, compilers, analysis, algorithms. Topics of interest, of both theoretical and practical significance, include but are not limited to: * Micro- and System-architectures, including multi- and many-core designs, heterogeneous processors, accelerators (GPUs, vector processors, Automata processor), reconfigurable (coarse grained reconfigurable and FPGA designs) and custom processors * Network architectures and interconnect (including high-radix networks, optical interconnects) * Novel memory architectures and designs (including processors-in memory) * Impact of new computing paradigms on irregular workloads (including neuromorphic processors and quantum computing) * Modeling, simulation and evaluation of novel architectures with irregular workloads * Innovative algorithmic techniques * Combinatorial algorithms (graph algorithms, sparse linear algebra, etc.) * Impact of irregularity on machine learning approaches * Parallelization techniques and data structures for irregular workloads * Data structures combining regular and irregular computations (e.g., attributed graphs) * Approaches for managing massive unstructured datasets (including streaming data) * Languages and programming models for irregular workloads * Library and runtime support for irregular workloads * Compiler and analysis techniques for irregular workloads * High performance data analytics applications, including graph databases Besides regular papers, papers describing work-in-progress or incomplete but sound, innovative ideas related to the workshop theme are also encouraged. We solicit both 8-page regular papers and 4-page position papers. Authors of exciting but not mature enough regular papers may be offered the option of a short 4-page paper and related short presentation. Artifact Evaluation For this edition of IA3, authors of accepted regular papers will be invited to formally submit their supporting materials to the Artifact Evaluation process, similarly to the process followed for SC17. The participation to the Artifact Evaluation process is voluntary and will not change decisions regarding the paper. However, papers that undergo the evaluation process will receive a seal of approval on the paper, and will be able to participate in the BEST PAPER AWARD selection. DIVIDITI will provide an Amazon Gift Voucher (valued $200) to the authors of the paper that passes artifact evaluation with the highest score and that shares the artifact in the CK (Collective Knowledge - https://github.com/ctuning/ck) format. Authors that go through the Artifact Evaluation process are also encouraged (but not mandated) to submit the supporting materials as “Source Materials” in the digital library. For details on how to submit supporting materials to the Artifact Evaluation process, please refer to: http://ctuning.org/ae/submission.html. For any additional question on the Artifact Evaluation process please contact the Artifact Evaluation Chair Flavio Vella. Important Dates Abstract submission: 22 August 2017 Position or full paper submission: 29 August 2017 Notification of acceptance: 3 October 2017 Camera-ready position and full papers: 10 October 2017 Workshop: 13 November 2017 Submissions Submission site: https://easychair.org/conferences/?conf=ia32017 All submissions should be in double-column, single-spaced letter format, with at least one-inch margins on each side and respect the ACM standard proceedings templates (sigconf) available at: https://www.acm.org/publications/proceedings-template. The proceedings of the workshop will be published in cooperation with ACM SIGHPC. Submitted manuscripts may not exceed eight (8) pages in length for regular papers and four(4) pages for position papers including figures, tables and references. Organizers Antonino Tumeo, PNNL, US John Feo, PNNL/NIAC, US, Vito Giovanni Castellana, PNNL, US Artifact Evaluation Chair Flavio Vella, DIVIDITI, UK Publication Chair Marco Minutoli, PNNL, US Program Committee Scott Beamer, LBNL, US Michela Becchi, North Carolina State University, US Erik Boman, Sandia National Laboratories, US David Brooks, Harvard University, US Aydin Buluc, LBNL, US Sunita Chandrasekaran, University of Delaware, US Fabio Checconi, IBM, US Rajiv Gupta, Univerisity of California Riverside, US Maya Gokhale, LLNL, US Peter Kogge, Univ. of Notre Dame, US Vivek Kumar, Rice University, US John Leidel, Texas Tech University, US Kamesh Madduri, Pennsylvania State University, US Naoya Maruyama, RIKEN AICS, JP Tim Mattson, Intel, US Miquel Moreto, BSC and UPC, SP Richard Murphy, Micron Technology Inc, US Walid Najjar, University of California Riverside, US Maxim Naumov, NVIDIA, US Jacob Nelson, University of Washington, US Sreepathi Pai, University of Rochester, US Roger Pearce, LLNL, US Miquel Pericas, Chalmers University, SE Viktor Prasanna, University Of Southern California, US Alejandro Rico, ARM, US Jason Riedy, Georgia Institute of Technology, US Erik Saule, University of North Carolina at Charlotte, US John Shalf, LBNL, US Shaden Smith, University of Minnesota, US Bora Ucar, CNRS and LIP ENS Lyon, FR Ruud Van Der Pas, Oracle, US Flavio Vella, DIVIDITI, UK Ana Lucia Varbanescu, University of Amsterdam, NL

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CfP: 10th IEEE HiPC Student Research Symposium (SRS)
by Anand Panangadan 12 Aug '17

12 Aug '17

*** 10th HiPC Student Research Symposium (SRS) *** Held in conjunction with the 24th IEEE INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING, DATA, and ANALYTICS (HIPC 2017) December 18-21, 2017 | Jaipur, INDIA | www.hipc.org HiPC 2017 will feature the 10th Student Research Symposium on High Performance Computing, Data, and Analytics (HPC) aimed at stimulating and fostering student research, and providing an international forum to highlight student research accomplishments. The symposium will also provide exposure to students in the best practices in HPC in academia and industry. The symposium will feature student posters and provide students with other enriching experiences, such as workshops, industry exhibits, and demos. The Conference Reception and multiple Student Symposium Poster Exhibit sessions will provide an opportunity for students to interact with HPC researchers and practitioners (and recruiters) from academia and industry. Papers are solicited in all areas of high-performance computing, data, and analytics. Awards for Best Poster will be presented at the symposium. An online book containing the resumes of the students participating in the symposium will be compiled and made available to the sponsors of the HiPC 2017 conference. IMPORTANT DATES Aug 15, 2017 - Submission Opens Sep 16, 2017 - Submission Deadline Nov 1, 2017 - Accept/Reject Decision Notification Dec 18-21, 2017 - Symposium ELIGIBILITY Submissions should have at least one author who is a student during any part of the calendar year 2017. Submissions may have multiple student or non-student co-authors. Submissions must mark student authors with an asterisk (*). SUBMISSION INSTRUCTIONS In order to be considered for a poster at the student Research Symposium, authors must submit papers, not exceeding five (5) letter size (8.5in x 11in) pages, in 11 or 12 point font, singled spaced, with 1'' margins on all sides. Papers are to be submitted online in PDF format through Easychair at: https://easychair.org/conferences/?conf=hipcsrs10. The papers will be used to select posters, but will NOT be published in the conference proceedings. This will provide students flexibility to publish an extended version of their paper at other venues, after benefiting from reviewer feedback from the symposium. Papers submitted to the symposium are expected to be reviewed by at least three independent reviewers. Papers will be judged on technical merit, quality, relevance to the symposium, and related parameters. Plagiarism is prohibited. Papers that are plagiarized will be rejected and the corresponding department and institution will be notified. Facilities for displaying posters will be made available and the exact specifications of the poster size will be provided later. At least one student author of each paper that is accepted must register and attend the conference to present their work. Papers with no-shows will be retroactively rejected. TRAVEL SUPPORT We expect to provide a travel scholarship to at least one student author of each accepted submission from an Indian university, subject to availability of funding. This scholarship will cover partial expenses for attending the conference. Further details on this scholarship and the application process will be provided later. SYMPOSIUM CO-CHAIRS KISHORE KOTHAPALLI, IIIT Hyderabad, India MADHURA PURNAPRAJNA, Amrita Vishwa Vidyapeetham University, India ASHOK SRINIVASAN, Florida State University, USA Contact student_symposium(a)hipc.org for more details. ------------------------------------------------------------------------------------------------ Follow us on Twitter https://twitter.com/hipcconf Google+ https://plus.google.com/+HipcOrg Facebook https://www.facebook.com/hipc.conference/ ------------------------------------------------------------------------------------------------

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Call for papers: PhD Forum at The 8th International Green and Sustainable Computing Conference
by Mahdi NIKDAST 10 Aug '17

10 Aug '17

Dear colleagues, I invite you and your students to submit your contributions to the PhD Forum at The 8th International Green and Sustainable Computing Conference (IGSC¹17). Please find more information below. Thank you! Best regards Mahdi Nikdast **Call for Papers: Ph.D. Forum at The 8th International Green and Sustainable Computing Conference (IGSC'17)** Forum webpage: http://igsc.eecs.wsu.edu/forum_17 The Ph.D. forum at IGSC'17 will provide an international forum for doctoral students engaged in research on sustainable and energy-efficient computing and/or computing for a more sustainable planet to present their work to fellow researchers and practitioners in the green and sustainable computing community. The forum includes a poster session during which the students can present their work and receive constructive feedback for completion of their dissertation research. The Ph.D. forum is intended for students who have already settled on a specific research topic and have some preliminary results, but still have enough time remaining before their final defence that they can benefit from the forum discussions. **Accepted submissions will appear in IGSC'17 proceedings** *Paper submission guidelines* Current Ph.D. students are encouraged to submit an extended abstract that describes their doctoral work. The student should be the sole author of the paper, but the advisor and other contributors should be acknowledged. The topics of interest coincide with IGSC'17 are listed in the CFP page (http://igsc.eecs.wsu.edu/cfp_17) The extended abstract should be three pages in IEEE conference proceedings style (http://www.ieee.org/conferences_events/conferences/publishing/templates.ht ml). All manuscripts should be in pdf format, in English, and registered and submitted through easychair (http://easychair.org/conferences/?conf=igsc17) under the "IGSC17 PhD Forum" submission track. Please kindly note that: - The research ideas in submissions should be mature enough to be presented in a paper and content can evolve to become the substantial part of a Ph.D. dissertation. The submissions should not have been published and not under review by other conferences or journals elsewhere. - The authors should outline related problems in the field and their current solutions, clearly motivate and formulate the research topic, present the preliminary idea, the proposed approach, and the preliminary experimental results achieved thus far, explicitly point out the intended contributions of the proposed work. Each submission will be reviewed by members of the forum¼s technical program committee. Abstracts will be judged on originality, technical merit, presentation quality, and relevance to the conference topics. Accepted abstracts will appear in the IGSC conference proceedings and will be indexed by DBLP and the IEEE digital library. All invited participants will be asked to provide a poster, which will be displayed throughout the conference. Authors of accepted submissions are expected to register for the conference and appear in person to present their work. The student rate will apply to authors who are currently full-time students. *Poster Presentation* Authors of accepted submissions should prepare a poster for presentation. Posters will be displayed throughout the conference and the students are required to be available during the poster session to discuss their work and answer related questions. The poster size should not exceed 841 x 1189 mm (width x height). The organizers encourage all Ph.D. Students in the fields of sustainable and energy-efficient computing and computing for a more sustainable planet to participate in this Ph.D. Forum. *Ph.D. Forum Chair* Mahdi Nikdast (Polytechnique Montreal, Canada), mahdi.nikdast(a)polymtl.ca *Important dates* Paper submission due: August 31, 2017 Notifications sent to authors: September 4, 2017 Camera-ready papers due: September 7, 2017

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CFP: 3rd Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC 2017) at SC17: Extended abstracts due Sept. 1
by Jason D. Bakos 08 Aug '17

08 Aug '17

========================================================================== ** Call for Papers ** ========================================================================== Third International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC 2017) Held in conjunction with Supercomputing 2017 Friday Morning, November 17, 2017 Denver, CO http://h2rc.cse.sc.edu ========================================================================== Submission Deadline: September 1, 2017 (one page extended abstracts) ========================================================================== As conventional von-Neumann architectures are suffering from rising power densities, we are facing an era with power, energy efficiency, and cooling as first-class constraints for scalable HPC. FPGAs can tailor the hardware to the application, avoiding overheads and achieving higher hardware efficiency than general-purpose architectures. Leading FPGA manufacturers have recently made a concerted effort to provide a range of higher-level, easier to use high-level programming models for FPGAs. Such initiatives are already stimulating new interest within the HPC community around the potential advantages of FPGAs over other architectures. With this in mind, this workshop, now in its third year, brings together HPC and heterogeneous-computing researchers to demonstrate and share experiences on legacy and new high-level programming models, optimizations specific to scientific computing and data analytics, tools for performance/energy improvements, FPGA computing in the cloud, and popular applications for reconfigurable computing such as machine learning and big data. ========================================================================== Submissions (one page extended abstract): Submissions are solicited that explore the state of the art in the use of FPGAs in heterogeneous high-performance computing architectures and, at a system level, in data centers and supercomputers. FPGAs may be considered from either or both the distributed, parallel and composable fabric of compute elements or from their dynamic reconfigurability. We particularly encourage submissions which focus on the mapping of algorithms and applications to heterogeneous FPGA-based systems as well as the overall impact of such architectures on the compute capacity, cost, power efficiency, and overall computational capabilities of data centers and supercomputers. Submissions may report on theoretical or applied research, implementation case studies, benchmarks, standards, or any other area that promises to make a significant contribution to our understanding of heterogeneous high-performance reconfigurable computing and will help to shape future research and implementations in this domain. A non-comprehensive list of potential topics of interest is given below: 1. FPGAs in Supercomputer, Cloud and Data Center: FPGAs in relation to challenges to Cloud/Data Center/Supercomputing posed by the end of Dennard scaling 2. Supercomputing, Cloud and Data Center Applications: Exploiting FPGA compute fabric to implement critical cloud/HPC applications 3. Leveraging Reconfigurability: Using reconfigurability for new approaches to algorithms used in cloud/HPC applications 4. Benchmarks: Compute performance and/or power and cost efficiency for cloud/HPC with heterogeneous architectures using FPGAs 5. Implementation Studies: Heterogenous Hardware and Management Infrastructure 6. Programming Languages/Runtimes/OS/Tools/Frameworks for Heterogeneous High Performance Reconfigurable Computing 7. Future-gazing: New Applications/The Cloud Enabled by Heterogeneous High Performance Reconfigurable Computing, Evolution of Computer Architecture in relation to Heterogeneous High Performance Reconfigurable Computing 8. Community building: Standards, consortium activity, open source, education, initiatives to enable and grow Heterogeneous High Performance Reconfigurable Computing Prospective authors are invited to submit original and unpublished contributions as a ONE PAGE EXTENDED ABSTRACT in ACM SIG Proceedings format. ========================================================================== You can submit your contribution(s) through a link on the H2RC website: http://h2rc.cse.sc.edu ========================================================================== Important dates: Submission Deadline: September 1, 2017 Acceptance Notification: October 15, 2017 Camera-ready Manuscripts Due: November 4, 2017 Workshop Date: November 17, 2017 ========================================================================== Workshop Format: H2RC is a half-day Friday workshop. It will be comprised of Keynote and invited talks and talks selected from paper submissions. ========================================================================== Organizing Committee: Workshop Organizers: Michaela Blott, Xilinx Franck Cappello, Argonne National Lab Torsten Hoefler, ETH Zurich Jason D. Bakos, University of South Carolina Program Committee: Rizwan Ashraf, Oak Ridge National Laboratory Paul Chow, University of Toronto Carl Ebeling, Altera Hans Eberle, NVIDIA Alan George, University of Florida Christoph Hagleitner, IBM Miriam Leeser, Northeastern University Viktor Prasanna, Univ. of Southern California Marco Santambrogio, Politecnico Di Milano Jeffrey Vetter, Oak Ridge National Lab -- Jason D. Bakos, Ph.D. Professor Dept. of Computer Science and Engineering Univ. of South Carolina 301 Main St., Suite 3A01L Columbia, SC 29208 803-777-8627 (voice), 803-777-3767 (fax) http://www.cse.sc.edu/~jbakos jbakos(a)cse.sc.edu

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ESORICS 2017: Call for Participation
by Cristina Alcaraz 07 Aug '17

07 Aug '17

============================================================================== ESORICS 2017: CALL FOR PARTICIPATION 22nd European Symposium on Research in Computer Security Oslo, Norway — September 11-15, 2017 ============================================================================== WWW: https://www.ntnu.edu/web/esorics2017/ Overview ------------------------------------ ESORICS is the annual European research event in Computer Security. The Symposium started in 1990 and has been held in several European countries, attracting a wide international audience from both the academic and industrial communities. The 22nd European Symposium on Research in Computer Security (ESORICS 2017) will be held in Oslo, Norway. ESORICS 2017 spans a total of 3 days, featuring: * 3 keynote speeches (Cormac Herley, Paul Syverson, Sandro Etalle) * 54 paper presentations in 3 days (Sep 11-13) * NN workshops (Sept 14 - 15) Registration ------------------------------------ Early Registration for ESORICS+Workshops 2017 is open, but will end soon. Early registration deadline is ***August, 15th 2017*** Registration rates: https://www.ntnu.edu/web/esorics2017/registration If an invitation letter is needed (e.g. VISA) the letter will be provided after the registration. To do this, it is necessary to send an email to the organizing committee: mailto:esorics2017@ntnu.edu Venue page: https://www.ntnu.edu/web/esorics2017/venue Travel and accommodation page: https://www.ntnu.edu/web/esorics2017/travel-accomodation We hope to see you in Oslo, Norway! Presentations Program ------------------------------------ The 54 papers of ESORICS 2017 are distributed between **18 sessions** in **two parallel tracks**. Following is the list of paper presentations for the main ESORICS conference. For the workshop programs, please consult their corresponding websites: * SECPRE 2017: https://samosweb.aegean.gr/secpre2017/ * SecSE 2017: http://secse.org * CBT 2017: http://www.deic.uab.cat/~jherrera/CBT/ * DPM 2017: http://deic.uab.cat/conferences/dpm/dpm2017/ * STM 2017: http://stm2017.di.unimi.it * QASA 2017: http://www.iit.cnr.it/qasa2017/ * CyberICPS: http://www.ds.unipi.gr/cybericps2017/ * SIoT 2017: http://siot-workshop.org ### September 11 - Day 1 ########### 09:30 - 10:30 * Keynote: Cormac Herley 11:00 - 12:30 * Session 1: Security of embedded things - Shortfall-based Optimal Placement of Security Resources for Mobile IoT Scenarios Antonino Rullo, Edoardo Serra, Elisa Bertino and Jorge Lobo - Analyzing the Capabilities of the CAN Attacker Sibylle Froeschle and Alexander Stühring - Boot Attestation: Secure Remote Reporting with Off-The-Shelf IoT Sensors André Schaller, Florian Kohnhäuser, Steffen Schulz and Stefan Katzenbeisser * Session 2: Cryptographic Application I - Per-Session Security: Password-Based Cryptography Revisited Gregory Demay, Peter Gazi, Ueli Maurer and Björn Tackmann - Non-Interactive Provably Secure Attestations for Arbitrary RSA Prime Generation Algorithm Fabrice Benhamouda, Houda Ferradi, Rémi Géraud and David Naccache - Tightly Secure Ring-LWE Based Key Encapsulation with Short Ciphertexts Martin Albrecht, Emmanuela Orsini, Kenneth Paterson, Guy Peer and Nigel Smart 14:00 - 15:30 * Session 3: Documents and Authorship - Identifying Multiple Authors in a Binary Program Xiaozhu Meng, Barton Miller and Kwang-Sung Jun - Verifiable Document Redacting Herve Chabanne, Rodolphe Hugel and Julien Keuffer - Source Code Authorship Attribution using Long Short-Term Memory Based Networks Bander Alsulami, Edwin Dauber, Richard Harang, Spiros Mancoridis and Rachel Greenstadt * Session 4: Analysis of Security Protocols - Automated analysis of equivalence properties for security protocols using else branches Ivan Gazeau and Steve Kremer and Levente Buttyán - Secure Authentication in the Grid: A formal analysis of DNP3: SAv5 Cas Cremers, Martin Dehnel-Wild and Kevin Milner - Modular Verification of Protocol Equivalence in the Presence of Randomness Matthew Bauer, Rohit Chadha and Mahesh Viswanathan 16:00 - 17:30 * Session 5: Threat Analysis - Preventing Advanced Persistent Threats in Complex Control Networks Juan E. Rubio, Cristina Alcaraz and Javier Lopez - MTD CBITS: Moving Target Defense for Cloud-Based IT Systems Alexandru G. Bardas, Sathya C. Sundaramurthy, Xinming Ou and Scott A. Deloach - Is my attack tree correct? Maxime Audinot, Sophie Pinchinat and Barbara Kordy * Session 6: Side Channels and data leakage - On-Demand Time Blurring to Support Side-Channel Defense Weijie Liu, Debin Gao and Mike Reiter - Acoustic Data Exfiltration from Speakerless Air-Gapped Computers via Covert Hard-Drive Noise Mordechai Guri, Yosef Solewicz, Andrey Daidakulov and Yuval Elovici - Practical Keystroke Timing Attacks in Sandboxed JavaScript Moritz Lipp, Daniel Gruss, Michael Schwarz, David Bidner, Clémentine Maurice and Stefan Mangard ### September 12 - Day 2 ########### 09:00 - 10:00 * Keynote: Paul Syverson 10:30 - 12:00 * Session 7: Vulnerabilities and Malware - Mirage: Toward a Stealthier and Modular Malware Analysis Sandbox for Android Lorenzo Bordoni, Mauro Conti and Riccardo Spolaor - VuRLE: Automatic Vulnerability Detection and Repair by Learning from Examples Siqi Ma, Ferdian Thung, David Lo, Cong Sun and Robert Deng - Adversarial Examples for Malware Detection Kathrin Grosse, Nicolas Papernot, Praveen Manoharan, Backes Michael and Patrick McDaniel Russo * Session 8: Privacy in Systems - PerfWeb: How to Violate Web Privacy with Hardware Performance Events Berk Gulmezoglu, Andreas Zankl, Thomas Eisenbarth and Berk Sunar - SePCAR: A Secure and Privacy-enhancing Protocol for Car Access Provision Iraklis Symeonidis, Abdelrahaman Aly, Mustafa Asan Mustafa, Bart Mennink, Siemen Dhooghe and Bart Preneel - Privacy Implications of Room Climate Data Philipp Morgner, Christian Müller, Matthias Ring, Björn Eskofier, Christian Riess, Frederik Armknecht and Zinaida Benenson 13:30 - 15:00 * Session 9: Network security - Link-Layer Device Type Classification on Encrypted Wireless Traffic with COTS Radios Rajib Ranjan Maiti, Sandra Siby, Ragav Sridharan and Nils Ole Tippenhauer - Preventing DNS amplification attacks using the history of DNS queries with SDN Soyoung Kim, Sora Lee, Geumhwan Cho, Muhammad Ejaz Ahmed, Jaehoon Paul Jeong and Hyoungshick Kim - Zero Round-Trip Time for the Extended Access Control Protocol Jacqueline Brendel and Marc Fischlin * Session 10: Controlling Access - No sugar but all the taste! Memory Encryption without Architectural Support Panagiotis Papadopoulos, George Christou, Giorgos Vasiliadis, Evangelos Markatos and Sotiris Ioannidis - Tree-based Cryptographic Access Control James Alderman, Naomi Farley and Jason Crampton - Securing Data Analytics on SGX With Randomization Swarup Chandra, Vishal Karande, Zhiqiang Lin, Latifur Khan, Murat Kantarcioglu and Bhavani Thuraisingham 15:30 - 17:00 * Session 11: Information Flow - We are Family: Relating Information-Flow Trackers Musard Balliu, Daniel Schoepe and Andrei Sabelfeld - A Better Composition Operator for Quantitative Information Flow Analyses Kai Engelhardt - WebPol: Fine-grained Information Flow Policies for Web Browsers Abhishek Bichhawat, Vineet Rajani, Jinank Jain, Deepak Garg and Christian Hammer * Session 12: Blockchain and social networks - A Traceability Analysis of Monero’s Blockchain Amrit Kumar, Clément Fischer, Shruti Tople and Prateek Saxena -RingCT 2.0: A Compact Linkable Ring Signature Based Protocol for Blockchain Cryptocurrency Monero Shi-Feng Sun, Man Ho Au, Joseph Liu and Tsz Hon Yuen - Secure Computation in Online Social Networks Foteini Baldimtsi, Dimitrios Papadopoulos, Stavros Papadopoulos, Alessandra Scafuro and Nikos Triandopoulos ### September 13 - Day 3 ########### 09:00 - 10:00 * Keynote: Sandro Etalle 10:30 - 12:30 * Session 13: Web Security - DeltaPhish: Detecting Phishing Webpages in Compromised Websites Igino Corona, Battista Biggio, Matteo Contini, Luca Piras, Roberto Corda, Mauro Mereu, Guido Mureddu, Davide Ariu and Fabio Roli - DOMPurify: Client-Side Protection against XSS and Markup Injection Mario Heiderich, Jörg Schwenk and Christopher Spaeth - Quantifying Web Adblocker Privacy Arthur Gervais, Alexandros Filios, Vincent Lenders and Srdjan Capkun * Session 14: Cryptographic signatures - Reusing Nonces in Schnorr Signatures Marc Beunardeau, Aisling Connolly, Remi Geraud, David Naccache and Damien Vergnaud - How to Circumvent the Structure-Preserving Signatures Lower Bounds MEssam Ghadafi - Server-Supported RSA Signatures for Mobile Devices Ahto Buldas, Aivo Kalu, Peeter Laud and Mart Oruaas 13:30 - 15:00 * Session 15: Formal techniques - Inference-Proof Updating of a Weakened View under the Modification of Input Parameters Marcel Preuß and Joachim Biskup - Verifying Constant-Time Implementations by Abstract Interpretation Sandrine Blazy, David Pichardie and Alix Trieu - AVR Processors as a Platform for Language-Based Security Florian Dewald, Heiko Mantel and Alexandra Weber * Session 16: Privacy and garbled circuits - Labeled Homomorphic Encryption: Scalable and Privacy-Preserving Processing of Outsourced Data Manuel Barbosa, Dario Catalano and Dario Fiore - New Way for Privacy-Preserving Decision Tree Evaluation Raymond K. H. Tai, Jack P. K. Ma, Yongjun Zhao and Sherman S. M. Chow - Enforcing Input Correctness via Certification in Garbled Circuit Evaluation Yihua Zhang, Marina Blanton and Fattaneh Bayatbabolghani 15:30 - 17:00 * Session 17: Intrusion Detection - Secure IDS Offloading with Nested Virtualization and Deep VM Introspection Shohei Miyama and Kenichi Kourai - Network Intrusion Detection based on Semi-Supervised Variational Auto-Encoder Genki Osada, Kazumasa Omote and Takashi Nishide - LeaPS: Learning-Based Proactive Security Auditing for Clouds Suryadipta Majumdar, Yosr Jarraya, Momen Oqaily, Amir Alimohammadifar, Makan Pourzandi, Lingyu Wang and Mourad Debbabi * Session 18: Cryptographic Applications II - Multiple Rate Threshold FlipThem David Leslie, Chris Sherfield and Nigel Smart - Stringer: Measuring the Importance of Static Data Comparisons to Detect Backdoors and Undocumented Functionality Sam L. Thomas, Tom Chothia and Flavio D. Garcia - Generic Constructions for Fully Secure Revocable Attribute-Based Encryption Kotoko Yamada, Nuttapong Attrapadung, Keita Emura, Goichiro Hanaoka and Keisuke Tanaka

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CFP to Special Issue in SCAC on Scalable Algorithms and Behavior Analytics in Cyber-Enabled World - Deadline Mar. 31, 2018
by Xiaokang Zhou 07 Aug '17

07 Aug '17

[Apologies if you receive this more than once] [SCAC Call for Papers] http://static.springer.com/sgw/documents/1608722/application/pdf/scalable+a… ======================================================================= Scalable Computing and Communications Special Issue on Scalable Algorithms and Behavior Analytics in Cyber-Enabled World ----------------------------------------------------------------------------------------------------------------------------- Aims and Scope Due to the emerging computing paradigm, the physical, social, and mental world are increasingly integrating and merging into the cyberspace. In this emerging but significant field, it is necessary to model the human individual information processing along with their corresponding behaviors, in order to build systematic knowledge about new phenomena, behaviors, properties and practices across the broad applications in cyber-enabled world. Specifically, studies related to scalable algorithm and behavioral analysis are conducted in terms of the cyber entities, as well as their relations and conjugations in physical, social and mental spaces, which focuses more on the basic attributes, models, functions, and evolutions of cyber entities, and all their possible relations conjugated with real things. For this scientific and systematic study, numerous challenges are raised as: How to establish and improve the foundational theory and methodology for the scalable computing and data processing in the cyber-enabled world? How to find a unified way to study and represent the diversified cyber entities along with their behavior patterns and communications? How to systematically extract, create, and fuse the information, knowledge, and intelligence generated across the physical-social systems for the sustainable utilization? How to deal with the accompanying issues while producing numerous cyber things, such as security, reliability, and etc. Topics may include (but are not limited to): • Scalable Communications in Cyber-world • Data Centric Computing in Cyberspace • Scalable Knowledge Modeling and Management in Cyber-world • User Behavior Analysis and Modeling in Cyber-physical Systems • User Influence Measure and Model in Cyberspace • Cyber-Social Sensing and Behavior Analysis • Scalable Cyber Hybrid Interface/System Design • Scalable Mechanisms for Intelligent Transportation Systems • Cyber-Based Learning Analytics with Scalable Computing • Cyber-Empowered Sentiment Analysis and Mental Computing • Wearable Computing and Smart Sensor • Scalable Computing for Healthcare • Scalability in Cyber Security, Privacy and Reliability • Scalable algorithms for Cyber Visualization • Scalable deep learning architectures • Scalable Brain-inspired Computing and Soft Computing • Scalable Agent-based Computing • Scalable algorithms for the Internet of Things • Scalable algorithms for Edge computing (EC) and Mobile Edge Computing (MEC) • Scalable Services for Pervasive Computing Submissions Authors should prepare their manuscript according to the Guide for Authors of Scalable Computing and Communications available from http://www.springer.com/41122 , and submit online at: https://www.editorialmanager.com/scac . To ensure that the manuscript is correctly identified for inclusion into the special issue, authors must select "Scalable Algorithms and Behavior Analytics in Cyber-Enabled World" when they reach the “Article Type” step in the submission process. Tentative Schedule Paper Submission Due: Mar. 31, 2018 Completion of first review cycle: Jul. 15, 2018 Deadline for submitting the revised papers: Oct. 15, 2018 2nd review completion: Nov. 30, 2018 Camera-ready Manuscript Due: Dec. 31, 2018 Guest editors: Xiaokang Zhou, Shiga University, Japan Kevin Wang, The University of Auckland, New Zealand Flavia C. Delicato, Federal University of Rio de Janeiro, Brazil Adnan Al-Anbuky, Auckland University of Technology, New Zealand Contact Information Corresponding Guest Editor, Dr. Zhou (zhou(a)biwako.shiga-u.ac.jp) -- Xiaokang Zhou (周暁康), Ph.D. Faculty of Data Science The Center for Data Science Education and Research, Shiga University 1-1-1 Banba, Hikone, Shiga 522-8522, Japan Email: zhou(a)biwako.shiga-u.ac.jp Phone: +81-749-27-1290

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Call For Papers: The 1st International Workshop on Big Data Analytic for Cyber Crime Investigation and Prevention
by Andrii Shalaginov 07 Aug '17

07 Aug '17

Dear Colleague, (Apologies for multiple postings) We would like to invite you to submit your contributions to the 1st International Workshop on Big Data Analytic for Cyber Crime Investigation and Prevention. It is co-located with IEEE International Conference on Big Data 2017 that will take place in Boston, USA, December 11-14, 2017. Workshop webpage: https://www.ntnu.edu/iik/digital_forensics/ieeebigdata2017 *** IMPORTANT DATES *** Sept 10, 2017: Due date for full workshop papers submission Oct 15, 2017: Notification of paper acceptance to authors Nov 15, 2017: Camera-ready for accepted papers Dec 11-14, 2017: Workshop *** INTRODUCTION *** The big data paradigm has become inevitable in every aspect of the digital forensics process. Increase in personal devices (such as computers, smart phones, tablets, sensors and storage mediums) results in an expanding volume of potential evidence found in them. The increase in data is one of the largest challenges facing law enforcements’ timely prosecutions; with the effect, that human analysts can no longer be the lone actor in the loop. There is a need to create innovative and advanced models and analysis methods to help human analysts within law enforcements in order to automatically aid with the discovery, correlation, examination, analysis and understanding of evidence in criminal cases. Advanced big data analytics are important for cybercrime investigation and require novel approaches for automation. *** PROPOSED TOPICS *** Note that the topics are not limited to this proposed list. 1. Algorithms - Machine learning-aided analysis - Graph-based detection - Topic modeling - Secure platforms - Distributed storage and processing - Secure collaborative platforms 2. Applications - Network forensics readiness - Cyber threats intelligence - Malware analysis and detection - Emails mining - Events correlations - Access logs analysis - Mobile and Internet of Things forensics - Fraud detection - Database forensics 3. Data - Novel datasets - Digital forensics data simulation - Anonymised case data - Data storage standards - New formats and taxonomies *** PROGRAM CO-CHAIRS *** Andrii Shalaginov, Norwegian University of Science and Technology Katrin Franke, Norwegian University of Science and Technology Jan William Johnsen, Norwegian University of Science and Technology *** PROGRAM COMMITTEE *** Asif Iqbal (KTH Royal Institute of Technology) Bojan Kolosnjaji (Technical University of Munich) Carl Leichter (Norwegian University of Science and Technology) Dmitry Kangin (University of Exeter) Emiliano Casalicchio (Blekinge Institute of Technology) Ethan Rudd (University of Colorado Colorado Springs) Hamid Ebadi (Chalmers University of Technology) Hanno Langweg (Konstanz University of Applied Sciences) Heri Ramampiaro (Norwegian University of Science and Technology) Martin Boldt (Blekinge Institute of Technology) Michael McGuire (Towson University) Olaf M. Maennel (Tallinn University of Technology) Pavel Gladyshev (Dublin School of Computer Science) Pierre Lison (Norwegian Computing Centre) *** PAPER SUBMISSION *** Our workshop invites authors to submit: full-length papers (up to ten pages), short papers (up to six pages) or abstract papers (up to three pages) through the online submission system: https://wi-lab.com/cyberchair/2017/bigdata17/scripts/submitform.php?subarea… Papers have to follow the IEEE 2-column format and the Computer Society Proceedings Manuscript Formatting Guidelines. See formatting instructions here: https://www.ntnu.edu/iik/digital_forensics/ieee-bigdata-2017-formatting-ins… *** BEST PAPERS *** Selected papers are nominated for submission to “Special Issue on Cyber Threat Intelligence and Analytics”. Extended papers should have at least 60% of new material and will be sent through a review process to ensure the quality of contributions. *** CONTACTS*** If you have any questions, do not hesitate to contact Andrii Shalaginov (andrii.shalaginov(a)ntnu.no) and Jan William Johnsen (jan.w.johnsen(a)ntnu.no) Best regards, Andrii Shalaginov, on behalf of Katrin Franke and Jan William Johnsen Norwegian University of Science and Technology, Gjøvik, Norway

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GraMSec 2017 - last call for participation
by Barbara Kordy 04 Aug '17

04 Aug '17

****************************************************************** GraMSec 2017 The Fourth International Workshop on Graphical Models for Security Co-located with CSF 2017 Santa Barbara, CA, USA - August 21, 2017 http://gramsec.uni.lu/ ****************************************************************** ABOUT GraMSec Graphical security models provide an intuitive but systematic methodology to analyze security weaknesses of systems and to evaluate potential protection measures. Such models have been subject of academic research and they have also been widely accepted by the industrial sector, as a means to support and facilitate threat analysis and risk assessment processes. The objective of GraMSec is to contribute to the development of well-founded graphical security models, efficient algorithms for their analysis, as well as methodologies and tools for their practical usage. PROGRAM 8:45 – 10:00 INVITED TALK Dr. Anoop Singhal, NIST Security Metrics and Risk Analysis for Enterprise Systems 10:00 – 10:35 BREAK (eclipse + coffee) 10:35 – 12:35 SESSION 1: Security Modeling 10:35 – 11:15 (regular paper) Dan Ionita, Margaret Ford, Alexandr Vasenev, and Roel Wieringa Graphical Modeling of Security Arguments: Current State and Future Directions 11:15 – 11:35 (short paper) Brian Ruttenberg, Dave Blumstein, Jeff Druce, Michael Howard, Fred Reed, Leslie Wilfong, Crystal Lister, Steve Gaskin, Meaghan Foley, and Dan Scofield Probabilistic Modeling of Insider Threat Detection Systems 11:35 – 12:15 (regular paper) Angèle Bossuat and Barbara Kordy Evil Twins: Handling Repetitions in Attack–Defense Trees - A Survival Guide 12:15 – 12:35 (short paper) Letitia Li, Florian Lugou, and Ludovic Apvrille Security Modeling for Embedded System Design 12:40 – 14:00 LUNCH 14:00 – 15:40 SESSION 2: Risk Analysis 14:00 – 14:40 (regular paper) Karin Bernsmed, Christian Frøystad, Per Håkon Meland, Dag Atle Nesheim, and Ørnulf Jan Rødseth Visualizing Cyber Security Risks with Bow-Tie Diagrams 14:40 – 15:20 (regular paper) Aitor Couce-Vieira, Siv Hilde Houmb, and David Ríos-Insua CSIRA: A Method for Analysing the Risk of Cybersecurity Incidents 15:20 – 15:40 (short paper) Ryan Habibi, Jens Weber, and Morgan Price Circle of Health Based Access Control for Personal Health Information Systems 15:40 – 16:10 BREAK 16:10 – 17:10 SESSION 3: Attack Trees 16:10 – 16:50 (regular paper) Peter Gjøl Jensen, Axel Legay, Kim Guldstrand Larsen, and Danny Bøgsted Poulsen Quantitative Evaluation of Attack Defense Trees using Stochastic Timed Automata 16:50 – 17:10 (short paper) Olga Gadyatskaya and Rolando Trujillo-Rasua New Directions in Attack Tree Research: Catching up with Industrial Needs GraMSec REGISTRATION IS NOW OPEN To register please follow the instructions given at http://www.gramsec.uni.lu/registration.php If you need a visa support letter, please check http://csf2017.tecnico.ulisboa.pt/visa.html GENERAL CHAIR Sjouke Mauw, University of Luxembourg, Luxembourg PROGRAM COMMITTEE CO-CHAIRS Ketil Stølen, SINTEF Digital and University of Oslo, Norway Peng Liu, Pennsylvania State University, USA CONTACT For inquiries please send an e-mail to gramsec17(a)easychair.org

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The 2017 ICDM Workshop on Data Science and Big Data Analytics (DSBDA 2017)
by ICT DataScience 04 Aug '17

04 Aug '17

The 5th ICDM Workshop on Data Science and Big Data Analytics (DSBDA 2017) [http://www.bigdatalab.ac.cn/~dsbda/2017/] In conjunction with The IEEE International Conference on Data Mining (ICDM 2017) [http://icdm2017.bigke.org/] New Orleans, USA · November 18, 2017 Introduction ================ Due to the rapid development of IT technology including Internet, Cloud Computing, Mobile Computing, and Internet of Things, as well as the consequent decrease of cost on collecting and storing data, big data has been generated from almost every industry and sector as well as governmental department. The volume of big data often grows exponentially or even in rates that overwhelm the well-known Moore’s Law. Meanwhile, big data has been extended from traditional structured data into semi-structured and completely unstructured data of various types, such as text, image, audio, video, click streams, log files, etc. It is no doubt that big data can offer us unprecedented opportunities. However, it also poses many grand challenges. Due to the massive volume and inherent complexity, it is extremely difficult to store, aggregate, manage, and analyze big data and finally mine valuable information/knowledge from the complex data/information networks. Therefore, in the presence of big data, the theories, models, algorithms and methods of traditional data related fields, such as, data mining, data engineering, machine learning, statistical learning, computer programming, pattern recognition and learning, visualization, uncertainty modeling, and high performance computing etc., become no longer effective and efficient. On the other hand, some data is generated exponentially or super-exponentially in a streaming manner. Therefore, how to delicately analyze and deeply understand big data so as to obtain dynamical and incremental information / knowledge, is a grand challenge. In general, at the era of big data, it is expected to develop new theories, models, algorithms, methods, and paradigms for mining, analyzing, and understanding big data, and even a new inter-discipline, Data Science, for studying the perception, acquisition, transportation, storage, management, analysis, visualization, and applications of big data, and finally implement the transformation from data to knowledge. DSBDA 2017 aims to provide a networking venue that will bring together scientists, researchers, professionals, and practitioners from both industry and academia and from different disciplines (including computer science, social science, network science, etc.) to exchange ideas, discuss solutions, share experiences, promote collaborations, and report state-of-the-art research work on various aspects of data science and big data analytics. Topics ================ The topics of interest include, but are not limited to: * Data science and data analytics * Acquisition, representation, indexing, storage, and management of big data * Processing, pre-processing, and post-processing of big data * Models, algorithms, and methods for big data mining and understanding * Knowledge discovery and acquisition from big data * Visualizing analytics and organization for big data * Streaming data processing * Context data mining from big Web data * Social computing over big Web data * Industrial and scientific applications of big data * Tools for big data analytics Submissions ================ The page limit of workshop papers is 8 pages in the standard IEEE 2-column format (http://www.ieee.org/conferences_events/conferences/publishing/ templates.html), including the bibliography and any possible appendices. All papers must be formatted according to the IEEE Computer Society proceedings manuscript style, following IEEE ICDM 2017 submission guidelines available at http://icdm2017.bigke.org/. Papers should be submitted in PDF format, electronically, using the CyberChair submission system: https://wi-lab.com/cyberchair/2017/icdm17/scripts/submit. php?subarea=SP04&undisplay_detail=1&wh=/cyberchair/2017/ icdm17/scripts/ws_submit.php. Note that all accepted papers will be included in the IEEE ICDM 2017 Workshops Proceedings volume published by IEEE Computer Society Press, and will also be included in the IEEE Xplore Digital Library. The workshop proceedings will be in a CD separated from the CD of the main conference. The CD is produced by IEEE Conference Publishing Services (CPS). Therefore, papers must not have been accepted for publication elsewhere or be under review for another workshop, conferences or journals. Important Dates ================ Submissions Due Date: August 7, 2017 Notifications of Acceptance: September 7, 2017 Camera-Ready Deadline: September 15, 2017 Workshop Date: November 18, 2017 Steering Committee =================== Prof. Benjamin W. Wah, Chinese University of Hong Kong, China Prof. Jinpeng Huai, Beihang University, China Prof. Xueqi Cheng, Institute of Computing Technology, Chinese Academy of Sciences, China Workshop Chairs ================ Dr. Xiaolong Jin Institute of Computing Technology, Chinese Academy of Sciences (CAS), China Email: jinxiaolong(a)ict.ac.cn Dr. Jiafeng Guo Institute of Computing Technology, Chinese Academy of Sciences (CAS), China Email: guojiafeng(a)ict.ac.cn Dr. Huewei Shen Institute of Computing Technology, Chinese Academy of Sciences (CAS), China Email: shenhuawei(a)ict.ac.cn

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[Deadline Extended] - BI 2017 - Call for Abstracts
by Yang 03 Aug '17

03 Aug '17

[Apologies if you receive this more than once] CALL FOR ABSTRACTS The 2017 International Conference on Brain Informatics (BI'17) "Investigating the Brain and Mind from Informatics Perspective" November 16-18, 2017, Beijing, China Homepage: http://bii.ia.ac.cn/bi-2017/ --------------------------------------- SUBMISSION DEADLINE: August 30, 2017 One-line submission: https://wi-lab.com/cyberchair/2017/bi17/scripts/submit.php?subarea=B --------------------------------------- *** INVITED SPEECHES *** 1. "Multimodal Modelling of Network Propagation of Neuropathology in Dementia" Alan Evans (McGill University, Canada) 2. "Neural Correlates of Word, Sentence and Story Comprehension" Tom Mitchell (Carnegie Mellon University, US) 3. "The Cognitive Neural Basis of Object Knowledge" Yanchao Bi (Beijing Normal University, China) 4. "Harnessing Large-Scale Data-Sharing to Drive Discovery and Bench-to-Bedside Translation in Traumatic Brain Injury and Spinal Cord Injury" Adam Ferguson (University of California San Francisco, US) 5. "Computational Psychophysiology Based Research Methodology for Mental Health" Bin Hu (Lanzhou University, China) 6. "Multiscale Gene Expression Signatures in the Mammalian Brain in Health and Disease" Michael Hawrylycz (Allen Institute for Brain Science, US) 7. "Machine Learning in Medical Imaging Analysis" Dinggang Shen (University of North Carolina at Chapel Hill, US) *** WORKSHOPS AND SPECIAL SESSIONS *** ++++++++++++++++++++++++++++++++++++++++++++ Abstract submission (TYPE II) is still open! ++++++++++++++++++++++++++++++++++++++++++++ To submit abstracts to workshops/special sessions, please visit http://bii.ia.ac.cn/bi-2017/workshops.htm # Workshop on Brain and Artificial Intelligence (BAI 2017) Organizers: Yi Zeng, Chinese Academy of Sciences, China Shuliang Wang, Beijing Institute of Technology, China # Workshop on Knowledge Representation: Brain and Machine (KRBM 2017) Organizers: Yanchao Bi, Beijing Normal University, China Yi Zeng, Chinese Academy of Sciences, China # Workshop on Affective, Psychological and Physiological Computing (APPC 2017) Organizers: Bin Hu, Lanzhou University, China Zhijun Yao, Lanzhou University, China Mi Li, Beijing University of Technology, China # Workshop on Big Data and Visualization for Brainsmatics (BDVB 2017) Organizers: Qingming Luo, Huazhong University of Science and Technology, China Anan LI, Huazhong University of Science and Technology, China # Workshop on Brain Big Data Based Wisdom Service (BBDBWS 2017) Organizer: Jiajin Huang, Beijing University of Technology, China # Workshop on Semantic Technology for eHealth (STeH 2017) Organizers: Jiao Li, Chinese Academy of Medical Sciences, China Zhisheng Huang, Vrije University Amsterdam, The Netherlands # Workshop on Big Data Neuroimaging Analytics for Brain and Mental Health (BDNABMH 2017) Organizer: Shouyi Wang, University of Texas at Arlington, USA # Workshop on Novel Methods of the Brain Imaging in the Clinical and Preclinical Neuroscience (NMBICPN 2017) Organizers: Vassiliy Tsytsarev, University of Maryland School of Medicine, USA Vicky Yamamoto, Keck School of Medicine of USC, USA Yan Li, University of Southern Queensland, Australia # The 1st International Workshop on Deep Learning in Brain MRI and Pathology Images (DLBMPI 2017) Organizers: Yan Xu, School of Biological Science and Medical Engineering, BUAA Eric Chang, Microsoft Research Asia # Workshop on Mesoscopic Brainformatics (MBAI 2017) Organizers: Dezhong Yao, University of Electronic Science and Technology of China, China Pedro A. Valdes-Sosa, University of Electronic Science and Technology of China, China Yong He, Beijing Normal University, China Li Dong, University of Electronic Science and Technology of China, China # Special Session on Brain Informatics in Neurogenetics (BIN 2017) Organizers: Hong Liang, Harbin Engineering University, China Lei Du, Northwestern Polytechnical University, China Li Shen, Indiana University School of Medicine, USA # Special Session on BigNeuron Project (BP 2017) Organizers: Zhi Zhou, Allen Institute for Brain Sciences, USA Min Liu, Hunan University, China ================================================== Brain Informatics (BI) conference series provides a premier forum to bring together researchers and practitioners in the fields of neuroscience, cognitive science, computer science, data science, artificial intelligence, information communication technologies, and neuroimaging technologies. BI'17 addresses the computational, cognitive, physiological, biological, physical, ecological and social perspectives of brain informatics, as well as topics relating to mental health and well-being. It also welcomes emerging information technologies, including but not limited to Internet/Web of Things (IoT/WoT), cloud computing, big data analytics and interactive knowledge discovery related to brain research. BI'17 also encourages submissions that explore how advanced computing technologies are applied to and make a difference in various large-scale brain studies and their applications. BI'17 welcomes paper submissions (full paper and abstract submissions). Both research and application papers are solicited. All submitted papers will be reviewed on the basis of technical quality, relevance, significance and clarity. Accepted full papers will be included in the proceedings by Springer LNCS/LNAI. Workshop, Special-Session and Tutorial proposals, and Industry/Demo-Track papers are also welcome. The organizers of Workshops and Special-Sessions are invited to prepare a book proposal based on the topics of the workshop/special session for possible book publication in the Springer-Nature Brain Informatics & Health book series (http://www.springer.com/series/15148) *** Topics and Areas *** Track 1: Cognitive and Computational Foundations of Brain Science Track 2: Investigations of Human Information Processing Systems Track 3: Brain Big Data Analytics, Curation and Management Track 4: Informatics Paradigms for Brain and Mental Health Track 5: Brain-Inspired Intelligence and Computing IMPORTANT DATES : =========================== May 1, 2017: Submission deadline for full papers June 20, 2017: Notification of full paper acceptance July 20, 2017: Submission deadline for workshop/special-session papers August 30, 2017: Submission deadline for abstracts (TYPE-II) (for both main conference and workshops/special sessions) November 16, 2017: Tutorials, workshops and special-sessions November 17-18, 2017: Main conference ABSTRACT (TYPE-II) SUBMISSIONS : ================================= (Submission Deadline: August 30, 2017): Abstracts have a word limit of 500 words. Experimental research is particularly welcome. Accepted abstract submissions will be included in the conference program, and will be published as a single, collective proceedings volume. Title: Include in the title of the abstract all words critical for a subject index. Write your title in sentence case (first letter is capitalized; remaining letters are lower case). Do not bold or italicize your full title. Author: List all authors who contributed to the work discussed in the abstract. The presenting author must be listed in the first author slot of the list. Be prepared to submit contact information as well as conflict of interest information for each author listed. Abstract: Enter the body of the abstract and attach any applicable graphic files or tables here. Do not re-enter the title, author, support, or other information that is collected in other steps of the submission form. Presentation Preference: Authors may select from three presentation formats when submitting an abstract: "poster only", "talk preferred" or "no preference." The "talk preferred" selection indicates that you would like to give a talk, but will accept a poster format if necessary. Marking "poster only" indicates that you would not like to be considered for an oral-presentation session. Selecting "no preference" indicates the author's willingness to be placed in the best format for the program. Each paper or abstract requires one sponsoring attendee (i.e. someone who registered and is attending the conference). A single attendee can not sponsor more than two abstracts or papers. Oral presentations will be selected from both full length papers and abstracts. ----------------------------------------------- One-line submission: https://wi-lab.com/cyberchair/2017/bi17/scripts/submit.php?subarea=B ----------------------------------------------- *** Post-Conference Journal Publication *** The Brain Informatics conferences have the formal ties with Brain Informatics journal (Springer-Nature, http://www.springer.com/40708) Accepted abstracts from the conference will be expanded and revised for possible inclusion in the Brain Informatics journal each year. It is fully sponsored and no any article-processing fee charged for authors of Brain Informatics conference. ORGANIZERS ========== General Chairs Bo Xu (Chinese Academy of Sciences, China) Hanchuan Peng (Allen Institute for Brain Sciences, USA) Qingming Luo (Huazhong University of Science and Technology, China) Program Committee Chairs Yi Zeng (Chinese Academy of Sciences, China) Yong He (Beijing Normal University, China) Jeanette Kotaleski (Karolinska Institute, Sweden) Maryann Martone (University of California, San Diego, USA) Organizing Chairs Ning Zhong (Maebashi Institute of Technology, Japan, and Beijing Advanced Innovation Center for Future Internet Technology, Beijing University of Technology, China Jianzhou Yan (Beijing Advanced Innovation Center for Future Internet Technology, Beijing University of Technology, China) Shengfu Lu (Beijing Advanced Innovation Center for Future Internet Technology, Beijing University of Technology, China) Workshop/Special-Session Chairs An'an Li (Huazhong University of Science and Technology, China) Sen Song (Tsinghua University, China) Tutorial Chair Wenming Zheng (South East University, China) Publicity Chairs Tielin Zhang (Chinese Academy of Sciences, China) Shouyi Wang (University of Texas at Arlington, USA) Yang Yang (Maebashi Institute of Technology, Japan, and Beijing Advanced Innovation Center for Future Internet Technology, Beijing University of Technology, China) Steering Committee Chairs Ning Zhong (Maebashi Institute of Technology, Japan) Hanchuan Peng (Allen Institute for Brain Science, USA) *** Contact Information *** tielin.zhang(a)ia.ac.cn shouyiw(a)uta.edu yang(a)maebashi-it.org

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Research Fellow Position at NTU-Delta Corporate Lab
by Tan Rui (Asst Prof) 03 Aug '17

03 Aug '17

A Research Fellow position is immediately available at the Nanyang Technological University (NTU). This position is part of a corporate lab initiative involving NTU and Delta Electronics, a leading electronics manufacturing company. Successful candidate will conduct research to improve the resilience of industrial Cyber-Physical Systems and Internet of Things against dynamic environment conditions and cyber-attacks. The candidate should have obtained a PhD degree in computer science or computer engineering (or relevant disciplines) and demonstrated strong research ability by publications on prestigious venues in the areas of sensor networks, cyber-physical systems, and/or security. The candidate is expected to have good hands-on and programming skills. Knowledge and experiences with industrial systems are strong pluses. The candidate will work with a team of five researchers, multiple NTU faculty members and Delta engineers. The position will provide an excellent opportunity to perform both basic and translational research in close collaboration with industry. Other advantages of the position include: (1) stable multi-year fund subject to satisfactory performance, (2) various opportunities in Singapore's strategic cyber resilience research cluster, e.g., Temasek Fellowship (http://www3.ntu.edu.sg/trf/index_trf.html) (3) high-quality living and low tax rates in Singapore. Interested candidates can send CV with full publication list to Dr. Rui Tan at tanrui(a)ntu.edu.sg Project Overview: Computer systems that control physical environments like manufacturing processes, known as Cyber-Physical Systems (CPS), have transformed significantly. Due to device proliferation and large-scale connectivity, a variety of functionalities are now feasible in CPS. However, connectivity also means that these systems operate in unreliable open environments, and hence resiliency to faults (reliability), malfunctions (safety) and attacks (security) become important. This resiliency is fundamentally dependent on the resiliency of the cyber-infrastructure of CPS (communication network and computation nodes), which plays a central role of data delivery and execution of control. The objective of this project is to design a resilient cyber-infrastructure for such emerging CPS. The project will design and prototype a resilient cyber-infrastructure including hardware platforms, middleware solutions and communication protocols. The developed solutions are expected to be used in real industrial systems. ________________________________ CONFIDENTIALITY: This email is intended solely for the person(s) named and may be confidential and/or privileged. If you are not the intended recipient, please delete it, notify us and do not copy, use, or disclose its contents. Towards a sustainable earth: Print only when necessary. Thank you.

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Final CFP - IEEE International Symposium on Parallel and Distributed Processing with Applications
by Peter Mueller 02 Aug '17

02 Aug '17

=============================================================================== Final Call for Papers for the 15th IEEE International Symposium on Parallel and Distributed Processing with Applications (IEEE ISPA 2017) =============================================================================== Paper Submission Deadline extended to August 15, 2017 (Firm Deadline) ***One of China Computer Federation (CCF) Class "C" Conferences*** Organizers: Guangzhou University, China Central South University, China Sponsors: IEEE, IEEE Computer Society and IEEE TCSC. Venue & Dates: Guangzhou, China, December 12-15, 2017 http://trust.gzhu.edu.cn/conference/ISPA2017/ Co-Located Conferences: (1) The 16th IEEE International Conference on Ubiquitous Computing and Communications (IEEE IUCC 2017) http://trust.gzhu.edu.cn/conference/IUCC2017/ (2) The 10th International Conference on Security, Privacy and Anonymity in Computation, Communication and Storage (SpaCCS 2017) http://trust.gzhu.edu.cn/conference/SpaCCS2017/ ------------------------------------------------------------------------------- Keynote Speeches Section You are welcome to attend 11+ Keynote Speeches Shared by Co-Located IEEE ISPA 2017 & IEEE IUCC 2017 & SpaCCS 2017 Conferences: http://trust.gzhu.edu.cn/conference/ISPA2017/KeynoteSpeeches.htm Keynote Speaker 1: Prof. Geoffrey Fox, Indiana University, USA (Fellow of APS (Physics) and Fellow of ACM (Computing)) https://www.soic.indiana.edu/all-people/profile.html?profile_id=203 Title: Next Generation Grid: Integrating Parallel and Distributed Computing Runtimes from Cloud to Edge Applications Keynote Speaker 2: Prof. Lajos Hanzo, University of Southampton, UK (Fellow of the Royal Academy of Engineering of UK, Fellow of the IEEE, Fellow of the IEE/IET) http://www-mobile.ecs.soton.ac.uk/newcomms/?q=people/lh Title: Quantum-Search Algorithms, Quantum Codes and All That... Keynote Speaker 3: Prof. Azzedine Boukerche, University of Ottawa, Canada (Fellow of the IEEE, Fellow of the Canadian Academy of Engineering, Fellow of the Engineering Institute of Canada, Fellow of the American Association for the Advancement of Science) http://www.site.uottawa.ca/~boukerch/ Title: Autonomous and Connected Vehicles: A New Challenge for Smart Cities Keynote Speaker 4: Prof. Jie Wu, Temple University, USA (IEEE Fellow) https://cis.temple.edu/~wu/ Title: Optimizing MapReduce Framework through Joint Scheduling of Overlapping Phases Keynote Speaker 5: Prof. Robert Deng, Singapore Management University, Singapore (IEEE Fellow) http://www.mysmu.edu/faculty/robertdeng/ Title: Privacy-Preserving Access Control and Computations of Encrypted Data in the Cloud Keynote Speaker 6: Prof. Ljiljana Trajkovic, Simon Fraser University, Canada (IEEE Fellow) http://www.ensc.sfu.ca/~ljilja Title: Data Mining and Machine Learning for Analysis of Network Traffic Keynote Speaker 7: Professor Kin K. Leung, Imperial College London, UK (IEEE Fellow) http://www.commsp.ee.ic.ac.uk/~kkleung/ Title: TBD. Keynote Speaker 8: Prof. Vijay Varadharajan, The University of Newcastle, Australia (FIEE, FBCS, FACS, FIEAust, FIMA) https://www.newcastle.edu.au/profile/vijay-varadharajan Title: Security Challenges in Software Defined Networks Policy based Security Architecture for Software Defined Networks Keynote Speaker 9: Prof. Hai Jin, Huazhong University of Science and Technology, China (Cheung Kung Scholars Chair Professor, Fellow of the CCF) http://www.linkedin.com/in/jinhust Title: Towards Dataflow-based Graph Accelerator Keynote Speaker 10: Prof. Jianhua Ma, Hosei University, Japan http://cis.k.hosei.ac.jp/~jianhua/mahome/ Title: TBD. Keynote Speaker 11: Prof. Jinjun Chen, Swinburne University of Technology, Australia http://www.swinflow.org/~jchen/ Title: Big Data - Big Application * More keynote speakers will be added later. ------------------------------------------------------------------------------- Special Issues Section Distinguished papers, after further revisions, will be published in 14+ SCI&EI indexed special issues (confirmed): (1) IEEE Transactions on Industrial Informatics (SCI&EI Indexed, Impact Factor: 4.79) http://tii.ieee-ies.org/ (2) IEEE Transactions on Emerging Topics in Computing (SCI&EI Indexed, Impact Factor: to appear soon) https://www.computer.org/web/tetc (3) IEEE Access (SCI&EI Indexed, Impact Factor: 1.270) http://ieeeaccess.ieee.org/ (4) Information Sciences - Elsevier (SCI&EI Indexed, Impact Factor: 3.364) http://www.journals.elsevier.com/information-sciences/ (5) Future Generation Computer Systems - Elsevier (SCI&EI Indexed, Impact Factor: 2.430) http://www.journals.elsevier.com/future-generation-computer-systems/ (6) Cluster Computing - Springer (SCI&EI Indexed, Impact Factor: 1.514) http://link.springer.com/journal/10586 (7) Multimedia Tools and Applications - Springer (SCI&EI Indexed, Impact Factor: 1.331) https://link.springer.com/journal/11042 (8) Journal of Parallel and Distributed Computing - Elsevier (SCI&EI Indexed, Impact Factor: 1.320) http://www.journals.elsevier.com/journal-of-parallel-and-distributed-comput… (9) Concurrency and Computation: Practice and Experience - Wiley (SCI&EI Indexed, Impact Factor: 0.94) http://www.cc-pe.net/journalinfo/ (10) Security and Communication Networks - Hindawi (SCI&EI Indexed, Impact Factor: 0.806) https://www.hindawi.com/journals/scn/ (11) Future Internet - MDPI (ESCI & EI Indexed) http://www.mdpi.com/journal/futureinternet (12) International Journal of Computational Science and Engineering (IJCSE) - INDERSCIENCE (ESCI & EI Indexed) http://www.inderscience.com/jhome.php?jcode=IJCSE (13) International Journal of Embedded Systems (IJES) - INDERSCIENCE (EI Indexed) http://www.inderscience.com/jhome.php?jcode=IJES (14) International Journal of High Performance Computing and Networking (IJHPCN) - INDERSCIENCE (EI Indexed) http://www.inderscience.com/jhome.php?jcode=ijhpcn * More special issues will be added later. ------------------------------------------------------------------------------- Introduction: The IEEE ISPA 2017 (15th IEEE International Symposium on Parallel and Distributed Processing with Applications) is a forum for presenting leading work on parallel and distributed computing and networking, including architecture, compilers, runtime systems, applications, reliability, security, parallel programming models and much more. During the symposium, scientists and engineers in both academia and industry are invited to present their work on concurrent and parallel systems (multicore, multithreaded, heterogeneous, clustered systems, distributed systems, grids, clouds, and large scale machines). The 15th IEEE ISPA follows the tradition of previous successful IEEE ISPA conferences in the years from 2003 to 2016 in Asia, Europe, Australia and North America. It will feature sessions of regular presentations, workshops, tutorials and keynote speeches. IEEE ISPA 2017 is sponsored by the IEEE Technical Committee on Scalable Computing (TCSC) and the IEEE Computer Society. IEEE ISPA 2017 is particularly interested in research addressing heterogeneous computing with the use of accelerators, mobile computing, approximate computing, tools and methodologies to improve the quality of parallel programming and applying generic computing approaches to networks, in particular Software Defined networking and its applications. Scope and Interests (1) Systems and Architectures Track Cloud computing and data center technology Migration of computations Multi-clouds environments, cloud federation, interoperability Energy management and Green Computing Wireless and mobile networks Internet of Things (IoT) Social Networks, crowdsourcing, and P2P systems (2) Technologies and Tools Track Building block processors: FPGA, multicore, GPU, NoC, SoC Parallel and distributed algorithms Tools/environments for parallel/distributed software development Novel parallel programming paradigms Programming models for cloud services and applications Code generation and optimization Compilers for parallel computers Middleware and tools Scheduling and resource management Performance simulations, measurement, and evaluations Reliability, fault tolerance, dependability, and security (3) Applications Track High-performance scientific and engineering computing Grid and cluster computing Pervasive and ubiquitous computing Databases, data mining, and data management Big data and business analytics Scientific cloud systems and services Internet computing and web services Application scenarios of IoT and ubiquitous computing Experience with computational, workflow and data-intensive applications Software Defined Networks and its applications Submission and Publication Information: All papers need to be submitted electronically through the conference website (https://easychair.org/conferences/?conf=ispa2017) with PDF format. Submitted papers must not substantially overlap with papers that have been published or that are simultaneously submitted to a journal or a conference with proceedings. Papers must be clearly presented in English, must not exceed 8 pages (or up to 12 pages with the pages over length charge), including tables, figures, references and appendixes, in IEEE Computer Society proceedings Format ( http://www.ieee.org/conferences_events/conferences/publishing/templates.html ) with Portable Document Format (.pdf). Papers will be selected based on their originality, timeliness, significance, relevance, and clarity of presentation. Submission of a paper should be regarded as a commitment that, should the paper be accepted, at least one of the authors will register and attend the conference to present the work. Accepted and presented papers will be included in the IEEE CPS Proceedings. Distinguished papers presented at the conference, after further revision, will be recommended to high quality international journals. Important Dates: Paper Submission Deadline: August 15, 2017 (Extended Firm Deadline) Author Notification: September 15, 2017 Camera-Ready Paper Due: October 15, 2017 Conference Dates: December 12-15, 2017 General Chairs: Qinghua Zheng, Xi'an Jiaotong University, China Albert Zomaya, University of Sydney, Australia Azzedine Boukerche, University of Ottawa, Canada Program Chairs: Geoffrey Fox, Indiana University, USA Gregorio Martinez, University of Murcia, Spain Guojun Wang, Guangzhou University, China Program Vice Chairs: (1) Systems and Architectures Track Jinjun Chen, University of Technology Sydney (UTS), Australia Qing Yang, Montana State University, USA (2) Technologies and Tools Track Julien Bourgeois, Universit¨¦ de Franche-Comt¨¦, France Gang Pan, Zhejiang University, China (3) Applications Track Javid Taheri, Karlstad University, Sweden Weigang Li, University of Brasilia, Brazil Steering Chairs: Minyi Guo, Shanghai Jiao Tong University, China Laurence T. Yang, St. Francis Xavier University, Canada Program Committee Members Please check the conference website for detail. Workshop Chairs Karl Andersson, Lulea University of Technology, Sweden Habib M. Ammari, Norfolk State University, USA Shui Yu, Deakin University, Australia Andy Li, University of Florida, USA Publicity Chairs: Peter Mueller, IBM Zurich Research Laboratory, Switzerland Mianxiong Dong, Muroran Institute of Technology, Japan Wenbin Jiang, Huazhong University of Science and Technology, China Publication Chair: Fang Qi, Central South University, China Registration Chair: Pin Liu, Central South University, China Organizing Chairs: Dongqing Xie, Guangzhou University, China Shuhong Chen, Guangzhou University, China Xiaofei Xing, Guangzhou University, China Webmaster: Dacheng Meng, Central South University, China Contact: Please email inquiries concerning IEEE ISPA 2017 to: Prof. Guojun Wang: csgjwang AT gmail DOT com and the conference organizers (ISPA2017Guangzhou AT gmail DOT com). Prof. Guojun Wang's Homepage: http://trust.gzhu.edu.cn/faculty/~csgjwang/ -------------------------------------------------------------------------------

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Machine Learning positions and PhD studentships available now
by Peter Bentley 31 Jul '17

31 Jul '17

FULL-TIME POSITIONS, PHD STUDENTSHIPS, & CONSULTANCY OPPORTUNITIES AT BRAINTREE LTD, LONDON, UK Braintree is looking to hire exceptional talent in machine learning immediately. The company encourages imaginative applicants who may wish a career in the development of innovative AI solutions. We have opportunities for: Data Scientists and Software Developers ======================================= You will join a dynamic team of developers and researchers who are leading the way in applied machine learning. You have the opportunity to tackle real problems and build systems in a range of domains, including: 1. retail (clustering/customer segmentation in large datasets) 2. fault prediction (large-scale multi variate analysis in time series data) 3. semantic networks of research papers (text/concept mining) 4. graph-native machine learning tools Essential qualifications and skills: + Degree in machine learning or related discipline (MSc and PhD preferred). + JAVA / C / Python to high standard + Quick learner + Good communication + Creative, independent, motivated, proactive + Experienced in machine learning Good to have experience in one or more of: + Statistical analysis of large datasets + Machine learning for big data + Neural networks, genetic algorithms, deep learning + Clustering (K-Means, SOM) + Natural language processing (Text mining) + Graph database (Neo4j) + Novel hardware, optimised architectures + User interface design Senior and junior positions available now. To apply, send your CV to p.bentley(a)cs.ucl.ac.uk or p.bentley(a)braintree.com, with Subject: Braintree Job Enquiry PhD Studentships ================ Braintree is offering full UK/EU funding for 3 PhD students in machine learning. Applicants should meet the entry requirements for UCL CS PhD programmes. Projects are available in the following areas: + graph-native machine learning + parallel architectures / optimised hardware for machine learning + analysis/visualisation of massive graphs + agent-based modelling + novel machine learning algorithm development + affective computing / social robots (other topics may be considered) Candidates must hold or expect to hold a UK first or upper second class honours degree, or equivalent qualification, in a discipline relevant to the project. Candidates will normally have relevant research experience gained through their Bachelor’s degree course, a Masters or work experience. At least two satisfactory academic or relevant work placement/employment references will be required. Students in receipt of a studentship offer will need to provide acceptable proof of legal right to study in the UK and satisfy the current requirements of UK Visa and Immigration. The offer of a Braintree studentship does not automatically confer an offer by UCL, whose application process must be followed in full. To apply, send your CV to p.bentley(a)cs.ucl.ac.uk or p.bentley(a)braintree.com, with Subject: Braintree PhD Studentship Enquiry Consultancy =========== Braintree needs expertise from world-class brains. If you are currently a PhD student, a postdoc researcher, or a member of academic staff, and you wish to have a side income by helping industry with their machine learning problems, Braintree will pay for your time as a consultant. If you can spare a couple of hours a week or a couple of days a month, you will also gain valuable real-world experience and make great contacts. Roles may optionally include travel to Europe, all expenses paid. We need consultants who have expertise in one or more of: + Machine learning for big data + Neural networks, genetic algorithms, deep learning + Natural language processing, Text Mining + Data architectures + Data Modelling for Graph databases (Neo4j) + Networking, server specification and setup + Large scale system architectures Applicants must be able to demonstrate expertise in their area with at least three recent publications in recognised international conferences or journals, and/or have more than 5 years work experience in a recognised centre of excellence. To apply, send your CV to p.bentley(a)cs.ucl.ac.uk or p.bentley(a)braintree.com, with Subject: Braintree Consultancy Enquiry ABOUT BRAINTREE LTD: ================== Braintree Ltd www.braintree.com <http://www.braintree.com/> is a Research and Development AI company based at 7 Gower St, London, UK (across the road from UCL). First created in 2002, it offers machine learning, optimisation, and analytics solutions to large multi-national organisations including governments, retailers, and the manufacturing industry. Since 2016, UCL researcher Peter Bentley has been CTO and Director of Braintree, bringing his UCL CS PhD students into the company, and forming close ties with UCL CS. Braintree has several contracts with industry and has just been awarded an Innovate UK grant to work with UCL CS on graph-based machine learning. The company has a culture of nurturing talent, encouraging personal growth, and allowing freedom for imaginative and creative problem-solvers. Come and join us!

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CFP: Special Issue on 'Software Defined Networking and Network Function Virtualization' in Scalable Computing and Communications (Springer)
by Javid Taheri 31 Jul '17

31 Jul '17

--------------------------------------------------------------------------------- Please accept our apologies if you receive multiple copies of this CFP --------------------------------------------------------------------------------- CALL FOR PAPERS Scalable Computing and Communications ~Special Issue Call for Papers~ Software Defined Networking and Network Function Virtualization IMPORTANT DATES: - Submission Deadline: 15 Dec 2017 - Notification of Acceptance: 31 March 2018 - Final Version: 31 May 2018 INTRODUCTION AND MOTIVATION With maturity of virtualization techniques, more and more services are to be run inside virtualized Data Centers vDCs) to further reduce Operational (OPEX) and Capital Expenditures (CAPEX). Aligned with the general trend of migrating traditional IT architectures to clouds (public or private), next generation of telecommunication networks such as 5G are also envisaged to be run on virtualized environments where network functions are deployed on virtual machines and/or containers instead of current proprietary equipment. Several proof-of-concept and initial industrial deployments proved that Software Defined Networking (SDN) and Network Function Virtualization (NFV) are two promising technologies to enable such technological shift. Nevertheless, how to optimize and guarantee the performance of such virtualized systems is still challenging, because they require accurate modelling and efficient optimization to satisfy ever increasing demand of future networks. To address several major issues raised by migrating network applications to virtualized infrastructures, this special issue aims to highlight challenges, state-of-the-art, and solutions to a set of currently unresolved key questions including, but not limited to: performance, modelling, optimizations, reliability, security, and techno-economic aspects of virtualized networks. By addressing these concerns, technology might be one step closer to understanding, and consequently, closing the gap between the performance of the next generation SDN/NFV-based networks and their current counterparts in proprietary boxes. In this special issue, we welcome contributions that can shed light onto any of the following questions: 1. How virtualized networks should be designed to guarantee the performance required by network operations? 2. How virtualized services can be benchmarked and/or compared? 3. How virtualized services should be designed and/or operated to take advantage of cloud infrastructures and further provide flexibilities (such as load migration) that current proprietary equipment cannot provide? 4. How network functions should be placed and/or network capacities should be sliced to optimize network critical metrics such as throughput, delay, jitter, etc.? 5. How virtualized services should/can be efficiently orchestrated, monitored, and managed? PAPER SUBMISSION: - Authors are encouraged to submit high-quality, original work that has neither appeared in, nor is under consideration by, other journals. - All papers will be reviewed following standard reviewing procedures for the Journal. - Papers must be prepared in accordance with the Journal guidelines: www.springer.com/41122 - Submit manuscripts to: http://SCAC.edmgr.com. Topics to be covered in this Special Issue are including, but not limited to: 1. Model, benchmark, and/or optimize operation of SDN/NFV-based networks and services. 2. Resource and/or content allocation for SDN/NFV-based networks and services. 3. Reliability and resiliency of SDN/NFV-based networks and services. 4. Dynamic/flexible construction and deployment of Service Function Chains using SDN/NFV technologies. 5. Fault detection and/or correction for SDN/NFV-based networks and services. 6. Architectures, applications, and use cases of SDN/NFV to provide networking services. 7. Monitoring techniques for SDN/NFV-based networks and services. 8. Deployment, management, and orchestration of SDN/NFV-based networks and services. 9. Business/economic aspects of SDN/NFV-based networks and services. 10. Security concerns of SDN/NFV-based networks and services. 11. Mobile and/or Wireless Networks enabled by SDN/NFV-based networks and services.

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CFP: 3rd Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC 2017) at SC17: Extended abstracts due Sept. 1
by Jason D. Bakos 29 Jul '17

29 Jul '17

========================================================================== ** Call for Papers ** ========================================================================== Third International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC 2017) Held in conjunction with Supercomputing 2017 Friday Morning, November 17, 2017 Denver, CO http://h2rc.cse.sc.edu ========================================================================== Submission Deadline: September 1, 2017 (one page extended abstracts) ========================================================================== As conventional von-Neumann architectures are suffering from rising power densities, we are facing an era with power, energy efficiency, and cooling as first-class constraints for scalable HPC. FPGAs can tailor the hardware to the application, avoiding overheads and achieving higher hardware efficiency than general-purpose architectures. Leading FPGA manufacturers have recently made a concerted effort to provide a range of higher-level, easier to use high-level programming models for FPGAs. Such initiatives are already stimulating new interest within the HPC community around the potential advantages of FPGAs over other architectures. With this in mind, this workshop, now in its third year, brings together HPC and heterogeneous-computing researchers to demonstrate and share experiences on legacy and new high-level programming models, optimizations specific to scientific computing and data analytics, tools for performance/energy improvements, FPGA computing in the cloud, and popular applications for reconfigurable computing such as machine learning and big data. ========================================================================== Submissions (one page extended abstract): Submissions are solicited that explore the state of the art in the use of FPGAs in heterogeneous high-performance computing architectures and, at a system level, in data centers and supercomputers. FPGAs may be considered from either or both the distributed, parallel and composable fabric of compute elements or from their dynamic reconfigurability. We particularly encourage submissions which focus on the mapping of algorithms and applications to heterogeneous FPGA-based systems as well as the overall impact of such architectures on the compute capacity, cost, power efficiency, and overall computational capabilities of data centers and supercomputers. Submissions may report on theoretical or applied research, implementation case studies, benchmarks, standards, or any other area that promises to make a significant contribution to our understanding of heterogeneous high-performance reconfigurable computing and will help to shape future research and implementations in this domain. A non-comprehensive list of potential topics of interest is given below: 1. FPGAs in Supercomputer, Cloud and Data Center: FPGAs in relation to challenges to Cloud/Data Center/Supercomputing posed by the end of Dennard scaling 2. Supercomputing, Cloud and Data Center Applications: Exploiting FPGA compute fabric to implement critical cloud/HPC applications 3. Leveraging Reconfigurability: Using reconfigurability for new approaches to algorithms used in cloud/HPC applications 4. Benchmarks: Compute performance and/or power and cost efficiency for cloud/HPC with heterogeneous architectures using FPGAs 5. Implementation Studies: Heterogenous Hardware and Management Infrastructure 6. Programming Languages/Runtimes/OS/Tools/Frameworks for Heterogeneous High Performance Reconfigurable Computing 7. Future-gazing: New Applications/The Cloud Enabled by Heterogeneous High Performance Reconfigurable Computing, Evolution of Computer Architecture in relation to Heterogeneous High Performance Reconfigurable Computing 8. Community building: Standards, consortium activity, open source, education, initiatives to enable and grow Heterogeneous High Performance Reconfigurable Computing Prospective authors are invited to submit original and unpublished contributions as a ONE PAGE EXTENDED ABSTRACT in ACM SIG Proceedings format. ========================================================================== You can submit your contribution(s) through a link on the H2RC website: http://h2rc.cse.sc.edu ========================================================================== Important dates: Submission Deadline: September 1, 2017 Acceptance Notification: October 15, 2017 Camera-ready Manuscripts Due: November 4, 2017 Workshop Date: November 17, 2017 ========================================================================== Workshop Format: H2RC is a half-day Friday workshop. It will be comprised of Keynote and invited talks and talks selected from paper submissions. ========================================================================== Organizing Committee: Workshop Organizers: Michaela Blott, Xilinx Franck Cappello, Argonne National Lab Torsten Hoefler, ETH Zurich Jason D. Bakos, University of South Carolina Program Committee: Rizwan Ashraf, Oak Ridge National Laboratory Paul Chow, University of Toronto Carl Ebeling, Altera Hans Eberle, NVIDIA Alan George, University of Florida Christoph Hagleitner, IBM Miriam Leeser, Northeastern University Viktor Prasanna, Univ. of Southern California Marco Santambrogio, Politecnico Di Milano Jeffrey Vetter, Oak Ridge National Lab -- Jason D. Bakos, Ph.D. Professor Dept. of Computer Science and Engineering Univ. of South Carolina 301 Main St., Suite 3A01L Columbia, SC 29208 803-777-8627 (voice), 803-777-3767 (fax) http://www.cse.sc.edu/~jbakos jbakos(a)cse.sc.edu

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[Deadline extended to Aug. 13] - CFP: 12th Workflows in Support of Large-Scale Science (WORKS) Workshop
by Ilia Pietri 28 Jul '17

28 Jul '17

********** WORKS 2017 Workshop ********** Workflows in Support of Large-Scale Science Workshop http://works.cs.cardiff.ac.uk/ Monday 13 November 2017, Denver, Colorado, USA. Held in conjunction with SC17, http://sc17.supercomputing.org/ Paper submission deadline: 13 August 2017 ***************************************** Call For Papers Data-intensive workflows (a.k.a. scientific workflows) are routinely used in most scientific disciplines today, especially in the context of high-performance, parallel and distributed computing. They provide a systematic way of describing a complex scientific process and rely on sophisticated workflow management systems to execute on a variety of parallel and distributed resources. With the dramatic increase of raw data volume in every domain, they play an even more critical role to assist scientists in organizing and processing their data and to leverage HPC or HTC resources, being at the interface between end-users and computing infrastructures. This workshop focuses on the many facets of data-intensive workflow management systems, ranging from actual execution to service management and the coordination and optimization of data, service and job dependencies. The workshop covers a broad range of issues in the scientific workflow lifecycle that include: data-intensive workflows representation and enactment; designing workflow composition interfaces; workflow mapping techniques to optimize the execution of the workflow for different infrastructures; workflow enactment engines that need to deal with failures in the application and execution environment; and a number of computer science problems related to scientific workflows such as semantic technologies, compiler methods, scheduling and fault detection and tolerance. The topics of the workshop include but are not limited to: Big Data analytics workflows Data-driven workflow processing (including stream-based workflows) Workflow composition, tools, and languages Workflow execution in distributed environments (including HPC, clouds, and grids) Reproducible computational research using workflows Dynamic data dependent workflow systems solutions Exascale computing with workflows Workflow fault-tolerance and recovery techniques Workflow user environments, including portals Workflow applications and their requirements Adaptive workflows Workflow optimizations (including scheduling and energy efficiency) Performance analysis of workflows Workflow debugging Workflow provenance Interactive workflows (including workflow steering) ***************************************** Important Dates Papers Due: 13 August 2017 (EXTENDED) Notifications of Acceptance: 9 September 2017 E-copyright registration completed by authors: 1 October 2017 Final Papers Due: 1 October 2017 Submitted papers must be at most 10 pages long. The proceedings should be formatted according to http://www.acm.org/publications/proceedings-template. WORKS papers will be published in collaboration with SIGHPC and will be available from both ACM and IEEE digital repositories. ***************************************** WORKS 2017 Organizing Committee – PC Chairs Sandra Gesing, University of Notre Dame, USA Rizos Sakellariou, University of Manchester, UK – General Chairs Johan Montagnat, CNRS, Sophia Antipolis, France Ian Taylor, Cardiff University, UK and University of Notre Dame, USA – Steering Committee David Abramson, University of Queensland, Australia Malcolm Atkinson, University of Edinburgh, UK Ewa Deelman, University of Southern California, USA Michela Taufer, University of Delaware, USA – Publicity Chairs Rafael Ferreira da Silva, USC, USA Ilia Pietri, University of Athens, Greece ***************************************** WORKS 2017 Program Committee Pinar Alper, King's College London, UK Ilkay Altintas, San Diego Supercomputer Center, USA Khalid Belhajjame, Université Paris-Dauphine, France Adam Belloum, University of Amsterdam, the Netherlands Ivona Brandic, TU Wien, Austria Kris Bubendorfer, Victoria University of Wellington, New Zealand Jesus Carretero, Universidad Carlos III de Madrid, Spain Henri Casanova, University of Hawaii at Manoa, USA Ewa Deelman, USC Information Sciences Institute, USA Rafael Ferreira Da Silva, USC Information Sciences Institute, USA Daniel Garijo, USC Information Sciences Institute, USA Sandra Gesing, University of Notre Dame, USA Tristan Glatard, CNRS, France Daniel Katz, University of Illinois Urbana-Champaign, USA Tamas Kiss, University of Westminster, UK Dagmar Krefting, HTW Berlin, Germany Maciej Malawski, AGH University of Science and Technology, Poland Anirban Mandal, Renaissance Computing Institute, USA Marta Mattoso, Federal Univ. Rio de Janeiro, Brazil Andrew Stephen Mcgough, Newcastle University, UK Paolo Missier, Newcastle University, UK Jarek Nabrzyski, University of Notre Dame, USA Daniel de Oliveira, Fluminense Federal University, Brazil Ilia Pietri, University of Athens, Greece Radu Prodan, University of Innsbruck, Austria Omer Rana, Cardiff University, UK Ivan Rodero, Rutgers University, USA Rizos Sakellariou, University of Manchester, UK Domenico Talia, University of Calabria, Italy Rafael Tolosana-Calasanz, Universidad de Zaragoza, Spain Chase Wu, New Jersey Institute of Technology, USA

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Special issue on Optimisation Solutions in Systems
by Fernando Rubio 25 Jul '17

25 Jul '17

*CALL FOR PAPERS * *http://antares.sip.ucm.es/~fernando/jsit/cfp.htm <http://antares.sip.ucm.es/~fernando/jsit/cfp.htm>* *A Special Issue of the Journal of Systems and Information Technology on Optimisation Solutions in Systems* *Aims and Scope* Optimisation is a major necessity in Science and Engineering. No matter if we want to reduce the amount of needed resources to perform a task or maximize the output of some process, so often the difficulty of making the right decisions can be rephrased as some kind of optimisation problems. Unfortunately, for many optimisation problems finding the optimal solution is not feasible in general due to the hardness of the problem —moreover, for some of them we cannot even guarantee any constant ratio between the quality of the optimal solution and the quality of any solution found in reasonable time. Despite these disheartening theoretical limits, optimisation problems appear whenever there is a sophisticated system, so we do have to face them by some means —necessarily non-exhaustive methods. Some of these methods are specific to the problem under consideration, whereas others are adaptations of general optimization heuristics (metaheuristics) to the studied problem. Typically, the latter search for solutions similar to the most promising observed ones, or their combinations, for example by making some simple entities interact with each other according to simple rules and collaboratively construct new solutions. Within this category we can find evolutionary computation methods and swarm optimization methods, which are sometimes inspired by some natural process. Regardless of the method selected to tackle a hard optimization problem, the difficulty of the problem and the performance of the best known heuristics for the problem may have a high impact on the application field the problem belongs to, since the difficulty of a scientific or engineering process can be, to some extent, due to the computational difficulty of the underlying optimization problem it implicitly poses. The goal of this special issue is to introduce new research, or comprehensive compilations of existing ones, on optimisation techniques for engineering systems, and their applications. *We solicit contributions related, but not limited to the following topics:* · New optimisation algorithms and metaheuristics, enhancement of existing ones · Problem-specific and generic optimisation methods · Comparison of optimisation algorithms and metaheuristics · Nature inspired metaheuristics, evolutionary computation, swarm intelligence · Classification and generalization of metaheuristics, hybridisation of methods · Optimisation problems on real data, case studies · Benchmark usage and generation · Optimisation hardness, complexity of problems and optimisation algorithms · Impact of the optimisation difficulty on Social Sciences, Natural Sciences and Engineering · Comprehensive compilations of the state of art on any aspect of optimisation We encourage submissions from both academics and practitioners. *Submission Procedure* Full papers should be submitted to: *http://mc.manuscriptcentral.com/jsit* <http://mc.manuscriptcentral.com/jsit> (all manuscripts should follow the submission guidelines available at http://emeraldgrouppublishing. com/products/journals/author_guidelines.htm?id=jsit You must first create an author account in the system if you do not have one. Once registered, you will see the Author Centre button when you sign in to your account. Click on the ‘click here to submit a new manuscript’ link, which will take you through to the Manuscript Submission page. Follow the instructions to complete all fields and browse to upload your manuscript. At the ‘please select the issue you are submitting to’ dropdown list (under Details & Comments) please choose *“Special Issue on Optimisation Solutions in Systems”*. *Important dates:* · Please submit papers on or before October 1st 2017. All submissions will be peer-reviewed following the review process of the Journal of Systems and Information Technology. (Prospective authors are encouraged to indicate their interests any time before the submission deadline. Please, contact fernando(a)sip.ucm.es) · Notification of results: December 15th 2017. · Final submission: January 31st 2018. · The special issue will be published in June 2018 Special Issue Guest Editors: Dr. Pablo Rabanal, Facultad de Informática, Universidad Complutense de Madrid, Spain Dr. Ismael Rodríguez, Facultad de Informática, Universidad Complutense de Madrid, Spain Dr. Fernando Rubio, Facultad de Informática, Universidad Complutense de Madrid, Spain

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Call For Papers [Best Paper Award, Keynote Speaker and Panel]: ESPM2@SC17 - Third International Workshop on Extreme Scale Programming Models and Middleware
by Hari Subramoni 24 Jul '17

24 Jul '17

======================================================================== Call For Papers Third International IEEE Workshop on Extreme Scale Programming Models and Middleware (ESPM2 2017) November 12, 2017, Denver, Colorado to be held in conjunction with SuperComputing 2017, November 12 - 16, 2017 Denver, Colorado http://nowlab.cse.ohio-state.edu/espm2/ ======================================================================== Next generation architectures and systems being deployed are characterized by high concurrency, low memory per-core, and multiple levels of hierarchy and heterogeneity. These characteristics bring out new challenges in energy efficiency, fault-tolerance and, scalability. It is commonly believed that software has the biggest share of the responsibility to tackle these challenges. In other words, this responsibility is delegated to the next generation programming models and their associated middleware/runtimes. This workshop focuses on different aspects of programming models such as task-based parallelism (Charm++, OCR, Habanero, Legion, X10, HPX, etc), PGAS (OpenSHMEM, UPC, CAF, Chapel, UPC++, etc.), BigData (Hadoop, Spark, etc), Deep Learning (Caffe, Microsoft CNTK, Google TensorFlow), directive-based languages (OpenMP, OpenACC) and Hybrid MPI+X, etc. It also focuses on their associated middleware (unified runtimes, interoperability for hybrid programming, tight integration of MPI+X, and support for accelerators) for next generation systems and architectures. The ultimate objective of the ESPM2 workshop is to serve as a forum that brings together researchers from academia and industry working in the areas of programming models, runtime systems, compilers, programming languages, and application developers. ESPM2 2017 will be held as a full day workshop in conjunction with the SuperComputing (SC 2017), Denver, Colorado, USA, Sunday, November 12th, 2017. Topics ------ ESPM2 2017 welcomes original submissions in a range of areas, including but not limited to: * New programming models, languages and constructs for exploiting high concurrency and heterogeneity * Experience with and improvements for existing parallel languages and run-time environments such as: - MPI - PGAS (OpenSHMEM, UPC, CAF, Chapel, UPC++, etc.) - Directive-based programming (OpenMP, OpenACC) - Asynchronous Task-based models (Charm++, OCR, Habanero, Legion, X10, HPX, etc) - Hybrid MPI+X models - BigData (Hadoop, Spark, etc), and - Deep Learning (Caffe, Microsoft CNTK, Google TensorFlow) * Parallel compilers, programming tools, and environments * Software and system support for extreme scalability including fault tolerance * Programming environments for heterogeneous multi-core systems and accelerators such as KNL, OpenPOWER, ARM, GPUs, FPGAs, MICs, and DSPs Papers should present original research and should provide sufficient background material to make them accessible to the broader community. Best Paper Award ---------------- Intel has generously offered to sponsor the Best Paper Award. This award will be given to the author(s) of the paper selected by the Technical Program Committee and the Program Chairs. The award will be determined from viewpoints of the technical and scientific merits, impact on the science and engineering of the research work and the clarity of presentation of the research contents in the paper. Keynote Speakers ---------------- We are happy to announce that Prof. William D. Gropp, Interim Director and Chief Scientist at the National Center for Supercomputing Applications and the Thomas M. Siebel Chair in Computer Science at the University of Illinois Urbana-Champaign will deliver the keynote address at ESPM2'17. Panel Information ----------------- Panel Topic : Effective Programming Models for Deep Learning at Scale Panel Moderator : Daniel Holmes, EPCC, The University of Edinburgh, UK. Panel Members : Coming soon! Paper Submission and Registration --------------------------------- Abstracts and papers need to be submitted via the EasyChair conference system. EasyChair URL for ESPM2'17: https://easychair.org/conferences/?conf=espm22017 Submissions should not exceed 8 pages using ACM format with 10pt font. Each submission must be a single PDF file. Papers must be submitted in PDF format (readable by Adobe Acrobat Reader 5.0 and higher) and formatted for 8.5" x 11" (U.S. Letter). The manuscript should be formatted according to ACM format (see http://www.acm.org/sigs/publications/proceedings-templates) Papers should present original research and should provide sufficient background material to make them accessible to the broader community. It should not be submitted in parallel to any other conference or journal. At least one of the authors of each accepted paper must register as a participant of the workshop and present the paper at the workshop, in order to have the paper published in the proceedings. Each research paper will be taken through a comprehensive peer review process by an internationally recognized group of experts in the field. Papers will be evaluated along the metrics of a) Quality of Presentation; b) Novelty / Originality; c) Relation to State of the Art; d) Technical Strength; e) Significance of Work; and f) Relevance to Workshop. Every effort will be made to ensure that each paper receives multiple reviews. Please contact the Program Chairs for any questions/clarifications Proceedings Information ----------------------- ACM SigHPC will publish the workshop proceedings which will be available through the ACM Digital Library. The camera-ready versions need to be submitted via the EasyChair conference management system. The link to the submission site will be provided soon. Please contact the Program Chairs for any questions/clarifications. Important Dates --------------- Technical paper submission deadline : 11:59 PM, AoE, August 31, 2017 Author notification : October 1, 2017 Camera-ready deadline : 11:59 PM, AoE, October 7, 2017 Workshop : Sunday, November 12, 2017 ESPM2'17 Workshop Organizers ------------------------------ Hari Subramoni, The Ohio State University Karl Schulz, Intel Corporation Dhabaleswar K. (DK) Panda, The Ohio State University Program Committee ----------------- * Guang R. Gao, University of Delaware * Vladimir Getov, University of Westminster, UK * Jeff Hammond, Intel Labs * Michael A. Heroux, Sandia National Laboratories * Costin Iancu, Lawrence Berkeley National Laboratory * Darren Kerbyson, Pacific Northwest National Laboratory * Guangming Tan, Institute of Computing Technology, Chinese Academy of Sciences, China * Olivier Tardieu, IBM T.J. Watson Research Center * Daniel Tian, The Portland Group * Sean Treichler, NVIDIA Corporation * Abhinav Vishnu, Pacific Northwest National Laboratory Further Information ------------------- See the ESPM2'17 website at http://nowlab.cse.ohio-state.edu/espm2/ Thanks, The ESPM2'17 Organizing Committee.

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[CFP] IA^3 2017 - Seventh SC Workshop on Irregular Applications: Architectures and Algorithms
by Tumeo, Antonino 24 Jul '17

24 Jul '17

[Apologies if you receive multiple copies of this CFP] IA^3 2017 Seventh Workshop on Irregular Applications: Architectures and Algorithms http://hpc.pnl.gov/IA3/ November 13, 2017 In conjunction with SC17 In collaboration with ACM SIGHPC Sponsored by IEEE TCHPC Call for Papers Irregular applications occur in many subject matters. While inherently parallel, they exhibit highly variable execution performance at a local level due to unpredictable memory access patterns and/or network transfers, divergent control structures, and data imbalances. Moreover, they often require fine-grain synchronization and communication on large-data structures such as graphs, trees, unstructured grids, tables, sparse matrices, deep nets, and their combinations (such as, for example, attributed graphs). They have a significant degree of latent parallelism, which however is difficult to exploit due to their complex behavior. Current high performance architectures rely on data locality and regular computation to reduce access latencies, and often do not cope well with the requirements of these applications. Furthermore, irregular applications are difficult to scale on current supercomputing machines, due to their limits in fine-grained synchronization and small data transfers. Irregular applications pertain both to well established and emerging fields, such as machine learning, social network analysis, bioinformatics, semantic graph databases, Computer Aided Design (CAD), and computer security. Many of these application areas also process massive sets of unstructured data, which keep growing exponentially. Addressing the issues of irregular applications on current and future architectures will become critical to solve the challenges in science and data analysis of the next few years. This workshop seeks to explore solutions for supporting efficient execution of irregular applications in the form of new features at the level of the micro- and system-architecture, network, languages and libraries, runtimes, compilers, analysis, algorithms. Topics of interest, of both theoretical and practical significance, include but are not limited to: * Micro- and System-architectures, including multi- and many-core designs, heterogeneous processors, accelerators (GPUs, vector processors, Automata processor), reconfigurable (coarse grained reconfigurable and FPGA designs) and custom processors * Network architectures and interconnect (including high-radix networks, optical interconnects) * Novel memory architectures and designs (including processors-in memory) * Impact of new computing paradigms on irregular workloads (including neuromorphic processors and quantum computing) * Modeling, simulation and evaluation of novel architectures with irregular workloads * Innovative algorithmic techniques * Combinatorial algorithms (graph algorithms, sparse linear algebra, etc.) * Impact of irregularity on machine learning approaches * Parallelization techniques and data structures for irregular workloads * Data structures combining regular and irregular computations (e.g., attributed graphs) * Approaches for managing massive unstructured datasets (including streaming data) * Languages and programming models for irregular workloads * Library and runtime support for irregular workloads * Compiler and analysis techniques for irregular workloads * High performance data analytics applications, including graph databases Besides regular papers, papers describing work-in-progress or incomplete but sound, innovative ideas related to the workshop theme are also encouraged. We solicit both 8-page regular papers and 4-page position papers. Authors of exciting but not mature enough regular papers may be offered the option of a short 4-page paper and related short presentation. Artifact Evaluation For this edition of IA3, authors of accepted regular papers will be invited to formally submit their supporting materials to the Artifact Evaluation process, similarly to the process followed for SC17. The participation to the Artifact Evaluation process is voluntary and will not change decisions regarding the paper. However, papers that undergo the evaluation process will receive a seal of approval on the paper, and will be able to participate in the BEST PAPER AWARD selection. DIVIDITI will provide an Amazon Gift Voucher (valued $200) to the authors of the paper that passes artifact evaluation with the highest score and that shares the artifact in the CK (Collective Knowledge - https://github.com/ctuning/ck) format. Authors that go through the Artifact Evaluation process are also encouraged (but not mandated) to submit the supporting materials as “Source Materials” in the digital library. For details on how to submit supporting materials to the Artifact Evaluation process, please refer to: http://ctuning.org/ae/submission.html. For any additional question on the Artifact Evaluation process please contact the Artifact Evaluation Chair Flavio Vella. Important Dates Abstract submission: 22 August 2017 Position or full paper submission: 29 August 2017 Notification of acceptance: 3 October 2017 Camera-ready position and full papers: 10 October 2017 Workshop: 13 November 2017 Submissions Submission site: https://easychair.org/conferences/?conf=ia32017 All submissions should be in double-column, single-spaced letter format, with at least one-inch margins on each side and respect the ACM standard proceedings templates (sigconf) available at: https://www.acm.org/publications/proceedings-template. The proceedings of the workshop will be published in cooperation with ACM SIGHPC. Submitted manuscripts may not exceed eight (8) pages in length for regular papers and four(4) pages for position papers including figures, tables and references. Organizers Antonino Tumeo, PNNL, US John Feo, PNNL/NIAC, US, Vito Giovanni Castellana, PNNL, US Artifact Evaluation Chair Flavio Vella, DIVIDITI, UK Publication Chair Marco Minutoli, PNNL, US Program Committee Scott Beamer, LBNL, US Michela Becchi, North Carolina State University, US Erik Boman, Sandia National Laboratories, US David Brooks, Harvard University, US Aydin Buluc, LBNL, US Sunita Chandrasekaran, University of Delaware, US Fabio Checconi, IBM, US Rajiv Gupta, Univerisity of California Riverside, US Maya Gokhale, LLNL, US Peter Kogge, Univ. of Notre Dame, US Vivek Kumar, Rice University, US John Leidel, Texas Tech University, US Kamesh Madduri, Pennsylvania State University, US Naoya Maruyama, RIKEN AICS, JP Tim Mattson, Intel, US Miquel Moreto, BSC and UPC, SP Richard Murphy, Micron Technology Inc, US Walid Najjar, University of California Riverside, US Maxim Naumov, NVIDIA, US Jacob Nelson, University of Washington, US Sreepathi Pai, University of Rochester, US Roger Pearce, LLNL, US Miquel Pericas, Chalmers University, SE Viktor Prasanna, University Of Southern California, US Alejandro Rico, ARM, US Jason Riedy, Georgia Institute of Technology, US Erik Saule, University of North Carolina at Charlotte, US John Shalf, LBNL, US Shaden Smith, University of Minnesota, US Bora Ucar, CNRS and LIP ENS Lyon, FR Ruud Van Der Pas, Oracle, US Flavio Vella, DIVIDITI, UK Ana Lucia Varbanescu, University of Amsterdam, NL

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IEEE SC2 2017 Submission Deadline - August 10, 2017
by Robert Hsu 24 Jul '17

24 Jul '17

IEEE SC2 2017, The 7th IEEE International Symposium on Cloud and Service Computing Kanazawa, Japan, November 22-25, 2017 http://grid.chu.edu.tw/iov2017 Dear Colleagues: We cordially invite you to share your latest research results at the 2017 IEEE SC2 Conference. --------------------------- CALL FOR PAPERS --------------------------- The “Cloud” is a natural evolution of distributed computing and the widespread adaption of virtualization and SOA. Services computing is a new cross-discipline subject that covers the science and technology needed to bridge the gap between business services and IT services. In cloud computing, IT-related capabilities and resources are provided as services, via the Internet and on-demand, accessible without requiring detailed knowledge of the underlying technology. SC2 2017 is an important forum for researchers and industry practitioners to exchange information regarding advancements in the state of art and practice of IT-driven cloud computing technologies and services, as well as to identify emerging research topics and define the future directions of cloud and services computing. IEEE SC2 2017 will be held on Nov. 22-25, 2017 in Kanazawa, Japan. Topics of interest include, but are not limited to: - Cloud architecture - Cloud OS, middleware, and toolkits - Storage architecture - Big data infrastructure, systems, methodologies, and applications - Virtualization techniques - Resource provision, monitoring, and scheduling - Privacy and access control for cloud computing - Performance evaluation and modeling measurement for cloud computing - Programming models for building cloud applications - Networking in cloud computing - Security, privacy and trustworthy in clouds - Security, privacy and trustworthy for service oriented architectures and systems - Energy efficient hardware and software solutions - High availability and reliability - Large scale cloud applications - Internet/web computing and data mining - Volunteer and utility computing - Green and pervasive computing - Service oriented architecture - Discovery of services and data in cloud computing infrastructures - Foundations of services computing - Services-centric business models - Business process integration and management --------------------------------------- PUBLICATION HIGHLIGHTS --------------------------------------- IEEE CS proceedings, indexed by - IEEE Xplore - Scopus - Compendex EI - ACM Digital Library - DBLP - Google Scholar Extended version of the selected papers will be invited for publication in prestigious international journals. Cluster Computing (Springer) Journal of Supercomputing (Springer) Vehicular Communications Journal International Journal of Big Data Intelligence International Journal of Grid and High-Performance Computing Journal of Foundations of Computing and Decision Sciences International Journal of Applied Mathematics and Computer Science IEEE Transactions on Emerging Topics in Computing IET Intelligent Transport Systems ---------------------------- IMPORTANT DATES ---------------------------- Research Track: Submission 8/10 Notification 9/10 Poster / Special Session Submission 9/17 Notification 9/24 Registration Due 10/5 Camera ready 10/5 --------------------------------------------- SUBMISSION and PUBLICATION --------------------------------------------- Papers need to be prepared according to the IEEE format, and submitted in PDF format via the IEEE SC2 2017 submission site: https://easychair.org/conferences/?conf=sc22017 IEEE formatting information: http://www.ieee.org/conferences_events/conferences/publishing/templates.html ------------------------------- Organizing Committees ------------------------------- General Chairs Keqin Li, State University of New York at New Paltz, USA Ren-Hung Hwang, National Chung Cheng University, Taiwan Christophe Cerin, Université Paris 13, France General Executive Chairs Tokuro Matsuo, Advanced Institute of Industrial Technology, Japan Robert Hsu, Chung Hua University, Taiwan Program Chairs Amir H. Alavi, Michigan State University, USA Yue-Shan Chang, National Taipei University, Taiwan Workshop Chairs Chia-Hung Yeh, National Sun Yat-sen University, Taiwan Alex Kuo, University of Victoria, Canada Demo/Poster Chair Carson Leung, University of Manitoba, Canada Special Session Chair Kuan-Chou Lai, National Taichung University, Taiwan Award Chair Ce-Kuen Shieh, National Cheng Kung University, Taiwan International Liaison & Publicity Chair Yu Chen, Binghamton University, USA Bingsheng He, National University of Singapore, Singapore Jun Li, University of Sydney, Australia Bingwei Liu, Aetna Inc., USA Koji Nakano, Hiroshima University, Japan Yan Zhang, University of Oslo, Norway Li-Hsin Yen, National Chiao Tung Univ. Taiwan Rynson Lau, City Univ. of Hong Kong, Hong Kong Publication Chair Wen-Hwa Liao, Tatung University, Taiwan Saeid Abolfazli, YTL Communications and Xchanging, Malaysia Advisory Committee Robert Hsu, Chung Hua University, Taiwan Rajkumar Buyya, University of Melbourne, Australia H.J. Siegel, Colorado State University, USA Chung-Ta King, National Tsing Hua University, Taiwan Hamid R. Arabnia, The University of Georgia, USA Lizhe Wang, Chinese Academy of Sciences, China Hung-Chang Hsiao, National Tsing Hua University, Taiwan Anna Kobusinska, Poznan University of Technology, Poland Hui Lei, IBM, USA Kwei-Jay Lin, University of California Irvine, USA Philip Yu, University of Illinois at Chicago, USA Please visit the IEEE SC2 2016 website http://grid.chu.edu.tw/sc2-2017/tpc.php for the complete listing of organizing committee and TPC members.

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Call for Papers: IEEE HiPC 2017 workshops
by Anand Panangadan 21 Jul '17

21 Jul '17

24th IEEE International Conference on High Performance Computing, Data, and Analytics HiPC 2017 December 18-21, 2017 Jaipur, India http://www.hipc.org The 24th annual IEEE International Conference on High Performance Computing, Data and Analytics (HiPC 2017) will be held at the Le Meridian, Jaipur, India. Complementing the main technical program, HiPC workshops serve to broaden the technical scope of the conference in emerging areas of high performance computing, communication, data and analytics and their applications. Below is the listing of the four workshops to be held on the first day of the conference, December 18. • International Workshop on Foundations of Big Data Computing (BigDF) • Third Workshop on Computational Fluid Dynamics (CFD) • Dynamic Data Driven Smart Systems (DDDSS) • Second International Workshop on Software Composable Infrastructure (SCI) See details at http://hipc.org/workshops for workshop paper submission deadlines and formatting requirements. WORKSHOPS CO-CHAIRS Manish Parashar, Rutgers University, USA Chiranjib Sur, Shell, India HiPC 2017 is co-sponsored by •IEEE Computer Society Technical Committee on Parallel Processing (TCPP) •HiPC Education Trust, India In cooperation with •ACM Special Interest Group on Algorithms and Computation Theory (SIGACT) •ACM Special Interest Group on Computer Architecture (SIGARCH) •FIP Working Group on Concurrent Systems •Manufacturers' Association for Information Technology (MAIT) •National Association of Software and Service Companies (NASSCOM) ------------------------------------------------------------------------------------------------ Follow us on Twitter https://twitter.com/hipcconf Google+ https://plus.google.com/+HipcOrg Facebook https://www.facebook.com/hipc.conference/ ------------------------------------------------------------------------------------------------

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Final Call: IEEE Workshop on Quantum Communications and Information Technology (QCIT’17)
by Peter Mueller 21 Jul '17

21 Jul '17

Third Workshop on Quantum Communications and Information Technology (QCIT’17) ----------------------------------------------------------- Review manuscript due date: July 23. 2017 ========================================= http://qcit.committees.comsoc.org/qcit17-workshop/ At IEEE Globecom’17, Singapore, 4-8 December 2017 http://globecom2017.ieee-globecom.org The scope of this dedicated workshop is to explore the opportunities for application of communications theory and technologies to quantum technology and its applications. The workshop is the annual main event of ComSoc’s Emerging Technical Committee on Quantum Communications and Information Technology (ETC-QCIT). Over the last decade, a wide variety of experimental quantum communications and processing devices has been invented and used for fundamental demonstrations in laboratories. Results confirm feasibility of real applications in quantum communications and information related fields. Recently one can observe upcoming applications in areas like a quantum communications, quantum sensors and random number generators which are partially even commercially available. Companies and governments started to spend significant amounts of funding in research and development of quantum technologies. However, the step from quantum technology based devices to real systems running a communications or information processing task has not completed yet. Moreover, many problems show opportunities to contribute with knowhow, technologies and engineering out of the communications area. The following topics are crucial to the development of future quantum technology based systems: - Algorithms and applications complexity - Analysis of classical vs quantum software - Coding theory - Coherent routers, repeaters and converters - Communications and information theory - Devices and circuits - Entanglement distillation - Error correction - Experimental results and demonstrations - Interconnection and complexity theory - Metrology for quantum systems - Modeling and simulation - Network coding - Photonic communications technology - Processing and systems architecture - Quantum electro-dynamics - Quantum information theory - Quantum key distribution - Quantum sensors - Quantum-algorithms and applications - Remote state preparation - RF based programming and algorithms - RF technology and control - Signal processing for quantum control It is the aim of this workshop to connect people from academia and industry to discuss about theory, technology and applications and exchange ideas to move efficiently forward in research, engineering and development of this exciting area. Submission info for camera-ready manuscripts -------------------------------------------- Original and unpublished regular papers are solicited from the above-mentioned areas. Regular papers have a length of 4 to 6 pages with an optional payable 7th page. All manuscripts will be peer reviewed and published in the workshop proceedings and after presentation in IEEE Xplore. Templates for the manuscripts can be downloaded from: http://www.ieee.org/conferences_events/conferences/publishing/templates.html The formatted manuscript should be electronically submitted as pdf via EDAS: https://edas.info/newPaper.php?c=23835 Further information is available in the Globecom 2017 webpages: http://globecom2017.ieee-globecom.org Important dates --------------- Manuscript submission due date: 23. July, 2017 (extended) Notification date: 1. September, 2017 Final manuscript due date: 1. October, 2017 Conference date: 4.-8. December, 2017 Workshop organizers ------------------- Andrea Conti, University of Ferrara, Italy, a.conti(a)ieee.org Lajos Hanzo, University of Southampton, United Kingdom, lh(a)ecs.soton.ac.uk Peter Mueller, IBM Research Zurich Laboratory, Switzerland, pmu(a)zurich.ibm.com Michael Ng, University of Southampton, United Kingdom, sxn(a)ecs.soton.ac.uk

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CFP-IEEE SC2 2017 Submission Deadline - August 10, 2017
by Anna Kobusińska 21 Jul '17

21 Jul '17

IEEE SC2 2017, The 7th IEEE International Symposium on Cloud and Service Computing Kanazawa, Japan, November 22-25, 2017 https://grid.chu.edu.tw/sc2-2017 Dear Colleagues: We cordially invite you to share your latest research results at the 2017 IEEE SC2 Conference. --------------------------- CALL FOR PAPERS --------------------------- The “Cloud” is a natural evolution of distributed computing and the widespread adaption of virtualization and SOA. Services computing is a new cross-discipline subject that covers the science and technology needed to bridge the gap between business services and IT services. In cloud computing, IT-related capabilities and resources are provided as services, via the Internet and on-demand, accessible without requiring detailed knowledge of the underlying technology. SC2 2017 is an important forum for researchers and industry practitioners to exchange information regarding advancements in the state of art and practice of IT-driven cloud computing technologies and services, as well as to identify emerging research topics and define the future directions of cloud and services computing. IEEE SC2 2017 will be held on Nov. 22-25, 2017 in Kanazawa, Japan. Topics of interest include, but are not limited to: - Cloud architecture - Cloud OS, middleware, and toolkits - Storage architecture - Big data infrastructure, systems, methodologies, and applications - Virtualization techniques - Resource provision, monitoring, and scheduling - Privacy and access control for cloud computing - Performance evaluation and modeling measurement for cloud computing - Programming models for building cloud applications - Networking in cloud computing - Security, privacy and trustworthy in clouds - Security, privacy and trustworthy for service oriented architectures and systems - Energy efficient hardware and software solutions - High availability and reliability - Large scale cloud applications - Internet/web computing and data mining - Volunteer and utility computing - Green and pervasive computing - Service oriented architecture - Discovery of services and data in cloud computing infrastructures - Foundations of services computing - Services-centric business models - Business process integration and management --------------------------------------- PUBLICATION HIGHLIGHTS --------------------------------------- IEEE CS proceedings, indexed by - IEEE Xplore - Scopus - Compendex EI - ACM Digital Library - DBLP - Google Scholar Extended version of the selected papers will be invited for publication in prestigious international journals. Cluster Computing (Springer) Journal of Supercomputing (Springer) Vehicular Communications Journal International Journal of Big Data Intelligence International Journal of Grid and High-Performance Computing Journal of Foundations of Computing and Decision Sciences International Journal of Applied Mathematics and Computer Science IEEE Transactions on Emerging Topics in Computing IET Intelligent Transport Systems ---------------------------- IMPORTANT DATES ---------------------------- Research Track: Submission 8/10 Notification 9/10 Poster / Special Session Submission 9/17 Notification 9/24 Registration Due 10/5 Camera ready 10/5 --------------------------------------------- SUBMISSION and PUBLICATION --------------------------------------------- Papers need to be prepared according to the IEEE format, and submitted in PDF format via the IEEE SC2 2017 submission site: https://easychair.org/conferences/?conf=sc22017 IEEE formatting information: http://www.ieee.org/conferences_events/conferences/publishing/templates.html ------------------------------- Organizing Committees ------------------------------- General Chairs Keqin Li, State University of New York at New Paltz, USA Ren-Hung Hwang, National Chung Cheng University, Taiwan Christophe Cerin, Université Paris 13, France General Executive Chairs Tokuro Matsuo, Advanced Institute of Industrial Technology, Japan Robert Hsu, Chung Hua University, Taiwan Program Chairs Amir H. Alavi, Michigan State University, USA Yue-Shan Chang, National Taipei University, Taiwan Workshop Chairs Chia-Hung Yeh, National Sun Yat-sen University, Taiwan Alex Kuo, University of Victoria, Canada Demo/Poster Chair Carson Leung, University of Manitoba, Canada Special Session Chair Kuan-Chou Lai, National Taichung University, Taiwan Award Chair Ce-Kuen Shieh, National Cheng Kung University, Taiwan International Liaison & Publicity Chair Yu Chen, Binghamton University, USA Bingsheng He, National University of Singapore, Singapore Jun Li, University of Sydney, Australia Bingwei Liu, Aetna Inc., USA Koji Nakano, Hiroshima University, Japan Yan Zhang, University of Oslo, Norway Li-Hsin Yen, National Chiao Tung Univ. Taiwan Rynson Lau, City Univ. of Hong Kong, Hong Kong Publication Chair Wen-Hwa Liao, Tatung University, Taiwan Saeid Abolfazli, YTL Communications and Xchanging, Malaysia Advisory Committee Robert Hsu, Chung Hua University, Taiwan Rajkumar Buyya, University of Melbourne, Australia H.J. Siegel, Colorado State University, USA Chung-Ta King, National Tsing Hua University, Taiwan Hamid R. Arabnia, The University of Georgia, USA Lizhe Wang, Chinese Academy of Sciences, China Hung-Chang Hsiao, National Tsing Hua University, Taiwan Anna Kobusinska, Poznan University of Technology, Poland Hui Lei, IBM, USA Kwei-Jay Lin, University of California Irvine, USA Philip Yu, University of Illinois at Chicago, USA Please visit the IEEE SC2 2016 website http://grid.chu.edu.tw/sc2-2017/tpc.php for the complete listing of organizing committee and TPC members. *************************************************************************************************************************************************************************************************** The CSPlus (Computational Science Publicity and Liaison for Ubiquitous Society) mailing list has been setup to share information with respect to upcoming events. To unsubscribe, please click http://grid.chu.edu.tw/mailling_list/unsubscribe.php?mail=Anna.Kobusinska@c… To subscribe another email: please visit http://grid.chu.edu.tw/mailling_list/index.php If you need any help, please email us at cfp-admin(a)grid.chu.edu.tw ***************************************************************************************************************************************************************************************************

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CFP-10th IEEE Int. Conf. on Service Oriented Computing and Applications (SOCA 2017)
by Anna Kobusińska 21 Jul '17

21 Jul '17

Call For Papers - IEEE SOCA 2017 in Kanazawa, Japan, November 22-25, 2017 The 10 th IEEE International Conference on Service Oriented Computing and Applications (SOCA 2017) http://conferences.computer.org/soca Kanazawa, Japan, November 22-25, 2017 --------------------------- CALL FOR PAPERS --------------------------- Service-oriented computing (SOC) is considered today a key enabler for the development of robust and high-quality intelligent Internet-scale distributed applications. Extensive research and development in the past few years has pushed SOC technology into state-of-the-art applications in emerging areas such as Cloud computing, Internet-of-Things (IoT), Machine-to-Machine (M2M) communication, Cyber-Physical Systems (CPSs), Mobile-Edge Computing, Social computing as well as mobile and enterprise systems. However, many of the critical components on building reliable, robust, and user-centric, cloud-based service-oriented architecture applications and systems are still open for research. Hence, it is time to face new service-oriented architecture (SOA) research opportunities by addressing new research challenges on emerging applications domains like smart cities, smart logistics, smart factories and e-Health, just to mention a few. Many of the service components are deployed on resource-limited embedded systems and are performance sensitive; others are deployed on cloud servers providing highly parallel services and on edge servers in the middle of resource-limited systems and high-end servers. Edge servers and clouds are connected through various types of networks, including emerging network function virtualization services. These components are part of complex applications and systems that span multiple execution environments. Their capabilities are increasingly being managed and (re)configured via emerging software-defined and elasticity mechanisms. In addition, they have to interact with humans in order to obtain useful human-sensing data and solve complex problems. Thus, on the one hand, SOC may provide effective solutions for managing the ever-increasing complexity while meeting the challenging requirements of services on largely distributed, heterogeneous and dynamic resource environments. On the other hand, the exploitation of emerging trends in such environments to build SOC applications and systems for large-scale service-based systems is an open research challenge. The 2017 IEEE International Conference on Service-Oriented Computing and Applications (SOCA 2017 http://conferences.computer.org/soca/) provides an international forum for researchers from multiple disciplines to exchange and share their experiences, ideas, and latest research results on all aspects of service- oriented computing. The conference includes three days of parallel-track program, special-topic workshops, keynotes and tutorials, and panel discussion. We invite submissions of high-quality papers describing fully developed results or ongoing work on the following topics and related areas: -Service-oriented architectures, engineering, and applications -Cloud-based service systems -SOCA in IoT and Cyber-Physical Systems -Service Models and Applications for Mobile-Edge Computing -Service coordination techniques in IoT and cloud environments -SOC-based smart process and workflow management -Configurable, reconfigurable and software-defined service middleware -Data analytics and data services in and for SOC-based systems -IoT and data marketplaces -Smart data and service contracts -Cognitive computing techniques for SOCA -Social computing for and atop SOCA -SOCA development, deployment and testing tools and methodologies -Security and privacy for SOCA -Dependable and trustworthy SOCA -SOCA for smart applications (cities, transportation systems, factories, homes and offices, etc.) ------------------------ Important Dates ------------------------ Workshop/Special Session Proposal May 30, 2017 Workshop/Special Session Notification June 15, 2017 Paper Submission Deadline August 10, 2017 Acceptance Notification September 15, 2017 Camera-Ready Submission October 1, 2017 ---------------------------- Paper Format and Submission ---------------------------- We seek for both full and short papers. Full papers will be submitted as PDF files, using the IEEE Computer Society Proceedings Format (two column, 10 point, single-spaced, US Letter, no margin smaller than one inch) with a page limit of 8 pages. Short paper should be limited with 4 pages. All papers will be reviewed by at least 3 technical committee members. The paper can be submitted at https://easychair.org/conferences/?conf=soca2017 ---------------------------- Organizing Committees ---------------------------- General Chairs Boualem Benatallah, UNSW, Australia Christian Huemer, Vienna University of Tech., Austria Takayuki Ito, Nagoya Inst. of Tech., Japan General Vice-Chairs Yong Tang, South China Normal University, China Tokuro Matsuo, Advanced Inst. of Industrial Tech., Japan Hong-Linh Truong, Vienna University of Tech., Austria Program Chairs Bormin Huang, University of Wisconsin-Madison, USA Hai Jin, Huazhong University of Science and Tech., China Kwei-Jay Lin, University of California, Irvine, USA Program Vice-Chairs Jing Fan, Zhejiang University of Technology, China Anna Kobusinska, Poznan University of Tech., Poland Kevin Wang, University of Auckland, New Zealand Workshop Co-Chairs Naoki Fukuta, Shizuoka University, Japan Changqin Huang, South China Normal University, China Finance Chair Tokuro Matsuo, Advanced Inst. of Industrial Tech., Japan Publication Chair Jong-Chan Kim, Kookmin University, Korea Web Chair Ci-Wei Lan, IBM CSDL, Taiwan Steering Committee Marco Aiello, University of Groningen, The Netherlands Jane YJ Hsu, National Taiwan University, Taiwan Robert Hsu, Chung Hua University, Taiwan Christian Huemer, Vienna University of Tech., Austria Takayuki Ito, Nagoya Inst. of Tech., Japan Kwei-Jay Lin, University of California, Irvine, USA Yong Tang, South China Normal University, China

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IEEE DataCom 2017 Submission Deadline (Firm) - July 27, 2017
by Anna Kobusińska 21 Jul '17

21 Jul '17

IEEE DataCom 2017 Orlando, Florida, USA, November 6-10, 2017 http://grid.chu.edu.tw/datacom2017 Dear Colleagues: We cordially invite you to share your latest research results related to Big Data, and Cloud Computing at the IEEE DataCopm 2017 conference. The conference proceedings of DataCom 2017 will be published by IEEE CPS and submitted to IEEE Xplore and indexing services such as EI and ISSN. Selected papers will be published in special issues of prestigious international journals. IEEE DataCom 2017 also welcomes works-in-progress paper, industry paper, demo & poster papers. --------------------------- CALL FOR PAPERS --------------------------- Big data is a rapidly expanding research area spanning the fields of computer science and information management, and has become a ubiquitous term in understanding and solving complex problems in different disciplinary fields such as engineering, applied mathematics, medicine, computational biology, healthcare, social networks, finance, business, government, education, transportation and telecommunications. The goal of the IEEE International Conference on Big Data Intelligence and Computing (IEEE DataCom 2017) is to establish an international forum for engineers and scientists to present their ideas and experiences in the fields of Big Data intelligence and computing. IEEE DataCom 2017 welcomes paper submissions on innovative work from researchers in academia, industry and government describing original research work in Big Data. Authors of selected papers will be invited to submit an extended version (with at least 30% new material) for review and publication in special issues of international journals. IEEE DataCom 2017 will be held on November 6-10, 2017 in Orlando, Florida, USA. Topics of interest include, but are not limited to: - The 5Vs of the data landscape: volume, variety, velocity, veracity, value - Big data science and foundations, analytics, visualization and semantics - Software and tools for big data management. - Security, privacy and legal issues specific to big data - Big data economy, QoS and business models - Scientific discovery and business intelligence - Software, hardware and algorithm co-design, high-performance computing - Large-scale recommendation systems and graph analysis - Infrastructures and systems for big data analytics and managements - Middleware and tools for big data analytics and managements - Algorithmic, experimental, prototyping and implementation - Data quality issues: such as validation, metrics, optimizations and consistency - Data-driven innovation, computational modelling and data integration - Data intensive computing theorems and technologies - Big data for advanced manufacturing and productivity - Modeling, simulation and performance evaluation - Green data centers / environmental-friendly perspectives - Computing, scheduling and resource management for sustainability - Complex applications in areas where massive data is generated ---------------------------------------- PUBLICATION HIGHLIGHTS ---------------------------------------- IEEE CS proceedings, indexed by - IEEE Xplore - Scopus - EI Engineering Index - ACM Digital Library - dblp - Google Scholar Extended version of the selected papers will be invited for publication in prestigious international journals. ---------------------------- IMPORTANT DATES ---------------------------- Research Track: Paper Submission - July 27, 2017 Author Notification - August 27, 2017 Poster/Demo/Special Session: Paper Submission - August 31, 2017 Author Notification - September 6, 2017 Camera ready / registration: September 17, 2017 —----------------- SUBMISSION —----------------- Authors are invited to submit their original research work that has not previously been submitted or published in any other venue. Papers should be prepared in IEEE CS format and submitted via the IEEE DataCom 2017 web site, https://easychair.org/conferences/?conf=ieeedatacom2017 IEEE formatting information: http://www.ieee.org/conferences_events/conferences/publishing/templates.html - Proposals for organizing tutorials, workshops and special sessions need to be submitted to the Tutorials, Workshops and Special Sessions Chairs, respectively. A proposal should include title, theme, scope and main presenters/organizers. - Research paper (8 pages) should explore a specific technology problem and propose a complete solution to it, with experimental results. - Works-in-Progess (WIP) (6 pages) papers are expected to present either work currently in progress or less developed but highly innovative ideas. - Demo/Poster papers (4 pages) must describe working systems and be related to DataCom. These systems may be innovative prototype implementations or mature systems that use related technology. Papers/proposals need to be submitted to the Demo/Poster Chair. - Workshop and Special Session papers need to be submitted to the corresponding workshops and special sessions. All accepted papers in the main tracks, workshops, special sessions and demos/posters will be published in an IEEE Computer Society proceedings (EI indexed). Extended versions of selected excellent papers will be considered for publication in special issues of prestige journals (SCI/EI indexed). ------------------------------- Organizing Committees ------------------------------- General Chairs Sanjay Ranka, University of Florida, USA Hai Jin, HUST, China Manu Malek, Stevens Inst. of Tech., USA General Executive Chairs Jun Wang, University of Central Florida, USA Tao Li, NSF/UFL, USA Program Chairs Anna Kobusinska, Poznan University of Technology, Poland Xiaolin Li, University of Florida, USA Wenguang Chen, Tsinghua University, China Workshop Chairs I-Hsin Chung, IBM Thomas J. Watson Research Center, USA Wuu Yang, National Chiao Tung University, Taiwan Demo/Poster Chair Che-Rung Lee, Tsing Hua University, Taiwan Special Session Chair Hai Jiang, Arkansas State University, USA Award Chair Weisong Shi, Wayne State University, USA International Liaison & Publicity Chair Bingsheng He, Nanyang Technological University, Singapore Jun Huang, Chongqing University of Posts and Telecommunications, China Bahman Javadi, Western Sydney University, Australia William Liu, Auckland University of Technology, and Zealand Bhekisipho Twala, Univ. Johannesburg, South Africa Hao Wang, Norwegian University of Science and Technology, Norway Sheng-De Wang, National Taiwan University, Taiwan Publication Chair Hui-Huang Hsu, Tamkang University, Taiwan Advisory Committee Robert Hsu, Chung Hua University, Taiwan Geoffrey Fox, Indiana University, USA Yuanyuan Yang, Stony Brook University, USA Christophe Cérin, University of Paris XIII, France Yeh-Ching Chung, National Tsing Hua University, Taiwan Jie Li, University of Tsukuba, Japan Beniamino Di Martino, Second University of Naples, Italy Domenico Talia, Università della Calabria, Italy Vincent S. Tseng, National Chiao Tung Univ. Taiwan Cho-Li Wang, The Univ. of Hong Kong, Hong Kong Jinsong Wu, University de Chile, Chile Jinjun Chen, Swinburne University of Technology, Australia Please visit the IEEE DataCom 2017 website http://grid.chu.edu.tw/datacom2017/tpc.php for the complete listing of organizing committee and TPC members. ******************************************************************************** The hpc-announce mailing list has been setup to have a common mailing list to share information with respect to upcoming HPC related events. You are included in this mailing list based on your participation or interest in a previous HPC conference or other event. The purpose for providing a single mailing list is to allow participants to easily identify such emails, and handle them appropriately. Some options include: 1. If you feel that the number of such emails is too many, filter them to less-frequently-read folders in your email client. 2. Change your subscription to a digest option (https://lists.mcs.anl.gov/mailman/listinfo/hpc-announce) which will consolidate emails sent that week into a single summary email. If you do not remember your password (which is needed to change these options), you can reset it using the "Unsubscribe or Edit Options" button at the bottom of the page. 3. Finally, if you do not wish to receive any emails from hpc-announce, you can unsubscribe from the mailing list (https://lists.mcs.anl.gov/mailman/listinfo/hpc-announce) Once unsubscribed, we guarantee that you will not be added back in through participation in a different HPC related conference or event. You will need to send an email to hpc-announce-owner(a)mcs.anl.gov to be added back on. If you need help with any of the above, please email us at hpc-announce-owner(a)mcs.anl.gov. ********************************************************************************

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The 2017 ICDM Workshop on Data Science and Big Data Analytics (DSBDA 2017)
by ICT DataScience 21 Jul '17

21 Jul '17

The 5th ICDM Workshop on Data Science and Big Data Analytics (DSBDA 2017) [http://www.bigdatalab.ac.cn/~dsbda/2017/] In conjunction with The IEEE International Conference on Data Mining (ICDM 2017) [http://icdm2017.bigke.org/] New Orleans, USA · November 18, 2017 Introduction ================ Due to the rapid development of IT technology including Internet, Cloud Computing, Mobile Computing, and Internet of Things, as well as the consequent decrease of cost on collecting and storing data, big data has been generated from almost every industry and sector as well as governmental department. The volume of big data often grows exponentially or even in rates that overwhelm the well-known Moore’s Law. Meanwhile, big data has been extended from traditional structured data into semi-structured and completely unstructured data of various types, such as text, image, audio, video, click streams, log files, etc. It is no doubt that big data can offer us unprecedented opportunities. However, it also poses many grand challenges. Due to the massive volume and inherent complexity, it is extremely difficult to store, aggregate, manage, and analyze big data and finally mine valuable information/knowledge from the complex data/information networks. Therefore, in the presence of big data, the theories, models, algorithms and methods of traditional data related fields, such as, data mining, data engineering, machine learning, statistical learning, computer programming, pattern recognition and learning, visualization, uncertainty modeling, and high performance computing etc., become no longer effective and efficient. On the other hand, some data is generated exponentially or super-exponentially in a streaming manner. Therefore, how to delicately analyze and deeply understand big data so as to obtain dynamical and incremental information / knowledge, is a grand challenge. In general, at the era of big data, it is expected to develop new theories, models, algorithms, methods, and paradigms for mining, analyzing, and understanding big data, and even a new inter-discipline, Data Science, for studying the perception, acquisition, transportation, storage, management, analysis, visualization, and applications of big data, and finally implement the transformation from data to knowledge. DSBDA 2017 aims to provide a networking venue that will bring together scientists, researchers, professionals, and practitioners from both industry and academia and from different disciplines (including computer science, social science, network science, etc.) to exchange ideas, discuss solutions, share experiences, promote collaborations, and report state-of-the-art research work on various aspects of data science and big data analytics. Topics ================ The topics of interest include, but are not limited to: * Data science and data analytics * Acquisition, representation, indexing, storage, and management of big data * Processing, pre-processing, and post-processing of big data * Models, algorithms, and methods for big data mining and understanding * Knowledge discovery and acquisition from big data * Visualizing analytics and organization for big data * Streaming data processing * Context data mining from big Web data * Social computing over big Web data * Industrial and scientific applications of big data * Tools for big data analytics Submissions ================ The page limit of workshop papers is 8 pages in the standard IEEE 2-column format ( http://www.ieee.org/conferences_events/conferences/publishing/templates.html) including the bibliography and any possible appendices. All papers must be formatted according to the IEEE Computer Society proceedings manuscript style, following IEEE ICDM 2017 submission guidelines available at http://icdm2017.bigke.org/. Papers should be submitted in PDF format, electronically, using the CyberChair submission system: https://wi-lab.com/cyberchair/2017/icdm17/scripts/submit.php?subarea=SP04&u… . Note that all accepted papers will be included in the IEEE ICDM 2017 Workshops Proceedings volume published by IEEE Computer Society Press, and will also be included in the IEEE Xplore Digital Library. The workshop proceedings will be in a CD separated from the CD of the main conference. The CD is produced by IEEE Conference Publishing Services (CPS). Therefore, papers must not have been accepted for publication elsewhere or be under review for another workshop, conferences or journals. Important Dates ================ Submissions Due Date: August 7, 2017 Notifications of Acceptance: September 7, 2017 Camera-Ready Deadline: September 15, 2017 Workshop Date: November 18, 2017 Steering Committee =================== Prof. Benjamin W. Wah, Chinese University of Hong Kong, China Prof. Jinpeng Huai, Beihang University, China Prof. Xueqi Cheng, Institute of Computing Technology, Chinese Academy of Sciences, China Workshop Chairs ================ Dr. Xiaolong Jin Institute of Computing Technology, Chinese Academy of Sciences (CAS), China Email: jinxiaolong(a)ict.ac.cn Dr. Jiafeng Guo Institute of Computing Technology, Chinese Academy of Sciences (CAS), China Email: guojiafeng(a)ict.ac.cn Dr. Huewei Shen Institute of Computing Technology, Chinese Academy of Sciences (CAS), China Email: shenhuawei(a)ict.ac.cn

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