computational.science

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SDM 2020 Call for Papers
by Alfredo Cuzzocrea 28 Aug '19

28 Aug '19

20th SIAM International Conference on Data Mining May 7 - May 9, 2020, Cincinnati, OH, USA ======================================== SDM 2020 - http://www.siam.org/meetings/sdm20 Call for Papers Scope ===== Data mining is the computational process for discovering valuable knowledge from data - the core of modern Data Science. It has enormous application in numerous fields, including science, engineering, healthcare, business, and medicine. Typical datasets in these fields are large, complex, and often noisy. Extracting knowledge from these datasets requires the use of sophisticated, high-performance, and principled analysis techniques and algorithms, which are based on sound theoretical and statistical foundations. These techniques in turn require implementations on high performance computational infrastructure that are carefully tuned for performance. Powerful visualization technologies along with effective user interfaces are also essential to make data mining tools appealing to researchers, analysts, data scientists and application developers from different disciplines, as well as usable by stakeholders. The SDM conference provides a venue for researchers who are addressing these problems to present their work in a peer-reviewed forum. It also provides an ideal setting for graduate students and others new to the field to learn about cutting-edge research by hearing outstanding invited speakers and attending presentations and tutorials (included with conference registration). A set of focused workshops is also held on the last day of the conference. The proceedings of the conference are published in archival form and are also made available on the SIAM web site. Topics of Interest ================== *Methods and Algorithms -Anomaly & Outlier Detection -Big Data & Large-Scale Systems -Classification & Semi-Supervised Learning -Clustering & Unsupervised Learning -Data Cleaning & Integration -Deep Learning & Representation Learning -Frequent Pattern Mining -Feature Extraction, Selection and Dimensionality Reduction -Mining Data Streams -Mining Graphs & Complex Data -Mining on Emerging Architectures & Data Clouds -Mining Semi Structured Data -Mining Spatial & Temporal Data -Mining Text, Web & Social Media -Online Algorithms -Optimization Methods -Parallel and Distributed Methods -Probabilistic & Statistical Methods -Scalable & High-Performance Mining -Other Novel Methods *Applications -Astronomy & Astrophysics -Automation & Process Control -Climate / Ecological / Environmental Science -Customer Relationship Management -Data Science -Drug Discovery -Finance -Genomics & Bioinformatics -Healthcare Management -High Energy Physics -Intelligence Analysis -Internet of Things -Intrusion & Fraud detection -Logistics Management -Recommendation -Risk Management -Social Network Analysis -Supply Chain Management -Other Emerging Applications *Human Factors and Social Issues -Ethics of Data Mining -Intellectual Ownership -Interestingness & Relevance -Privacy and Fairness Models -Privacy Preserving Data Mining -Risk Analysis and Risk Management -Transparency and Algorithmic Bias -User Interfaces and Visual Analytics -Other Human and Social Issues Submission URL ============== https://cmt3.research.microsoft.com/SDM2020 Workshop and Tutorials ====================== The conference will feature workshops and tutorials on several special topics. Please see the SDM 2020 website for submission requirements. Examples of workshops and tutorials are available through the SDM 2019 website, http://www.siam.org/meetings/sdm19/ Organization ============ GENERAL CO-CHAIRS Nitesh Chawla, University of Notre Dame, USA Carlotta Domeniconi, George Mason Univeristy, USA PROGRAM CO-CHAIRS Yan Liu, University of Southern California, USA Sriraam Natarajan, University of Texas at Dallas, USA WORKSHOPS CO-CHAIRS Yuxiao Dong, Microsoft Research, USA Gregor Stiglic, University of Maribor, Slovenia TUTORIALS CHAIR Danai Koutra, University of Michigan, USA DOCTORAL FORUM CHAIRS Matteo Riondato, Amherst College, USA Brandeis Marshall, Spelman College, USA PANELS CHAIR Zhenhui Jessie Li, Penn State University, USA PUBLICITY CHAIRS Xiang Ren, University of Southern California, USA Alfredo Cuzzocrea, University of Calabria, Italy Sourangshu Bhattacharya, IIT, Kharagpur, India AWARDS CHAIR TBA STEERING COMMITTEE CHAIR Zoran Obradovic, Temple University, USA LOCAL CHAIR Ping Zhang, Ohio State University, USA Important Dates (tentative) =========================== Abstract Submission: October 4, 2019 11:59pm (US Eastern Time) Paper Submission: October 11, 2019 11:59pm (US Eastern Time) Workshop Proposals: October 4, 2019 11:59pm (US Eastern Time) Tutorial Proposals: October 4, 2019 11:59pm (US Eastern Time)

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11th International Women in HPC workshop at SC'19
by Mariam Umar 28 Aug '19

28 Aug '19

**11th International Women in HPC Workshop: Diversifying the HPC Community and Engaging Male Allies** Sunday November 17th 2019 Denver, Colorado, USA https://womeninhpc.org/whpc-sc19/workshop # Call for Lightning Talks Women-in-HPC will once again attend the Supercomputing conference to discuss diversity and inclusivity topics. Activities will bring together women and male allies from across the international HPC community, provide opportunities to network, showcase the work of inspiring women, and discuss how we can all work towards improving the under-representation of women in supercomputing. The 11th International Women in High Performance Computing (WHPC) workshop at SC19 in Denver brings together the HPC community to discuss the growing importance of increasing diversity in the workplace. This workshop will recognize and discuss the challenges of improving the proportion of women in the HPC community, and is relevant for employers and employees throughout the supercomputing workforce who are interested in addressing diversity. ## Sessions will focus on the following areas: - Surviving difficult events and how to minimize the impact on your career - Managing and resolving imposter syndrome - Building an effective professional network - How to get a new job or promotion - Behaviors for inclusion: coping strategies for unconscious bias and micro-aggression - Dealing with the guilt while being a parent, guardian and caregiver - Pointers on making and engaging male allies at workplace **Call for Lightning Talks: Now Open!** Deadline for submissions: August 14th 2019 AOE As part of the workshop, we invite submissions from women in industry and academia to present their work as a lightning talk. This will promote the engagement of women in HPC research and applications, provide opportunities for peer to peer networking, and the opportunity to interact with female role models and employers. Submissions are invited on all topics relating to HPC from users and developers. All abstracts should emphasize the computational aspects of the work, such as the facilities used, the challenges that HPC can help address and any remaining challenges etc. For details please see: https://womeninhpc.org/whpc-sc19/submit/ # Workshop Committee - Workshop Chair: Misbah Mubarak, Amazon Web Services, USA - Co-chair: Gokcen Kestor, Pacific Northwest National Laboratory, USA - General Chair: Toni Collis, Women-in-HPC co-founder and director - Invited Talks Chair: Kaoutar El Maghraoui, IBM Thomas J. Watson Research Center, USA - Poster and Lightning Talks Chair: Mariam Umar, Intel Corporation, USA - Posters & Lightning Talks Vice Chair: Weronika Filinger, EPCC, University of Edinburgh,UK - Mentoring chair: Mozhgan Kabiri Chimeh, University of Sheffield, UK # Program Committee (for Early Career Lightning Talks) - Elsa Gonsioworski, Lawrence Livermore National Laboratory, USA - Raquell Holmes, Improvscience, USA - Elizabeth Bautista, NERSC, Lawrence Berkeley National Laboratory, USA - Jo Adegbola, Amazon Web Services, USA - Mozghan Kabiri, University of Sheffield, UK - Karen Divine, Sandia National Laboratory, USA - Zhiling Lan, Illinois Institute of Technology, USA - Hadia Ahmed, Lawrence Berkeley National Laboratory, USA - Lavanya Ramakrishnan, Lawrence Berkeley National Laboratory, USA - Debbie Bard, Lawrence Berkeley National Laboratory, USA - Rosa Filgueira, EPCC, UK -Mahwish Arif, CAM, UK - Baiou Shi, PSU, USA - Neelofer Banglawala, EPCC, UK -- Regards, Mariam Umar

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Final CFP - CloudCom 2019 (Cloud Computing Technology and Science), Dec. 2019, Sydney, Australia
by Jesson Butt 26 Aug '19

26 Aug '19

Final Call for papers: The 11th IEEE International Conference on Cloud Computing Technology and Science (CloudCom 2019) will be held in Sydney, Australia on 11-13 December 2019. Website: http://www.swinflow.org/confs/2019/cloudcom/ Key dates: Submission Deadline: August 31, 2019 (11:59pm UTC/GMT, firm) Notification: September 30, 2019 Final Manuscript Due: October 15, 2019 Submission site: http://www.swinflow.org/confs/2019/cloudcom/submission.htm Publication: Proceedings will be published by IEEE CS Press. Special issues: Distinguished papers will be selected for special issues in Future Generation Computer Systems, Journal of Parallel and Distributed Computing, Concurrency and Computation: Practice and Experience, Pattern Recognition Letters. =========== Introduction CloudCom is the premier conference on Cloud Computing worldwide, attracting researchers, developers, users, students and practitioners from the fields of big data, systems architecture, services research, virtualization, security and privacy, high performance computing, always with an emphasis on how to build cloud computing platforms with real impact. The conference is co-sponsored by the Institute of Electrical and Electronics Engineers (IEEE), is steered by the Cloud Computing Association, and draws on the excellence of its world-class Program Committee and its participants. Topics of interest of CloudCom 2019 include, but are not limited to: - Architecture, Storage and Virtualization - Cloud Services and Applications - Security, Privacy and Trust - Edge Computing and Distributed Cloud (1) Track 1: Architecture, Storage and Virtualization - Intercloud architecture models - Virtual Machines (VMs), containers, unikernels and microservices - Cloud services delivery models, campus integration & “last mile” issues - Virtualization technology and enablers (network virtualization, software-defined networking) - Networking technologies - Cloud system design with FPGAs, GPUs, APUs - Storage & file systems - Scalability & performance - Resource provisioning, monitoring, management & maintenance - Operational, economic & business models - Green data centers - Computational resources, storage & network virtualization - Resource monitoring - Virtual desktops - Resilience, fault tolerance, disaster recovery - Modeling & performance evaluation - Disaster recovery - Energy efficiency (2) Track 2: Cloud Services and Applications - XaaS (everything as a service including IaaS, PaaS, and SaaS) - Cloud services models & frameworks - Service deployment and orchestration in the Cloud - Cloud service management - Cloud workflow management - Cloud services reference models & standardization - Cloud-powered services design - Cloud elasticity - Machine learning and systems interactions - Data management applications & services - Service for computing-intensive applications - Mining and analytics - Data-provisioning services - Cloud programming models, benchmarks, and tools - Cloud-based services & protocols - Fault-tolerance & availability of cloud services and applications - Application development and debugging tools - Business models & economics of cloud services (3) Track 3: Security, Privacy and Trust - Accountability & audit - Authentication & authorization - Cloud integrity - Blockchain Cloud services - Cryptography in the Cloud - Hypervisor security - Identity management & security as a service - Prevention of data loss or leakage - Secure, interoperable identity management - Trust & credential management - Trust models for cloud services - Usable security Risk management in cloud computing environments - Privacy policy framework for clouds - Privacy-preserving data mining for clouds - Information sharing and data protection in the cloud - Cryptographic protocols against internal attacks in clouds - Privacy protection in cloud platforms - Energy/cost/efficiency of security in clouds (4) Track 4: Edge Computing and Distributed Cloud - Cloudlet-enabled applications - Distributed Cloud Infrastructure - Foundations and principles of distributed cloud computing - Architectural models, prototype implementations and applications - Cloud brokers and coordination across multiple resource managers - Interoperability and mobility - Software infrastructure for cloudlets - Dynamic resource, service and context management on edge computing - Fog Computing - IoT cloud architectures & models - Cloud-based context-aware IoT - Economics and pricing - Experience with and performance evaluation of existing deployments and measurements (public, private, hybrid, federated environments) (5) Short Papers, Posters, and Demo Submission Guidelines Submissions must include an abstract, keywords, the e-mail address of the corresponding author and should not exceed 8 pages for main conference, including tables and figures in IEEE CS format. The template files for LATEX or WORD can be downloaded here. All paper submissions must represent original and unpublished work. Each submission will be peer reviewed by at least three program committee members. Submission of a paper should be regarded as an undertaking that, should the paper be accepted, at least one of the authors will register for the conference and present the work. Submit your paper(s) in PDF file at the submission site: http://www.swinflow.org/confs/2019/cloudcom/submission.htm. Publications Accepted and presented papers will be included into the conference proceedings. Distinguished papers presented at the conference, after further revision, will be published in special issues of selected journals. General Chairs Albert Zomaya, The University of Sydney, Australia Rajkumar Buyya, The University of Melbourne, Australia Laurence Yang, St. Francis Xavier University, Canada Program Chairs Jinjun Chen, Swinburne University of Technology, Australia Rajiv Ranjan, Newcastle University, UK Aniello Castiglione, University of Naples Parthenope, Italy Workshops and Tutorials Chairs Xuyun Zhang, The University of Auckland, New Zealand Short Papers, Posters, and Demo Chair Muneeb Hassan, Swinburne University of Technology, Australia Phd Consortium Chair Deepak Puthal, Newcastle University, UK Track 1: Architecture, Storage and Virtualization Luiz F. Bittencourt, University of Campinas (UNICAMP), Brazil Muhammad Usman, Federation University, Australia Track 2: Cloud Services and Applications Laura Ricci, University of Pisa, Italy James Zheng, Macquarie University, Australia Track 3: Security, Privacy and Trust Martin Gilje Jaatun, University of Stavanger, Norway Li Li, Monash University, Australia Track 4: Edge Computing and Distributed Cloud Sarunas Girdzijauskas, KTH, Sweden Xiao Liu, Deakin University, Australia

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Doreen Thomas Postdoctoral Fellowships for Women
by Uwe Aickelin 26 Aug '19

26 Aug '19

The Melbourne School of Engineering has introduced the Doreen Thomas Postdoctoral Fellowships to attract, or to retain, outstanding female doctoral graduates and provide a career pathway to a global Teaching and Research academic career at the University of Melbourne. We are currently looking for accomplished, enthusiastic, and interested early-career female doctoral graduates for multiple fellowships within the three schools of MSE: * Computing and Information Systems * Chemical and Biomedical Engineering * Electrical, Mechanical and Infrastructure Engineering More details can be found here: LinkedIn<https://www.linkedin.com/jobs/view/1441685438> Seek<https://www.seek.com.au/job/39782535?searchrequesttoken=9e11c449-42dd-4296-…> University of Melbourne Careers<http://jobs.unimelb.edu.au/caw/en/job/900626/doreen-thomas-postdoctoral-fel…> Applications close Sunday 13 October 2019. About Doreen Thomas “Professor Emeritus Doreen Thomas is a leading academic whose work has spanned the fields of mathematics and electrical and mechanical engineering. Her career at the University of Melbourne has lasted over 40 years and practical applications of her research have had significant commercial impact. Doreen is a powerful advocate for women in engineering and mathematics. She chairs the Science, Technology, Engineering and Mathematics (STEM) Education Forum at the Australian Academy of Technological Sciences and Engineering. While at the University of Melbourne’s School of Engineering, she helped create nine research fellowships to launch and accelerate the careers of female academics. In 2006, she was appointed the University of Melbourne’s first female professor in engineering. She was the first woman at the university to become head of each of the departments she led, and the first woman in Victoria to become head of two different university departments. Doreen’s long and distinguished career has been inspirational for other women in mathematics and science. She has made significant contributions to knowledge with real-world impact, promoted the next generation of women in STEM disciplines, and taught mathematics to generations of engineering students.” – Vic.gov.au Professor Uwe Aickelin | Head of School of Computing and Information Systems Melbourne School of Engineering Level 8, Doug McDonell Building, 168 Grattan Street The University of Melbourne, Victoria 3010 Australia T: +61 3 8344 3635 E: uwe.aickelin(a)unimelb.edu.au<mailto:uwe.aickelin@unimelb.edu.au> http://aickelin.com/ | http://linkedin.com/in/aickelin

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[CFP] IA^3 2019 - Deadline approaching!
by Tumeo, Antonino 25 Aug '19

25 Aug '19

[Apologies if you receive multiple copies of this CFP] IA^3 2019 9th Workshop on Irregular Applications: Architectures and Algorithms http://hpc.pnl.gov/IA3 November 18, 2019 Colorado Convention Center, Denver, CO In conjunction with SC19 Sponsored by IEEE TCHPC Proceedings published in the IEEE Digital Library through IEEE TCHPC. -------------------- Important Dates -------------------- Abstract Submission: August 28, 2019 Position or Regular Paper Submission: September 4, 2019 Notification: October 1, 2019 Camera-ready: October 10, 2019 Workshop: November 18, 2019 -------------------- Call for Papers -------------------- Irregular applications occur in many subject matters. While inherently parallel, they exhibit highly variable execution performance at a local level due to unpredictable memory access patterns and/or network transfers, divergent control structures, and data imbalances. Moreover, they often require fine-grain synchronization and communication on large-data structures such as graphs, trees, unstructured grids, sparse matrices, deep nets, tables, and their combinations (such as, for example, attributed graphs). They have a significant degree of latent parallelism, which however is difficult to exploit due to their complex behavior. Current high performance architectures rely on data locality and regular computation to reduce access latencies, and often do not cope well with the requirements of these applications. Furthermore, irregular applications are difficult to scale on current supercomputing machines, due to their limits in fine-grained synchronization and small data transfers. Irregular applications pertain both to well established and emerging fields, such as machine learning, social network analysis, bioinformatics, semantic graph databases, Computer Aided Design (CAD), and computer security. Many of these application areas also process massive sets of unstructured data, which keep growing exponentially. Emerging supercomputing applications are moving towards a convergence of scientific simulation, data analytics, and learning algorithms, mixed in various ways. Addressing the issues of irregular applications on current and future architectures will become critical to solve the challenges in science and data analysis of the next few years. This workshop seeks to explore solutions for supporting efficient execution of irregular applications in the form of new features at the level of the micro- and system-architecture, network, languages and libraries, runtimes, compilers, analysis, algorithms. Topics of interest, of both theoretical and practical significance, include but are not limited to: - Micro- and System-architectures, including multi- and many-core designs, heterogeneous processors, accelerators (GPUs, vector processors, Automata processor), reconfigurable (coarse grained reconfigurable and FPGA designs) and custom processors - Network architectures and interconnect (including high-radix networks, optical interconnects) - Novel memory architectures and designs (including processors-in memory) - Impact of new computing paradigms on irregular workloads (including neuromorphic processors and quantum computing) - Modeling, simulation and evaluation of novel architectures with irregular workloads - Innovative algorithmic techniques - Combinatorial algorithms (graph algorithms, sparse linear algebra, etc.) - Impact of irregularity on machine learning approaches - Parallelization techniques and data structures for irregular workloads - Data structures combining regular and irregular computations (e.g., attributed graphs) - Approaches for managing massive unstructured datasets (including streaming data) - Languages and programming models for irregular workloads - Library and runtime support for irregular workloads - Compiler and analysis techniques for irregular workloads - High performance data analytics applications (including graph databases and solutions that combine graph algorithms with machine learning) - Applications that integrate scientific simulation, data analytics, and learning, and require efficient execution of irregular workloads Besides regular papers, papers describing work-in-progress or incomplete but sound, innovative ideas related to the workshop theme are also encouraged. We solicit both 8-page regular papers and 4-page position papers. Authors of exciting but not mature enough regular papers may be offered the option of a short 4-page paper and related short presentation. -------------------- Submissions -------------------- Submission site: https://submissions.supercomputing.org Submitted manuscripts may not exceed eight (8) pages in length for regular papers and four (4) pages for position papers including figures, tables and references. Authors of regular papers will be able to provide up to one (1) additional pages for the Artifact Description (AD) appendix and, after paper acceptance, up to two (2) additional pages for the Artifact Evaluation (AE) appendix. The templates are available at: http://www.ieee.org/conferences_events/conferences/publishing/templates.html. Accepted papers will be published in the IEEE Digital Library through IEEE TCHPC. -------------------- Artifact Description & Evaluation -------------------- This edition of the workshop invites authors of regular papers to follow a reproducibility initiative like the main SC Conference, with specific appendices for the Artifact Description (AD) and the Artifact Evaluation (AE). Please refer to the SC reproducibility page for further details on the rationale behind AD and AE: https://sc19.supercomputing.org/submit/reproducibility-initiative/. Authors of regular papers will be able to use up to one (1) additional page to provide an Artifact Description (AD) Appendix, describing the details of their software environments and computational experiments to the extent that an independent person could replicate their results. This additional page is voluntary, and must focus only on details on software environments and methods to execute the experiments. It should not add details on the proposed technical approaches. If a paper has no computational results, the appendix only needs to mention that computational results are not part of the paper. Additionally, authors of accepted regular papers will be invited to formally submit their supporting materials to the Artifact Evaluation (AE) process. The process is voluntary, but authors that will participate in the AE will be eligible for the Best Paper Award of the workshop. Supporting materials for the AE include access to the actual software artifact, shared publicly (for example, through the CK - Collective Knowledge - https://github.com/ctuning/ck format), and two (2) further additional pages of the paper that details how to reproduce the results of the paper. For details on how to submit supporting materials to the AE process, please refer to: http://ctuning.org/ae/submission.html. Authors participating in the AE will receive an assessment of the artifact, and the related badge on their paper. For any additional question on the AD and the AE please contact the Artifact Evaluation Chair Flavio Vella at mailto:Flavio.Vella@unibz.it. -------------------- Organizers -------------------- Antonino Tumeo (PNNL), mailto:antonino.tumeo@pnnl.gov John Feo (PNNL), mailto:john.feo@pnnl.gov Vito Giovanni Castellana (PNNL), mailto:vitoGiovanni.castellana@pnnl.gov -------------------- Proceedings Chair -------------------- Marco Minutoli (PNNL and WSU), mailto:marco.minutoli@pnnl.gov -------------------- Artifact Evaluation Chair -------------------- Favio Vella (Free University of Bozen), mailto:Flavio.Vella@unibz.it -------------------- Technical Program Committee -------------------- Nesreen Ahmed, Intel, US Ashwin M. Aji, AMD, US Kubilay Atasu, IBM Zurich, CH Scott Beamer, University of California, Santa Cruz, US Jonathan Beard, ARM, US Michela Becchi, North Carolina State University, US Sanjukta Bhowmick, University of North Texas, US Erik Boman, Sandia National Laboratories, US David Brooks, Harvard University, US Aydin Buluc, Lawrence Berkeley National Laboratory, US Anastasiia Butko, Lawrence Berkeley National Laboratory, US Tim Davis, Texas A&M University, US Assefaw Gebremedhin, Washington State University, US Rajiv Gupta, University of California, Riverside, US George Karypis, University of Minnesota, US Peter M. Kogge, Notre Dame University, US Manoj Kumar, IBM TJ Watson, US John Leidel, Tactical Computing Labs, US Kamesh Madduri, Pennsylvania State University, US José Moreira, IBM TJ Watson, US Miquel Moretó, Barcelona Supercomputing Center, ES Walid Najjar, University of California, Riverside, US Maxim Naumov, Facebook, US Fanny Nina-Paravecino, Intel, US Roger Pearce, Lawrence Livermore National Laboratory, US Cynthia Phillips, Sandia National Laboratories, US Keshav Pingali, University of Texas, Austin, US Alejandro Rico, ARM, US Jason Riedy, Georgia Tech, US John Shalf, Lawrence Livermore National Laboratory, US Edgar Solomonik, University of Illinois, Urbana Champaign, US Ruud van der Pas, Oracle, US Ana Lucia Varbanescu, University of Amsterdam, NL Jishen Zhao, University of California, San Diego, US Other members TBD

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Paper Deadline in Less Than 1 Month - Data Science for Future Energy Systems HiPC Workshop 2019
by sanmukh＠hipc.org 23 Aug '19

23 Aug '19

********************************************************************** We apologize if you received multiple copies of this Call for Papers Please feel free to distribute it to those who might be interested ********************************************************************** Paper Deadline in Less Than 1 Month - Data Science for Future Energy Systems - HiPC Workshop 2019 https://hipc.org/dsfes 17 December 2019 Hyderabad, India CALL FOR WORKSHOP PAPER An Energy System is defined as a system primarily designed to supply energy services to end users. Such systems form the backbone of modern economy and include power grids, oilfields, heating/cooling systems, etc. The design of efficient, reliable and scalable Energy Systems for the future requires making them smarter and transitioning them into Future Energy Systems via novel data driven solutions built on top of the existing monitoring and control infrastructure. The goal of this workshop is to highlight and encourage discussions regarding novel applications of data science and data analytics techniques in the domain of Energy Systems such as smart (power) grids, smart oilfields, smart heating/cooling systems etc. Data driven techniques enabling transition to Future Energy Systems via improved sustainability and electrification of the energy systems, Uberization of the energy systems, mobility changes due to future energy systems, etc. are solicited. This workshop seeks submissions related to the following topic areas as applicable to the domain of future energy systems: * Discovery of knowledge and insights using data * Data Analytics Applications: Learning, prediction, anomaly detection, pattern recognition, search, mining, etc. * Data management/infrastructure * Data privacy/security * Data driven modeling * Data driven decision making * Data driven techniques enabling energy transition for improved sustainability and electrification * Uberization of energy systems enabling peer-to-peer transactions, minimizing distance between the producer and consumers, user rating system for quality of service, etc. * Mobility changes due to future energy systems MANUSCRIPT GUIDELINES Submitted manuscripts should be structured as technical papers and may not exceed six (6) single-spaced double-column pages using 10-point size font on 8.5 x 11 inch pages (IEEE conference style), including figures, tables, and references. See IEEE style templates at this page for details. Electronic submissions must be in the form of a readable PDF file. All manuscripts will be reviewed by the Program Committee and evaluated on originality, relevance of the problem to the conference theme, technical strength, rigor in analysis, quality of results, and organization and clarity of presentation of the paper. Submitted papers must represent original unpublished research that is not currently under review for any other conference or journal. Papers not following these guidelines will be rejected without review and further action may be taken, including (but not limited to) notifications sent to the heads of the institutions of the authors and sponsors of the conference. Presentation of an accepted paper at the workshop is a requirement of publication. Any paper that is not presented at the conference will not be included in proceedings. IMPORTANT DATES Paper Submission: September 20th, 2019 Notification to Authors: October 14th, 2019 Workshop camera-ready: October 28th, 2019 SUBMISSION PORTAL Easychair Submission Link: https://easychair.org/conferences/?conf=dsfes2019 ORGANIZING COMMITTEE Sanmukh R. Kuppannagari, University of Southern California, USA Chayan Sarkar, TCS Research, India PROGRAM COMMITTEE MEMBERS Ram Balachandran, India Charalampos Chelmis, University of Albany, USA Sanmukh R. Kuppannagari (organizer), University of Southern California, USA Akshay Uttama Nambi, Microsoft Research, India Anand Panangadan, California State University, USA Laks Raghupati, Shell, India Kiran Sajjanshetty, Voyage Auto Inc., USA Chayan Sarkar (organizer), TCS Research & Innovation, India Ajitesh Srivastava, University of Southern California, USA Mahima Agumbe Suresh, San Jose State University, USA

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HiPC 2019 Workshops' Paper Deadlines in Less Than 1 Month
by sanmukh＠hipc.org 17 Aug '19

17 Aug '19

********************************************************************** We apologize if you received multiple copies of this message Please feel free to distribute it to those who might be interested ********************************************************************** HiPC 2019 WORKSHOP PAPER DEADLINES ********************************************************************** The 26th annual IEEE International Conference on High Performance Computing, Data, and Analytics (HiPC 2019) will be held at the Hyderabad International Convention Centre, Hyderabad, India, during 17-20 December 2019. Complementing the main technical program, HiPC workshops serve to broaden the technical scope of the conference in emerging areas of high performance computing, communication, data and analytics and their applications. Below is the listing of the workshops with deadlines to be held on the first day of the conference, December 17th. Please follow the links below for a detailed description and the Call for Papers of each workshop. SEPTEMBER 15, 2019 * Workshop on Education for High Performance Computing (EduHiPC) - https://hipc.org/eduhipc-2019 SEPTEMBER 20, 2019 * Multi-tier Big Data Pipelines from Edge to the Cloud Data Centers - https://hipc.org/bigdata/ * Workshop on Data Science for Future Energy Systems - https://hipc.org/dsfes/ * Workshop on Memory and Storage Systems 2019 (WoMSS) - http://hipc.org/womss/ WORKSHOP CO-CHAIRS * Vandana Janeja, University of Maryland, Baltimore County, USA * Antonino Tumeo, Pacific Northwest National Laboratory, USA Workshops co-chairs may be contacted at workshops(a)hipc.org.

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Call For Papers - 12th HiPC Student Research Symposium (SRS)
by sanmukh＠hipc.org 14 Aug '19

14 Aug '19

*** 12th HiPC Student Research Symposium (SRS) *** Held in conjunction with the 26th INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING, DATA, and ANALYTICS (HIPC 2019) December 17-20, 2019 | Hyderabad, INDIA | www.hipc.org OVERVIEW HiPC 2019 will feature the 12th Student Research Symposium on High Performance Computing, Data, and Analytics (HPC) aimed at stimulating and fostering student research, and providing an international forum to highlight student research accomplishments. The symposium will also provide exposure to students in the best practices in HPC in academia and industry. The symposium will feature student posters and provide students with other enriching experiences, such as workshops, industry exhibits, and demos. The Conference Reception and multiple Student Symposium Poster Exhibit sessions will provide an opportunity for students to interact with HPC researchers and practitioners (and recruiters) from academia and industry. Awards for Best Poster, sponsored by IEEE Computer Society – Technical Committee on Parallel Processing (TCPP) – will be presented at the symposium. An online book containing the resumes of the students participating in the symposium will be compiled and made available to the sponsors of the HiPC 2019 conference. TOPICS Papers are solicited in all areas of high-performance computing, data, and analytics, including but not limited to topics mentioned below. High-Performance Computing Algorithms: This track invites papers that describe original research on developing new parallel and distributed computing algorithms, and related advances. Examples of topics that are of interest include (but not limited to): • New parallel and distributed algorithms and design techniques; • Advances in enhancing algorithmic properties or providing guarantees (e.g., fault tolerance, resilience, concurrency, data locality, communication-avoiding); • Classical and emerging computation models (e.g., parallel/distributed models, quantum computing, neuromorphic and other bioinspired models); • Provably efficient parallel and distributed algorithms for advanced scientific computing and irregular applications (e.g., numerical linear algebra, graph algorithms, computational biology); and • Algorithmic techniques for resource allocation and optimization (e.g., scheduling, load balancing, resource management). Architectures: This track invites papers that describe original research on the design and evaluation of high-performance computing architectures, and related advances. Examples of topics of interest include (but not limited to): • Design and evaluation of high-performance processing architectures (e.g., reconfigurable, system-on-chip, many cores, vector processors); • Design and evaluation of networks for high-performance computing platforms (e.g., interconnect topologies, network-on-chip); • Design and evaluation of memory, cache and storage architectures (e.g., 3D, photonic, Processing-In-Memory, NVRAM, burst buffers, parallel I/O); • Approaches to improve architectural properties (e.g., energy/power efficiency, reconfigurable, resilience/fault tolerance, security/privacy); and • Emerging computational architectures (e.g., quantum computing, neuromorphic and other bioinspired architectures). Applications: This track invites papers that describe original research on the design and implementation of scalable applications for execution on parallel and distributed platforms, and related advances. Examples of topics of interest include (but not limited to): • Design and implementation of shared and distributed memory parallel applications (e.g., scientific computing and industry applications, emerging applications in IoT and life sciences – biology, medicine, chemistry, etc.); • Design and simulation methodologies for scaling applications on peta and exascale platforms (e.g., co-design approaches, hardware/software co-design, heterogeneous and hybrid programming); • Hardware acceleration of parallel applications (e.g., CPU/GPUs, multi-GPU clusters, FPGA, vector processors, manycore); and • Design of application benchmarks for parallel and distributed platforms. Systems Software: This track invites papers that describe original research on the design, implementation, and evaluation of systems software for high-performance computing platforms, and related advances. Examples of topics of interest include (but not limited to): • Scalable systems and software architectures for high-performance computing (e.g., middleware, operating systems, I/O services); • Techniques to enhance parallel performance (e.g., compiler/runtime optimization, learning from application traces, profiling); • Techniques to enhance parallel application development and productivity (e.g., Domain-Specific Languages, programming environments, performance/correctness checking and debugging); • Techniques to deal with uncertainties, hardware/software resilience, and fault tolerance; • Software for the cloud, data center, and exascale platforms (e.g., middleware tools, schedulers, resource allocation, data migration, load balancing); and • Software and programming paradigms for heterogeneous platforms (e.g., libraries for CPU/GPU, multi-GPU clusters, and other accelerator platforms). Data Science Scalable Algorithms and Analytics: This track invites papers that describe original research on developing scalable algorithms for data analysis at scale, and related advances. Examples of topics of interest include (but not limited to): • New scalable algorithms for fundamental data analysis tasks (supervised, unsupervised learning, and pattern discovery); • Scalable algorithms that are designed to address the characteristics of different data sources and settings (e.g., graphs, social networks, sequences, data streams); • Scalable algorithms and techniques to reduce the complexity of large-scale data (e.g., streaming, sublinear data structures, summarization, compressive analytics); • Scalable algorithms that are designed to address requirements in different data-driven application domains (e.g., life sciences, business, agriculture); and • Scalable algorithms that ensure the transparency and fairness of the analysis. Scalable Systems and Software: This track invites papers that describe original research on developing scalable systems and software for handling data at scale, and related advances. Examples of topics of interest include (but not limited to): • Design of scalable system software to support various applications (e.g., recommendation systems, web search, crowdsourcing applications, streaming applications); • Design of scalable system software for various architectures (e.g., OpenPower, GPUs, FPGAs); • Architectures and systems software to support various operations in large data frameworks (e.g., storage, retrieval, automated workflows, data organization, visualization, visual analytics, human-in-the-loop); • Design and implementation of systems software for distributed data frameworks (e.g., distributed file system, virtualization, cloud services, resource optimization, scheduling); and • Standards and protocols for enhancing various aspects of data analytics (e.g., open data standards, privacy-preserving, and secure schemes). IMPORTANT DATES Aug 19, 2019 > Submission Opens Sep 16, 2019 > Submission Deadline Nov 9, 2019 > Accept/Reject Decision Notification Dec 17-20, 2019 > Symposium ELIGIBILITY Submissions should have at least one author who is a student during any part of the calendar year 2019. Submissions may have multiple student or non-student co-authors. Submissions must mark student authors with an asterisk (*). SUBMISSION INSTRUCTIONS In order to be considered for a poster at the Student Research Symposium, authors must submit papers, not exceeding five (5) letter size (8.5in x 11in) pages, in 11 or 12 point font, single-spaced, with 1'' margins on all sides. Papers are to be submitted online in PDF format through Easychair at: https://easychair.org/conferences/?conf=hipc2019. The papers will be used to select posters, but will NOT be published in the conference proceedings. This will provide students the flexibility to publish an extended version of their paper at other venues, after benefiting from reviewer feedback from the symposium. Papers submitted to the symposium are expected to be reviewed by at least three independent reviewers. Papers will be judged on technical merit, quality, relevance to the symposium, and related parameters. Plagiarism, in any form, especially verbatim reproduction from other published works, is prohibited. Papers that are plagiarized will be rejected, and the corresponding department and institution will be notified. Facilities for displaying posters will be made available, and the exact specifications of the poster size will be provided later. At least one student author of each paper that is accepted must register and attend the conference to present their work. Papers with no-shows will be retroactively rejected. TRAVEL SUPPORT We expect to provide a travel scholarship to at least one student author of each accepted submission from an Indian university, subject to availability of funding. This scholarship will cover partial expenses for attending the conference. Further details on this scholarship and the application process will be provided later. SYMPOSIUM CO-CHAIRS Ashok Srinivasan, University of West Florida, USA Ramakrishna Upadrasta, IIT Hyderabad, India SYMPOSIUM VICE-CHAIR Dip Sankar Banerjee, IIIT Guwahati, India CONTACT Contact student_symposium at hipc dot org for more details.

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[CFP] IA^3 2019 - 9th SC Workshop on Irregular Applications: Architectures and Algorithms
by Tumeo, Antonino 11 Aug '19

11 Aug '19

[Apologies if you receive multiple copies of this CFP] IA^3 2019 9th Workshop on Irregular Applications: Architectures and Algorithms http://hpc.pnl.gov/IA3 November 18, 2019 Colorado Convention Center, Denver, CO In conjunction with SC19 Sponsored by IEEE TCHPC -------------------- Call for Papers -------------------- Irregular applications occur in many subject matters. While inherently parallel, they exhibit highly variable execution performance at a local level due to unpredictable memory access patterns and/or network transfers, divergent control structures, and data imbalances. Moreover, they often require fine-grain synchronization and communication on large-data structures such as graphs, trees, unstructured grids, sparse matrices, deep nets, tables, and their combinations (such as, for example, attributed graphs). They have a significant degree of latent parallelism, which however is difficult to exploit due to their complex behavior. Current high performance architectures rely on data locality and regular computation to reduce access latencies, and often do not cope well with the requirements of these applications. Furthermore, irregular applications are difficult to scale on current supercomputing machines, due to their limits in fine-grained synchronization and small data transfers. Irregular applications pertain both to well established and emerging fields, such as machine learning, social network analysis, bioinformatics, semantic graph databases, Computer Aided Design (CAD), and computer security. Many of these application areas also process massive sets of unstructured data, which keep growing exponentially. Emerging supercomputing applications are moving towards a convergence of scientific simulation, data analytics, and learning algorithms, mixed in various ways. Addressing the issues of irregular applications on current and future architectures will become critical to solve the challenges in science and data analysis of the next few years. This workshop seeks to explore solutions for supporting efficient execution of irregular applications in the form of new features at the level of the micro- and system-architecture, network, languages and libraries, runtimes, compilers, analysis, algorithms. Topics of interest, of both theoretical and practical significance, include but are not limited to: - Micro- and System-architectures, including multi- and many-core designs, heterogeneous processors, accelerators (GPUs, vector processors, Automata processor), reconfigurable (coarse grained reconfigurable and FPGA designs) and custom processors - Network architectures and interconnect (including high-radix networks, optical interconnects) - Novel memory architectures and designs (including processors-in memory) - Impact of new computing paradigms on irregular workloads (including neuromorphic processors and quantum computing) - Modeling, simulation and evaluation of novel architectures with irregular workloads - Innovative algorithmic techniques - Combinatorial algorithms (graph algorithms, sparse linear algebra, etc.) - Impact of irregularity on machine learning approaches - Parallelization techniques and data structures for irregular workloads - Data structures combining regular and irregular computations (e.g., attributed graphs) - Approaches for managing massive unstructured datasets (including streaming data) - Languages and programming models for irregular workloads - Library and runtime support for irregular workloads - Compiler and analysis techniques for irregular workloads - High performance data analytics applications (including graph databases and solutions that combine graph algorithms with machine learning) - Applications that integrate scientific simulation, data analytics, and learning, and require efficient execution of irregular workloads Besides regular papers, papers describing work-in-progress or incomplete but sound, innovative ideas related to the workshop theme are also encouraged. We solicit both 8-page regular papers and 4-page position papers. Authors of exciting but not mature enough regular papers may be offered the option of a short 4-page paper and related short presentation. -------------------- Important Dates -------------------- Abstract Submission: August 28, 2019 Position or Regular Paper Submission: September 4, 2019 Notification: October 1, 2019 Camera-ready: October 10, 2019 Workshop: November 18, 2019 -------------------- Submissions -------------------- Submission site: https://submissions.supercomputing.org Submitted manuscripts may not exceed eight (8) pages in length for regular papers and four (4) pages for position papers including figures, tables and references. Authors of regular papers will be able to provide up to one (1) additional pages for the Artifact Description (AD) appendix and, after paper acceptance, up to two (2) additional pages for the Artifact Evaluation (AE) appendix. The templates are available at: http://www.ieee.org/conferences_events/conferences/publishing/templates.html. Accepted papers will be published in the IEEE Digital Library through IEEE TCHPC. -------------------- Artifact Description & Evaluation -------------------- This edition of the workshop invites authors of regular papers to follow a reproducibility initiative like the main SC Conference, with specific appendices for the Artifact Description (AD) and the Artifact Evaluation (AE). Please refer to the SC reproducibility page for further details on the rationale behind AD and AE: https://sc19.supercomputing.org/submit/reproducibility-initiative/. Authors of regular papers will be able to use up to one (1) additional page to provide an Artifact Description (AD) Appendix, describing the details of their software environments and computational experiments to the extent that an independent person could replicate their results. This additional page is voluntary, and must focus only on details on software environments and methods to execute the experiments. It should not add details on the proposed technical approaches. If a paper has no computational results, the appendix only needs to mention that computational results are not part of the paper. Additionally, authors of accepted regular papers will be invited to formally submit their supporting materials to the Artifact Evaluation (AE) process. The process is voluntary, but authors that will participate in the AE will be eligible for the Best Paper Award of the workshop. Supporting materials for the AE include access to the actual software artifact, shared publicly (for example, through the CK - Collective Knowledge - https://github.com/ctuning/ck format), and two (2) further additional pages of the paper that details how to reproduce the results of the paper. For details on how to submit supporting materials to the AE process, please refer to: http://ctuning.org/ae/submission.html. Authors participating in the AE will receive an assessment of the artifact, and the related badge on their paper. For any additional question on the AD and the AE please contact the Artifact Evaluation Chair Flavio Vella at mailto:Flavio.Vella@unibz.it. -------------------- Organizers -------------------- Antonino Tumeo (PNNL), mailto:antonino.tumeo@pnnl.gov John Feo (PNNL), mailto:john.feo@pnnl.gov Vito Giovanni Castellana (PNNL), mailto:vitoGiovanni.castellana@pnnl.gov -------------------- Proceedings Chair -------------------- Marco Minutoli (PNNL and WSU), mailto:marco.minutoli@pnnl.gov -------------------- Artifact Evaluation Chair -------------------- Favio Vella (Free University of Bozen), mailto:Flavio.Vella@unibz.it -------------------- Technical Program Committee -------------------- Nesreen Ahmed, Intel, US Ashwin M. Aji, AMD, US Kubilay Atasu, IBM Zurich, CH Scott Beamer, University of California, Santa Cruz, US Jonathan Beard, ARM, US Michela Becchi, North Carolina State University, US Sanjukta Bhowmick, University of North Texas, US Erik Boman, Sandia National Laboratories, US David Brooks, Harvard University, US Aydin Buluc, Lawrence Berkeley National Laboratory, US Anastasiia Butko, Lawrence Berkeley National Laboratory, US Tim Davis, Texas A&M University, US Assefaw Gebremedhin, Washington State University, US Rajiv Gupta, University of California, Riverside, US George Karypis, University of Minnesota, US Peter M. Kogge, Notre Dame University, US Manoj Kumar, IBM TJ Watson, US John Leidel, Tactical Computing Labs, US Kamesh Madduri, Pennsylvania State University, US José Moreira, IBM TJ Watson, US Miquel Moretó, Barcelona Supercomputing Center, ES Walid Najjar, University of California, Riverside, US Maxim Naumov, Facebook, US Fanny Nina-Paravecino, Intel, US Roger Pearce, Lawrence Livermore National Laboratory, US Cynthia Phillips, Sandia National Laboratories, US Keshav Pingali, University of Texas, Austin, US Alejandro Rico, ARM, US Jason Riedy, Georgia Tech, US John Shalf, Lawrence Livermore National Laboratory, US Edgar Solomonik, University of Illinois, Urbana Champaign, US Ruud van der Pas, Oracle, US Ana Lucia Varbanescu, University of Amsterdam, NL Jishen Zhao, University of California, San Diego, US Other members TBD

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Reminder: Call for nomination deadline Aug. 15 - 2019 IEEE CS Early Career Researcher Award in HPC
by Vladimir Getov 09 Aug '19

09 Aug '19

Call for Nominations: 2019 IEEE CS TCHPC Early Career Researchers Award for Excellence in High Performance Computing The IEEE Computer Society TCHPC Early Career Researchers Award for Excellence in High Performance Computing recognizes up to 3 individuals who have made outstanding, influential, and potentially long-lasting contributions in the field of high-performance computing within 5 years of receiving their PhD degree as of January 01 of the year of the award. It is sponsored by the IEEE Computer Society Technical Consortium on High Performance Computing (TCHPC) and its member Technical Committees: - Technical Committee on Parallel Process (TCPP) - Technical Committee on Computer Communications (TCCC) - Technical Committee on Distributed Processing (TCDP) - Technical Committee on Cloud Computing (TCCLD) - Task Force on Rebooting Computing (TFRC) - Technical Committee on Computational Life Sciences (TCCLS) Nominations: A candidate must be nominated by member(s) of the community. An individual may nominate at most one candidate for this award. The nomination application must be submitted via email to tchpc-awards(a)computer.org as a single PDF file and should contain the following details: 1. Name/email of person making the nomination (self-nominations are not eligible). 2. Name/email of candidate for whom the award is recommended. 3. A statement by the nominator (maximum of 500 words) as to why the nominee is highly deserving of the award. Note that since the award is for outstanding contributions, the statement and supporting letters should address what the contributions are and why they are both outstanding and significant. The nomination should also list the names and email of up to 3 persons who have provided letters supporting the nomination. 4. CV of the nominee. 5. Up to three letters of support from persons other than the nominator +IBM- these should be collected by the nominator and included in the nomination. Important Dates: - Nomination Deadline: August 15, 2019 - Results Notification:September 15, 2019 Award Selection Committee: The award selection committee consists of: - Lin Gan, Tsinghua University and National Supercomputing Center in Wuxi, China - Vladimir Getov, University of Westminster, UK (Chair) - Minyi Guo, Shanghai Jiao Tong University, China - Ananth Kalyanaraman, Washington State University, USA - Christine Morin, Inria, France - Irene Qualters, Los Alamos National Laboratory, USA - Satoshi Sekiguchi, National Institute of Industrial Science and Technology, Japan - Min Si, Argonne National Laboratory, USA - Yogesh Simmhan, Indian Institute of Science, Bangalore, India - Edgar Solomonik, University of Illinois at Urbana-Champaign, USA Note that members of the selection committee cannot be nominators or provide support letters. Award Presentation Note: Awardees will be presented a plaque and will be recognized by IEEE Computer Society and TCHPC websites, newsletters and archives. The awards will be presented at the SC19 conference that will be held in Denver, CO, USA during November 18-21, 2019. Details of the conference can be found at http://sc19.supercomputing.org/. For more information, please send email to tchpc-awards(a)computer.org. The University of Westminster is a charity and a company limited by guarantee. Registration number: 977818 England. Registered Office: 309 Regent Street, London W1B 2HW. This message and its attachments are private and confidential. If you have received this message in error, please notify the sender and remove it and its attachments from your system.

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