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[Deadline Extended] HiPC 2024 CALL FOR PAPERS
by HiPC 2024 Publicity Chairs 19 Jun '24

19 Jun '24

!!! DEADLINE EXTENDED !!! HiPC 2024 CALL FOR PAPERS 31st IEEE International Conference on High Performance Computing, Data, and Analytics 18–21 December 2024 in Bangalore, India Now accepting papers till July 3, 2024 (AOE)! Important Dates: Abstract Submission: June 26, 2024 (AOE) Paper Submission (double-blind): July 3, 2024 (AOE) Reviews to Authors: August 22, 2024 (Thursday) Rebuttal Period: August 22-27, 2024 (Thursday to Tuesday) Author Notification: September 13, 2024 (Friday) … [View More]Shepherded Paper Submission: September 27, 2024 (Friday) Final Author Notification: October 5, 2024 (Friday) Submit your paper: https://ssl.linklings.net/conferences/HiPC/ Questions may be sent to pc2024(a)hipc.org HiPC 2024 is the 31 edition of the IEEE International Conference on High Performance Computing, Data, and Analytics. HiPC serves as a forum to present current work by researchers from around the world as well as highlight activities in Asia in the areas of high performance computing and data science. The meeting focuses on all aspects of high performance computing systems, and data science and analytics, and their scientific, engineering, and commercial applications. HiPC 2024 will also explore programs that expand and enrich the conference offerings, including workshops, tutorials, Birds-of-a-Feather meetings, Student Research Symposium, and industrial sessions, which provide increased professional opportunities to conference attendees. Authors are invited to submit original unpublished research manuscripts that demonstrate current research in all areas of high performance computing, and data science and analytics, covering all traditional areas and emerging topics including from machine learning, big data analytics. Each submission should be submitted to one of the six tracks listed under the two broad themes of High Performance Computing and Data Science. Please see https://www.hipc.org/papers/ for more details. Up to two best paper awards will be given to outstanding contributed papers. Authors of selected high quality papers in HiPC 2024 will be invited to submit extended versions of their papers for possible publication in a special issue of the Journal of Parallel and Distributed Computing (JPDC). GENERAL CO-CHAIRS: Sanmukh Rao Kuppannagari, Case Western Reserve University, USA Arnab K. Paul, Birla Institute of Technology and Science Pilani, Goa Campus, India PROGRAM CO-CHAIRS: HPC: Devesh Tiwari, Northeastern University, USA Data Science: Preeti Malakar, Indian Institute of Technology Kanpur, India STEERING COMMITTEE CHAIR: Viktor K. Prasanna, University of Southern California, USA ============================================================ This email was sent to computational.science(a)lists.iccsa.org (mailto:computational.science@lists.iccsa.org) why did I get this? (https://hipc.us14.list-manage.com/about?u=29dc8951f64eba10697825402&id=40e3…) unsubscribe from this list (https://hipc.us14.list-manage.com/unsubscribe?u=29dc8951f64eba10697825402&i…) update subscription preferences (https://hipc.us14.list-manage.com/profile?u=29dc8951f64eba10697825402&id=40…) HiPC . Marathahalli . Bangalore, Karnataka 560037 . India [View Less]

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Call for Papers PAW-ATM 2024: Parallel Applications Workshop, Alternatives To MPI+X
by Morris Wright, Karla Vanessa 18 Jun '24

18 Jun '24

**************************************************************** Call for Papers PAW-ATM 2024: Parallel Applications Workshop, Alternatives To MPI+X Held in conjunction with SC24, Atlanta, GA Submissions deadline: July 24, 2024 Notification to authors: August 30, 2024 Workshop date: November 17, 2024 https://sourceryinstitute.github.io/PAW/ **************************************************************** SUMMARY As supercomputers become more and more powerful, the number and diversity of … [View More]applications that can be tackled with these machines grows. Unfortunately, the architectural complexity of these supercomputers grows as well, with heterogeneous processors, multiple levels of memory hierarchy, and many ways to move data and synchronize between processors. The MPI+X programming model, use of which is considered by many to be standard practice, demands that a programmer be expert in both the application domain and the low-level details of the architecture(s) on which that application will be deployed, and the availability of such superhuman programmers is a critical bottleneck. Things become more complicated when evolution and change in the underlying architecture translates into significant re-engineering of the MPI+X code to maintain performance. Numerous alternatives to the MPI+X model exist, and by raising the level of abstraction on the application domain and/or the target architecture, they offer the ability for "mere mortal" programmers to take advantage of the supercomputing resources that are available to advance science and tackle urgent real-world problems. However, compared to the MPI+X approach, these alternatives generally lack two things. First, they aren't as well known as MPI+X and a domain scientist may simply not be aware of models that are a good fit to their domain. Second, they are less mature than MPI+X and likely have more functionality or performance "potholes" that need only be identified to be addressed. PAW-ATM is a forum for discussing HPC applications written in alternatives to MPI+X. Its goal is to bring together application experts and proponents of high-level languages to present concrete example uses of such alternatives, describing their benefits and challenges. SCOPE AND AIMS The PAW-ATM workshop is designed to be a forum for discussion of supercomputing-scale parallel applications and their implementation in programming models outside of the dominant MPI+X paradigm. Papers and talks will explore the benefits (or perhaps drawbacks) of implementing specific applications with alternatives to MPI+X, whether those benefits are in performance, scalability, productivity, or some other metric important to that application domain. Presenters are encouraged to generalize the experience with their application to other domains in science and engineering and to bring up specific areas of improvement for the model(s) used in the implementation. In doing so, our hope is to create a setting in which application authors, language designers, and architects can present and discuss the state of the art in alternative scalable programming models, while also wrestling with how to increase their effectiveness and adoption. Beyond well-established HPC scientific simulations, we also encourage submissions exploring artificial intelligence, big data analytics, machine learning, and other emerging application areas. Topics of interest include, but are not limited to: * Novel application development using high-level parallel programming languages and frameworks * Examples that demonstrate performance, compiler optimization, error checking, and reduced software complexity * Applications from artificial intelligence, data analytics, bioinformatics, and other novel areas * Performance evaluation of applications developed using alternatives to MPI+X and comparisons to standard programming models * Novel algorithms enabled by high-level parallel abstractions * Experience with the use of new compilers and runtime environments * Libraries using or supporting alternatives to MPI+X * Benefits of hardware abstraction and data locality on algorithm implementation Papers that include description of applications that demonstrate the use of alternative programming models will be given higher priority. SUBMISSIONS Submissions are solicited in two tracks: 1) Full-length papers presenting novel research results: * Full-length papers will be published in the workshop proceedings. Submitted papers must describe original work that has not appeared in, nor is under consideration for another conference or journal. Papers shall be eight (8) pages minimum and not exceed ten (10) pages including text, figures, and non-AD appendices, but excluding bibliography and acknowledgments. PAW-ATM follows the reproducibility initiative of SC24. Submissions shall include an Artifact Description (AD) appendix. The appendix pages related to the reproducibility initiative dependencies are not included in the page count. See https://sourceryinstitute.github.io/PAW/ for further details. 2) User experience abstracts: * Abstracts will be evaluated separately and will not be included in the published proceedings. Submissions in this track will include a title and a 1-page abstract and the content may include any combination of novel and/or previously published work that is relevant to the workshop's scope. WORKSHOP CHAIR * Karla Vanessa Morris Wright - Sandia National Laboratories ORGANIZING COMMITTEE * Engin Kayraklioglu - Hewlett Packard Enterprise * Kenjiro Taura - University of Tokyo PROGRAM COMMITTEE CO-CHAIRS * Bill Long - Hewlett Packard Enterprise * Daniele Lezzi - Barcelona Supercomputing Center PROGRAM COMMITTEE * Marjan Asgari - National Resources Canada * Scott Baden - University of California, San Diego * Dan Bonachea - Lawrence Berkeley National Laboratory * Jan Ciesko - Sandia National Laboratory * Nelson Dias - Federal University of Parana * Mario Di Renzo - University of Salento * David Eberius - Intel * Engin Kayraklioglu - Hewlett Packard Enterprise * Daniele Lezzi - Barcelona Supercomputing Center * Bill Long - Hewlett Packard Enterprise * Francesc Lordan - Barcelona Supercomputing Center * Henry Monge Camacho - Oak Ridge National Laboratory * Karla Morris - Sandia National Laboratories * Irene Moulitsas - Cranfield University * Catherine Olschanowsky - Advanced Micro Devices, Inc * Tom Quinn - University of Washington * Michel Schanen - Argonne National Laboratory * Michael Schlottke-Lakemper - University of Augsburg * Elliott Slaughter - SLAC National Accelerator Laboratory * Kenjiro Taura - University of Tokyo * Thiago Teixeira - Intel * Jana Thayer - SLAC National Accelerator Laboratory * Miwako Tsuji - Riken Advanced Institute for Computational Science ADVISORY COMMITTEE * Bradford L. Chamberlain - Hewlett Packard Enterprise * Damian W. I. Rouson - Lawrence Berkeley National Laboratory ARTIFACT EVALUATION COMMITTEE CHAIR * Irene Moulitsas - Cranfield University * Elliott Slaughter - SLAC National Accelerator Laboratory ARTIFACT EVALUATION COMMITTEE MEMBERS * Oliver Alvarado Rodriguez - New Jersey Institute of Technology * Desmond Bisandu - Cranfield University * Yakup Budanaz - ETH Zurich * Fabio Durastante - University of Pisa * Guillaume Helbecque - University of Lille * Boyu Neil Kuang - Cranfield University * Soren Rasmussen - National Center for Atmospheric Research * Kate Rasmuseen - Lawrence Berkeley National Laboratory * Anjiang Wei - Stanford University IMPORTANT DATES * Manuscript Submissions deadline: July 24, 2024 * Artifact Description (AD) Stage 1 (mandatory) Submissions deadline: July 24, 2024 * Notification to authors: August 30, 2024 * Artifact Evaluation (AE) Stage 2 (optional) Submissions deadline: September 4, 2024 * AE and Reproducibility Badges review period: September 5-27, 2024 * Camera-ready papers due from authors: September 20, 2024 * Final program: September 27, 2024 * Final AD/AE/Badges decisions and notification to authors: September 30, 2024 * Camera-ready AD/AE due from authors: October 2, 2024 * November 17, 2024: Workshop at SC24 [View Less]

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CFP: SBAC-PAD'2024, Hawaii, USA, November 13-15, 2024
by laurent.lefevre＠ens-lyon.fr 15 Jun '24

15 Jun '24

*** Apologies if multiple copies are received *** Call for Papers SBAC-PAD'2024 IEEE/SBC 36th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2024) November 13-15, 2024 Hilo Hawaiian Hotel, Hawaii, USA https://sites.google.com/ime.usp.br/sbac2024 SBAC-PAD is an annual international conference series, which presents the latest trends, current research and developments, and novel tools and applications in the fields of Computer Architecture, … [View More] High-Performance Computing, and Parallel and Distributed Computing technologies. SBAC-PAD is open to industry, faculty, researchers, practitioners, and undergraduate and graduate students from around the world. Its scientific program is composed of high-quality submitted papers, selected by a thorough peer review process, and invited talks from renowned researchers. ***** Important dates Abstract submission deadline July 16th, 2024 AoE (FIRM) Paper submission deadline July 16th, 2024 AoE (FIRM) Rebuttal period August 19 — August 22, 2024 Author notification September 02, 2024 Camera-ready submission September 23, 2024 The program committee will select the top-ranked papers as finalists, and one paper will be selected during the conference as the Best Paper. Selected papers will also be invited to submit an extended version to a special issue of the Journal of Parallel and Distributed Computing. ***** Topics of Interest Authors are invited to submit original manuscripts to one of five tracks that address challenges in any of the following areas related to the fields of Computer Architecture (CA) and High-performance and Distributed Computing (HPDC). Topics of interest include (but are not limited to): Application-specific systems; Architecture and programming support for emerging domains: Big Data, Deep Learning, Machine learning, Cognitive Systems; Artificial intelligence and machine learning methods for CA and HPDC, and CA and HPDC for Artificial intelligence applications; Benchmarking, performance modeling, analysis, and evaluation; Blockchain and distributed ledgers; Cloud, cluster, and edge/fog computing systems; Data-intensive workloads and tools; Data management, storage, and I/O; Embedded and pervasive systems; GPUs, FPGAs, and accelerator architectures; Languages, compilers, and tools for parallel and distributed programming; Modeling and simulation methodologies; Operating systems and virtualization; Parallel and distributed systems, algorithms, models, and applications; Power and energy-efficient systems; Predictive models to improve performance of scientific applications Processing-in-memory or near-data processing technologies Processor, cache, memory, storage, and network architecture; Quantum computing in CA and HPDC; Real-world applications and case studies; Reconfigurable, resilient, and fault-tolerant systems; Security and privacy in CA and HPDC; Workflow systems. ***** Paper submission Papers submitted to SBAC-PAD 2024 must present original research results and must not have been published or concurrently be submitted anywhere else. Please check the conference website for the submission link: https://sites.google.com/ime.usp.br/sbac2024/home Paper submissions must be in English, have 10 pages maximum (excluding the references), and follow the IEEE conference manuscript formatting guidelines for double-column text using a single-spaced 10-point font on 8.5 × 11-inch pages. Templates are available from http://www.ieee.org/conferences/publishing/templates.html. Papers that do not meet these requirements might be rejected without a review. To be published in the conference proceedings and to be eligible for publication at the IEEE Xplore, one of the authors must register at the full rate and present his/her work at the conference. The SBAC-PAD 2024 submissions will undergo a double-anonymized review process, where reviewers will not know the authors' identities, and vice-versa. Therefore, authors should “anonymize” their submission by adopting the following guidelines, otherwise papers will be rejected without review: The authors cannot include their names, affiliations, funding sources, or acknowledgments in any part of the for-review version of their paper; Self-references that are relevant to the work are allowed, but they should not appear in the text in the first person. Instead, they should be referenced in the third person, like “Smith et al. found that… [4].”, and; For the authors' own unpublished work, they need to use anonymous citations. Conference Organisation ***** General Chairs Gerald F. Lofstead (Sandia National Laboratories, USA) Alfredo Goldman (University of Sao Paulo, Brazil) ***** Technical Program Co-Chairs Carla Osthoff (National Laboratory for Scientific Computing, Brazil) J. Nelson Amaral (University of Alberta, Canada) ***** Track Chairs Computer Architecture: Marco Zanata Alves (Universidade Federal do Parana, Brazil) Distributed Systems, Networking, and Storage: Lucas Schor (Universidade Federal do Rio Grande do Sul, Brazil) Parallel Applications and Algorithms: Rosa M. Badia (Barcelona SuperComputing Centre, Spain) Performance Evaluation: Marcos Assuncao (Ecole de Technologie Supérieure, Montreal) System Software: Vinod Rebello (Universidade Federal Fluminense) [View Less]

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HiPC 2024 CALL FOR PAPERS
by Publicity HiPC 04 Jun '24

04 Jun '24

HiPC 2024 CALL FOR PAPERS 31st IEEE International Conference on High Performance Computing, Data, and Analytics 18–21 December 2024 in Bangalore, India HiPC 2024 is the 31 edition of the IEEE International Conference on High Performance Computing, Data, and Analytics. HiPC serves as a forum to present current work by researchers from around the world as well as highlight activities in Asia in the areas of high performance computing and data science. The meeting focuses on all aspects of high … [View More]performance computing systems, and data science and analytics, and their scientific, engineering, and commercial applications. HiPC 2024 will also explore programs that expand and enrich the conference offerings, including workshops, tutorials, Birds-of-a-Feather meetings, Student Research Symposium, and industrial sessions, which provide increased professional opportunities to conference attendees. Authors are invited to submit original unpublished research manuscripts that demonstrate current research in all areas of high performance computing, and data science and analytics, covering all traditional areas and emerging topics including from machine learning, big data analytics. Each submission should be submitted to one of the six tracks listed under the two broad themes of High Performance Computing and Data Science. Please see https://www.hipc.org/papers/ for more details. Up to two best paper awards will be given to outstanding contributed papers. Authors of selected high quality papers in HiPC 2024 will be invited to submit extended versions of their papers for possible publication in a special issue of the Journal of Parallel and Distributed Computing (JPDC). *Important Deadlines:*Abstract Submission: June 19, 2024 (Wednesday) Paper Submission (double-blind): June 26, 2024 (Wednesday) Reviews to Authors: August 22, 2024 (Thursday) Rebuttal Period: August 22-27, 2024 (Thursday to Tuesday) Author Notification: September 13, 2024 (Friday) Shepherded Paper Submission: September 27, 2024 (Friday) Final Author Notification: October 5, 2024 (Friday) Submit your paper: https://ssl.linklings.net/conferences/HiPC/ Questions may be sent to pc2024(a)hipc.org GENERAL CO-CHAIRS: Sanmukh Rao Kuppannagari, Case Western Reserve University, USA Arnab K. Paul, Birla Institute of Technology and Science Pilani, Goa Campus, India PROGRAM CO-CHAIRS: HPC: Devesh Tiwari, Northeastern University, USA Data Science: Preeti Malakar, Indian Institute of Technology Kanpur, India STEERING COMMITTEE CHAIR: Viktor K. Prasanna, University of Southern California, USA [View Less]

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VHPC'24: late-breaking submission opportunity till June 7th (extended)
by Tommaso Cucinotta 23 May '24

23 May '24

[apologies for cross-postings] ==================================================================== CALL FOR PAPERS 19th Workshop on Virtualization in High-Performance Cloud Computing (VHPC '24) held in conjunction with the European Conference on Parallel and Distributed Computing, Aug 26th, 2024, Madrid, Spain. ==================================================================== Late-breaking submission deadline: June 7th, 2024 AoE (extended) (Springer LNCS Proceedings) Date: August 26th, … [View More]2024 Workshop URL: https://vhpc.github.io/ To submit an abstract or paper, please follow the link provided in the Call for Papers (CfP) announcement at the end of this message. Call for Papers Containers and virtualization technologies constitute key enabling factors for flexible resource management in modern data centers, and particularly in cloud environments. Cloud providers need to manage complex infrastructures in a seamless fashion to support the highly dynamic and heterogeneous workloads and hosted applications customers deploy. Similarly, HPC environments have been increasingly adopting techniques that enable flexible management of vast computing and networking resources, close to marginal provisioning cost, which is unprecedented in the history of scientific and commercial computing. Various virtualization-containerization technologies contribute to the overall picture in different ways: machine virtualization, with its capability to enable consolidation of multiple underutilized servers with heterogeneous software and operating systems (OSes), and its capability to live-migrate a fully operating virtual machine (VM) with a very short downtime, enables novel and dynamic ways to manage physical servers; OS-level virtualization (i.e., containerization), with its capability to isolate multiple user-space environments and to allow for their co-existence within the same OS kernel, promises to provide many of the advantages of machine virtualization with high levels of responsiveness and performance; lastly, uni-kernels provide for many virtualization benefits with a minimized OS/library surface. I/O virtualization, in turn, allows physical network interfaces to exchange traffic with multiple VMs or containers; network virtualization, with its capability to create logical network overlays independently from the underlying physical topology, is another fundamental enabling technology for Cloud/HPC infrastructures. Last, storage virtualization needs to evolve to support increasingly demanding requirements in terms of performance and reliability for the managed application data. Publication Accepted papers will be published in a Springer LNCS proceedings volume. Topics of Interest The VHPC program committee solicits original, high-quality submissions related to virtualization across the entire software stack with a special focus on the intersection of HPC, containers/ virtualization and cloud computing. Each topic encompasses aspects related to design/architecture, management, performance management, modeling and\ configuration/tooling: Design / Architecture: - Containers and OS-level virtualization (LXC, Docker/Podman, Nitro/Firecracker, Singularity) - Hypervisor support for heterogeneous resources (GPUs, NPUs, co-processors, FPGAs, etc.) - GPU hypervisor memory virtualization in support of high-memory LLM training workloads - Hypervisor extensions to mitigate side-channel attacks ([micro-]architectural timing attacks, privilege escalation) - Use of Risc-V related technologies for cloud, virtualized and HPC use-cases - VM & Container trust and security models - Multi-environment coupling, system software supporting in-situ analysis with HPC simulation - Cloud reliability, fault-tolerance and high-availability - Cloud-based quantum compute services - Energy-efficient and power-aware virtualization - Containers inside VMs with hypervisor isolation - Virtualization support for emerging memory and storage technologies - Lightweight/specialized operating systems in conjunction with virtual machines - Unikernels and use cases for virtualized HPC environments - Formal definition and verification of hypervisors and virtualization system properties - ARM-based hypervisors, ARM virtualization extensions Management: - Container and VM management for HPC and cloud environments - Virtualized/Cloudified instances to support Lambda / Function-as-a- Service (FaaS) Paradigms - HPC services integration, services to support HPC - Service and on-demand scheduling & resource management - Dedicated workload management with VMs or containers - Workflow coupling with VMs and containers - Unikernels and lightweight VM application management - Environments and tools for operating containerized environments (batch, orchestration) - Models for non-HPC workload provisioning on HPC resources Performance Measurements and Modeling: - Performance improvements for or driven by unikernels - Optimizations of virtual machine monitor platforms and hypervisors - Scalability analysis of VMs and/or containers at large scale - Performance measurement, modeling and monitoring of virtualized/ cloud workloads - Virtualization in supercomputing environments, HPC clusters, HPC in the cloud with an emphasis on AI GPUs/TPUs/NPUs - Energy-efficient deployment of high-performance, ultra-low latency and real-time workloads in cloud infrastructures - Modeling, control and isolation of end-to-end performance for parallel & distributed cloud/HPC applications, including the use of cloud functions / FaaS Configuration / Tooling: - Tool support for unikernels: configuration/build environments, debuggers, profilers - Job scheduling/control/policy and container placement in virtualized environments - Measuring and controlling "OS/Virtualization noise" - Operating MPI in containers/VMs and Unikernels - GPU virtualization operationalization This year, we are calling the timely topic of virtualization in support of high-memory LLM training workloads including, but not limited to: - GPU hypervisor memory virtualization: Techniques for virtualizing GPU memory to allow flexible and efficient allocation across multiple workloads, enabling higher utilization of GPU resources - Flat CPU/GPU memory page tables/TLB: Unified virtual memory spaces and page table structures that allow both GPUs to address CPU memory mapped to accelerator global memory space - Storage/filesystem to virtual memory mapped approaches - Distributed memory virtualization - Memory compression and reduction techniques: approaches for compressing model parameters, activations, and gradients to reduce memory requirements during training - Out-of-core training algorithms - Efficient memory allocation and management: Techniques for optimizing memory allocation, reducing fragmentation, and improving memory utilization during training - Memory-efficient data formats and processing: Data formats and processing techniques that minimize memory overhead while maintaining training efficiency - Benchmarking and profiling tools: Tools and methodologies for measuring, analyzing, and optimizing memory usage in LLM training workloads - Case studies and applications: Real-world examples and applications of virtualization techniques in LLM training scenarios The Workshop on Virtualization in High-Performance Cloud Computing (VHPC) aims to bring together researchers and industrial practitioners facing the challenges posed by virtualization in order to foster discussion, collaboration, mutual exchange of knowledge and experience, enabling research to ultimately provide novel solutions for virtualized computing systems of tomorrow. The workshop will be one day in length, composed of 20 min paper presentations, each followed by 10 min discussion sections, plus lightning talks that are limited to 5 minutes. Presentations may be accompanied by interactive demonstrations. Important Dates Rolling abstract submission May 20th, 2024 AoE (extended) - Paper submission deadline Jun 20th, 2024 - Acceptance notification Jul 1st, 2024 - Camera-ready due Aug 26th-27th, 2024 - Workshop Day(s) Organization Michael Alexander (chair), Austrian Academy of Sciences Anastassios Nanos (co-chair), Nubificus Ltd., UK Tommaso Cucinotta (co-chair), Scuola Superiore Sant'Anna, Italy Publicity chair Remo Andreoli, Scuola Superiore Sant'Anna, Italy Technical Program Committee - Stergios Anastasiadis, University of Ioannina, Greece - Gabriele Ara, Scuola Superiore Sant'Anna - Jakob Blomer, CERN, Switzerland - Eduardo César, Universidad Autonoma de Barcelona, Spain - Taylor Childers, Argonne National Laboratory, USA - François Diakhaté, CEA DAM, France - Roberto Giorgi, University of Siena, Italy - Kyle Hale, Northwestern University, USA - Giuseppe Lettieri, University of Pisa, Italy - Nikos Parlavantzas, IRISA, France - Amer Qouneh, Western New England University, USA - Carlos Reaño, Queen’s University Belfast, UK - Riccardo Rocha, CERN, Switzerland - Lutz Schubert, University of Ulm, Germany - Jonathan Sparks, Cray, USA - Kurt Tutschku, Blekinge Institute of Technology, Sweden - John Walters, USC ISI, USA - Yasuhiro Watashiba, Osaka University, Japan - Chao-Tung Yang, Tunghai University, Taiwan Paper Submission-Publication Papers submitted to the workshop will be reviewed by at least two members of the program committee and external reviewers. Submissions should include abstract, keywords, the e-mail address of the corresponding author, and must not exceed 12 pages, including tables and figures at a main font size no smaller than 11 points. Submission of a paper should be regarded as a commitment that, should the paper be accepted, at least one of the authors will register and attend the conference to present the work. Accepted papers will be published in a Springer LNCS volume. Initial submissions are in PDF; authors of accepted papers will be requested to provide source files. Lightning Talks Lightning Talks are in a non-paper track, synoptical in nature and are strictly limited to 5 minutes. They can be used to gain early feedback on ongoing research, for demonstrations, to present research results, early research ideas, perspectives and positions of interest to the community. Submit abstracts via the main submission link. General Information The workshop will be held in conjunction with the International European Conference on Parallel and Distributed Computing on Aug 26-30, 2024, Madrid, Spain. Abstract, Paper Submission Link: https://edas.info/newPaper.php?c=31582 LNCS Format Guidelines: https://www.springer.com/gp/computer-science/lncs/conference-proceedings-gu… Follow VHPC Updates on X: https://twitter.com/VHPCworkshop -- Tommaso Cucinotta, Associate Professor in Computer Engineering, PhD Coordinator of the Cyber Physical Research Area Real-Time Systems Laboratory (ReTiS) Scuola Superiore Sant'Anna, Pisa, Italy http://retis.sssup.it/people/tommaso [View Less]

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Ada-Europe - AEiC 2024 early registration deadline imminent
by Dirk.Craeynest＠cs.kuleuven.be 18 May '24

18 May '24

----------------------------------------------------------------------- UPDATED Call for Participation *** Early registration DEADLINE May 20 *** 28th Ada-Europe International Conference on Reliable Software Technologies (AEiC 2024) 11-14 June 2024, Barcelona, Spain www.ada-europe.org/conference2024 *** Extensive info and registration online *** *** Add tutorials and/or a … [View More]

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VHPC'24: HPC Virtualization CfP extension: May 20 submission deadline
by Michael Alexander 26 Apr '24

26 Apr '24

==================================================================== CALL FOR PAPERS 19th Workshop on Virtualization in High-Performance Cloud Computing (VHPC '24) held in conjunction with the European Conference on Parallel and Distributed Computing Aug 26-30, 2024, Madrid, Spain. (Springer LNCS Proceedings) ==================================================================== Paper submission deadline: May 20th, 2024 AoE (extended) Date: August 26, 27, 2024 Workshop URL: vhpc dot org To … [View More]submit an abstract or paper, please follow the link provided in the Call for Papers (CfP) announcement at the end of this message. Call for Papers Containers and virtualization technologies constitute key enabling factors for flexible resource management in modern data centers, and particularly in cloud environments. Cloud providers need to manage complex infrastructures in a seamless fashion to support the highly dynamic and heterogeneous workloads and hosted applications customers deploy. Similarly, HPC environments have been increasingly adopting techniques that enable flexible management of vast computing and networking resources, close to marginal provisioning cost, which is unprecedented in the history of scientific and commercial computing. Various virtualization-containerization technologies contribute to the overall picture in different ways: machine virtualization, with its capability to enable consolidation of multiple underutilized servers with heterogeneous software and operating systems (OSes), and its capability to live-migrate a fully operating virtual machine (VM) with a very short downtime, enables novel and dynamic ways to manage physical servers; OS-level virtualization (i.e., containerization), with its capability to isolate multiple user-space environments and to allow for their co-existence within the same OS kernel, promises to provide many of the advantages of machine virtualization with high levels of responsiveness and performance; lastly, unikernels provide for manyvirtualization benefits with a minimized OS/library surface. I/O virtualization, in turn, allows physical network interfaces to exchange traffic with multiple VMs or containers; network virtualization, with its capability to create logical network overlays independently from the underlying physical topology, is another fundamental enabling technology for Cloud/HPC infrastructures. Last, storage virtualization needs to evolve to support increasingly demanding requirements in terms of performance and reliability for the managed application data. Publication Accepted papers will be published in a Springer LNCS proceedings volume. Topics of Interest The VHPC program committee solicits original, high-quality submissions related to virtualization across the entire software stack with a special focus on the intersection of HPC, containers/ virtualization and cloud computing. Each topic encompasses aspects related to design/architecture, management, performance management, modeling and\ configuration/tooling: Design / Architecture: - Containers and OS-level virtualization (LXC, Docker/Podman, Nitro/Firecracke, Singularity) - Hypervisor support for heterogeneous resources (GPUs, NPUs, co-processors, FPGAs, etc.) - GPU hypervisor memory virtualization in support of high-memory LLM training workloads - Hypervisor extensions to mitigate side-channel attacks ([micro-]architectural timing attacks, privilege escalation) - Use of Risc-V related technologies for cloud, virtualized and HPC use-cases - VM & Container trust and security models - Multi-environment coupling, system software supporting in-situ analysis with HPC simulation - Cloud reliability, fault-tolerance and high-availability - Cloud-based quantum compute services - Energy-efficient and power-aware virtualization - Containers inside VMs with hypervisor isolation - Virtualization support for emerging memory and storage technologies - Lightweight/specialized operating systems in conjunction with virtual machines - Unikernels and use cases for virtualized HPC environments - Formal definition and verification of hypervisors and virtualization system properties - ARM-based hypervisors, ARM virtualization extensions Management: - Container and VM management for HPC and cloud environments - Virtualized/Cloudified instances to support Lambda / Function-as-a- Service (FaaS) Paradigms - HPC services integration, services to support HPC - Service and on-demand scheduling & resource management - Dedicated workload management with VMs or containers - Workflow coupling with VMs and containers - Unikernels and lightweight VM application management - Environments and tools for operating containerized environments (batch, orchestration) - Models for non-HPC workload provisioning on HPC resources Performance Measurements and Modeling: - Performance improvements for or driven by unikernels - Optimizations of virtual machine monitor platforms and hypervisors - Scalability analysis of VMs and/or containers at large scale - Performance measurement, modeling and monitoring of virtualized/ cloud workloads - Virtualization in supercomputing environments, HPC clusters, HPC in the cloud with an emphasis on AI GPUs/TPUs/NPUs - Energy-efficient deployment of high-performance, ultra-low latency and real-time workloads in cloud infrastructures - Modeling, control and isolation of end-to-end performance for parallel & distributed cloud/HPC applications, including the use of cloud functions / FaaS Configuration / Tooling: - Tool support for unikernels: configuration/build environments, debuggers, profilers - Job scheduling/control/policy and container placement in virtualized environments - Measuring and controlling "OS/Virtualization noise" - Operating MPI in containers/VMs and Unikernels - GPU virtualization operationalization This year, we are calling the timely topic of virtualization in support of high-memory LLM training workloads including, but not limited to: - GPU hypervisor memory virtualization: Techniques for virtualizing GPU memory to allow flexible and efficient allocation across multiple workloads, enabling higher utilization of GPU resources - Flat CPU/GPU memory page tables/TLB: Unified virtual memory spaces and page table structures that allow both GPUs to address CPU memory mapped to accelerator global memory space - Storage/filesystem to virtual memory mapped approaches - Distributed memory virtualization - Memory compression and reduction techniques: approaches for compressing model parameters, activations, and gradients to reduce memory requirements during training - Out-of-core training algorithms - Efficient memory allocation and management: Techniques for optimizing memory allocation, reducing fragmentation, and improving memory utilization during training - Memory-efficient data formats and processing: Data formats and processing techniques that minimize memory overhead while maintaining training efficiency - Benchmarking and profiling tools: Tools and methodologies for measuring, analyzing, and optimizing memory usage in LLM training workloads - Case studies and applications: Real-world examples and applications of virtualization techniques in LLM training scenarios The Workshop on Virtualization in High-Performance Cloud Computing (VHPC) aims to bring together researchers and industrial practitioners facing the challenges posed by virtualization in order to foster discussion, collaboration, mutual exchange of knowledge and experience, enabling research to ultimately provide novel solutions for virtualized computing systems of tomorrow. The workshop will be one day in length, composed of 20 min paper presentations, each followed by 10 min discussion sections, plus lightning talks that are limited to 5 minutes. Presentations may be accompanied by interactive demonstrations. Important Dates Rolling abstract submission May 20th, 2024 AoE (extended) - Paper submission deadline Jun 20th, 2024 - Acceptance notification Jul 1st, 2024 - Camera-ready due Aug 26th-27th, 2024 - Workshop Day(s) Chair Michael Alexander (chair), Austrian Academy of Sciences Anastassios Nanos (co-chair), Nubificus Ltd., UK Tommaso Cucinotta (co-chair), Scuola Superiore Sant'Anna, Italy Publicity chair Remo Andreoli, Scuola Superiore Sant'Anna, Italy Technical Program Committee - Stergios Anastasiadis, University of Ioannina, Greece - Gabriele Ara, Scuola Superiore Sant'Anna - Jakob Blomer, CERN, Switzerland - Eduardo César, Universidad Autonoma de Barcelona, Spain - Taylor Childers, Argonne National Laboratory, USA - François Diakhaté, CEA DAM, France - Roberto Giorgi, University of Siena, Italy - Kyle Hale, Northwestern University, USA - Giuseppe Lettieri, University of Pisa, Italy - Nikos Parlavantzas, IRISA, France - Amer Qouneh, Western New England University, USA - Carlos Reaño, Queen’s University Belfast, UK - Riccardo Rocha, CERN, Switzerland - Lutz Schubert, University of Ulm, Germany - Jonathan Sparks, Cray, USA - Kurt Tutschku, Blekinge Institute of Technology, Sweden - John Walters, USC ISI, USA - Yasuhiro Watashiba, Osaka University, Japan - Chao-Tung Yang, Tunghai University, Taiwan Paper Submission-Publication Papers submitted to the workshop will be reviewed by at least two members of the program committee and external reviewers. Submissions should include abstract, keywords, the e-mail address of the corresponding author, and must not exceed 12 pages, including tables and figures at a main font size no smaller than 11 points. Submission of a paper should be regarded as a commitment that, should the paper be accepted, at least one of the authors will register and attend the conference to present the work. Accepted papers will be published in a Springer LNCS volume. Initial submissions are in PDF; authors of accepted papers will be requested to provide source files. Lightning Talks Lightning Talks are in a non-paper track, synoptical in nature and are strictly limited to 5 minutes. They can be used to gain early feedback on ongoing research, for demonstrations, to present research results, early research ideas, perspectives and positions of interest to the community. Submit abstracts via the main submission link. General Information The workshop will be held in conjunction with the International European Conference on Parallel and Distributed Computing on Aug 26-30, 2024, Madrid, Spain. Please contact ahead of time for presenting remotely via video. Abstract, Paper Submission Link: https://edas.info/newPaper.php?c=31582 LNCS Format Guidelines: https://www.springer.com/gp/computer-science/lncs/conference-proceedings-gu… Follow VHPC Updates on X: https://x.com/VHPCworkshop [View Less]

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Post Doc position on advanced tools and libraries for exascale at University of Rome Tor Vergata
by Valeria Cardellini 26 Apr '24

26 Apr '24

The Department of Civil and Computer Science Engineering at the University of Rome Tor Vergata, Italy (https://web.uniroma2.it/en) is accepting applications for a postdoctoral fellowship on advanced tools and libraries for exascale. The project is the context of the EuroHPC project EoCoE 3 (https://www.eocoe.eu/) on "Advanced tools & libraries for exascale, and their use in flagship applications" under the joint supervision of Prof. Salvatore Filippone and Prof. Valeria Cardellini. The … [View More]

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PHD thesis position is open at the CIAD laboratory, France
by Yazan MUALLA 25 Apr '24

25 Apr '24

Dear all. I am glad to announce that a PhD thesis position is open at the CIAD laboratory (Belfort Montbéliard University of Technology, France) and ARMTEK company (France). The thesis in on studies and integration of multiagent systems and ontologies for the generation of contextualized documents in complex systems. Details for application are provided in the attached document. Application due date is 15 May 2024. Best Regards, Dr. Yazan Mualla Associate Professor Head of Specialty Program:… [View More]

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Ada-Europe Int.Conf. Reliable Software Technologies, AEiC 2024
by Dirk.Craeynest＠cs.kuleuven.be 16 Apr '24

16 Apr '24

----------------------------------------------------------------------- Call for Participation 28th Ada-Europe International Conference on Reliable Software Technologies (AEiC 2024) 11-14 June 2024, Barcelona, Spain www.ada-europe.org/conference2024 *** Online registration open! *** *** Extensive info on conference site *** Organized by Ada-Europe and Barcelona … [View More]Supercomputing Center (BSC), in cooperation with ACM SIGAda, ACM SIGBED, ACM SIGPLAN, and Ada Resource Association (ARA), supported and sponsored by ASCENDER project, ACM-W, Eurocity, AdaCore, Rising STARS project, ACM-W Barcelona Chapter, and OpenMP #AEiC2024 #AdaEurope #AdaProgramming *** Early registration discount until May 20 *** *** Highly recommended to book your hotel ASAP *** ----------------------------------------------------------------------- *** Exciting News! Preparations for AEiC 2024, the 28th Ada-Europe International Conference on Software Reliable Technologies, are well underway! Registrations opened Tuesday April 16, and we've got some exciting offers lined up for you, courtesy of our generous sponsors Rising STARS and AdaCore, as well as an inspiring program. See below for an overview, and visit our website for more details about accepted contributions, registration fees, social events and many more. *** General Information The 28th Ada-Europe International Conference on Reliable Software Technologies (AEiC 2024) will take place in Barcelona, Spain. The conference schedule comprises a keynote and an invited talk, a panel with invited experts, a journal track, an industrial track, a work-in-progress track, a vendor exhibition, parallel tutorials and hackaton, and satellite workshops. There will be time for networking during breaks and lunches, as well as various social events. AEiC 2024 is the latest in a series of annual international conferences started in the early 80's, under the auspices of Ada-Europe, the international organization that promotes knowledge and use of the Ada programming language and reliable software in general, into academic education and research, and industrial practice. The Ada-Europe series of conferences has over the years become a leading international forum for providers, practitioners and researchers in reliable software technologies. These events highlight the increased relevance of Ada in general and in safety- and security-critical systems in particular, and provide a unique opportunity for interaction and collaboration between academics and industrial practitioners. The 2024 edition of the conference continues a number of important innovations started in previous years: - reduced conference registration fee for all authors; - low registration fee for all tutorials and workshops; - journal-based open-access publication model for peer-reviewed papers; - compact program with two core days (Wednesday & Thursday); - tutorials on Tuesday, followed by welcome event for all participants; - workshops on Friday, optional chill event on Thursday evening. *** Overview of the Week - Tue 11: six half-day tutorials, full-day hackaton, welcome reception - Wed 12: core technical program, conference banquet - Thu 13: core technical program, post conference chill-out - Fri 17: four full-day workshops Extensive information on AEiC 2024 is on the conference website, such as an overview of the program, the list of accepted papers and presentations, and descriptions of workshops, tutorials, hackaton, keynote and invited presentations, panel, and social events. Also check the conference site for registration, accommodation and travel information. The Advance Program brochure will be available there as well. *** Venue The conference will take place in UPC Campus Nord, easily accessible by metro from the airport and city centre. If you can stay over before or after the conference, there's a lot to see around. Check the Practical Information section of the conference website for more info. *** Invited Speakers This year the conference will feature a keynote talk on the first day, and a panel with three invited speakers on the second, plus an invited talk. All will address topics of relevance in the conference scope, with time for questions and answers. - On Wed June 12, a keynote talk by Francisco J. Cazorla and Jaume Abella, from Barcelona Supercomputing Center, who will talk about "Strategies to Build Safety Relevant High-Performance HW/SW Platforms for Critical Embedded Systems". - On Thu June 13, a panel on "AI for Safety-Critical Systems: How 'I' Should the AI be?", moderated by Cristina Seceleanu, Mälardalen University, with three invited experts: Kerstin Bach (Norwegian University of Science and Technology), Irune Yarza (Ikerlan), Marta Barroso (Barcelona Supercomputing Center). - And an invited talk by Rosa Maria Badia, Barcelona Supercomputing Center, on "Simplifying the Life-Cycle Management of Complex Application Workflows". *** Conference Core Composition The core conference program features three distinct types of technical presentations, with different duration, in addition to the keynote talk and the pannel session: journal-track talks (25 minutes), industrial-track talks (15 minutes), work-in-progress-track talks (10 minutes). All papers presented in the journal track, the industrial track and the work-in-progress track have undergone peer review. Presentations are combined into by-theme and not by-track sessions, in order that authors and participants alike enjoy all flavors of the program in a mixed as opposed to segregated combination. Papers and Presentations: - 6 sessions with a mix of presentations on specific topics - 13 journal-track talks - 8 work-in-progress reports - 5 industrial presentations and experience reports - submissions from around the world - accepted contributions by authors from Belgium, China, France, Germany, India, Italy, Portugal, Spain, Sweden, UK, USA *** Tutorials Six three-hour tutorials are offered on Tuesday 11th: - "Lock-Free Programming in Ada-2022: Implementing a Work-Stealing Scheduler for Ada-2022's Light-Weight Parallelism", by S. Tucker Taft, AdaCore, USA - "Ada for Business Applications", by Gautier de Montmollin, Ada-Switzerland, Switzerland - "Rust Fundamentals", by Luis Miguel Pinho and Tiago Carvalho, ISEP, Portugal - "Concurrency and Parallelism in Rust", by Luis Miguel Pinho and Tiago Carvalho, ISEP, Portugal - "Modeling Concurrent State Machines in TLA+", by J. Germán Rivera, Tesla, USA - "Introduction to the Development of Safety-Critical Software", by Jean-Pierre Rosen, Adalog, France - "METASAT: Programming High Performance RISC-V Technologies for Space", by Leonidas Kosmidis, Barcelona Supercomputing Center, Alejandro Calderon, Ikerlan, Aridane Alvarez Suarez, fentISS, Lorenzo Lazzara, Collins Aerospace, Eckart Göhler, OHB - "Introduction to Certifiable General Purpose GPU Programming for Safety-Critical Systems", by Leonidas Kosmidis, Barcelona Supercomputing Center, Rod Burns and Verena Beckham, Codeplay/Intel as well as a "hackaton": - "Optimizing AI-driven Workflows within a Mission-Critical Cyber-Physical System", if you're keen to explore the latest AI techniques for Adaptive Optics applications in giant telescopes with Damien Gratadour, Observatoire de Paris, CNRS, France *** Satellite Events Four workshops are held on Friday 11th: - 3rd ADEPT workshop "AADL by its practitioners" - 9th International Workshop on "Challenges and New Approaches for Dependable and Cyber-Physical System Engineering" (DeCPS 2024) - "Enabling the use of AI in Safety-Critical Systems" - "Ada Developers Workshop", an informal yet dynamic gathering for developers in the Ada community to meet, share insights, and present their latest projects or project updates, using the Ada programming language and Ada-related technology *** Social Program The conference provides several opportunities to socialize: - Each day: coffee breaks and lunches offer ample time for interaction and networking with participants and vendors. - Tuesday early evening: welcome reception at the picturesque gardens of Torre Girona. Guests will be treated to a curated selection of local wines paired with the globally renowned Iberian ham, and an array of delectable appetizers representing the rich culinary heritage of Catalonia and Spain. Attendees will have the unique opportunity to explore the cutting-edge facilities of the Barcelona Supercomputing Center, and marvel at its latest addition, the Marenostrum V supercomputer, and its predecessor, Marenostrum IV, housed within the historic chapel of Torre Girona. - Wednesday evening: Conference Banquet at the emblematic restaurant "7 portes". Attendees will have the opportunity to savor the finest flavors of the Catalan and Mediterranean cuisines, such as the renowned "Paella Perallada", a masterpice that harmoniously combines semi-dry rice with succulent peeliled shellfish, delectable seafood and tender meats. With a history spanning over 180 years, "7 portes" stands as a witness to the evolution of some of the most illustrious artists of their time, including Pablo Picasso and Antoni Tàpies. Their presence has left an indelible mark, forming a captivating small art gallery within the restaurant's walls, waiting to be discovered by guests. - Thursday evening: Chill event at the Moritz Barcelona Brewery, the brewery of the first beer of Barcelona. The event is divided in three parts: a visit to the brewery, a welcome drink at the Brasserie room, offering an exclusive vantage point overlooking the maceration tanks, and a banquet served within the same Brasserie room, by renowned chef Jordi Vilà, adorned with a Michelin star, promising a gastronomic experience to be savored and remembered. *** Further Information Registration: - registration information is provided at <http://www.ada-europe.org/conference2024/registration.html> - early registration discount until Monday May 20, 2024 - payment possible by credit card or bank transfer - special low conference fee for authors - discount for Ada-Europe, ACM SIGAda, SIGBED and SIGPLAN members - registration includes coffee breaks, lunches and social events - low tutorial and workshop fees for all participants - strong discount on all fees for students - minimal fee for AI Hackaton and Ada Developers Workshop - see registration page for all details Promotion: - recommended Twitter hashtags: #AEiC2024 #AdaEurope #AdaProgramming AEiC 2024 Sponsors: - Barcelona Supercomputing Center: <https://www.bsc.es/> - ASCENDER project: <https://www.bsc.es/research-and-development/projects/ ascender-arquitectura-software-para-entornos-de-computo-continuo> - ACM-W: <https://women.acm.org/> - Eurocity: <https://eurocity.be/> - AdaCore: <https://www.adacore.com/> - Rising STARS project: <https://risingstars-project.eu/> - ACM-W Barcelona Chapter: <https://twitter.com/BCN_ACM_W> - OpenMP: <https://www.openmp.org/> The conference is supported and sponsored by - Ada-Europe: <http://www.ada-europe.org/> and organized in cooperation with - ACM SIGAda: <http://www.sigada.org/> - ACM SIGBED: <https://sigbed.org/> - ACM SIGPLAN: <http://www.sigplan.org/> - ARA: <https://www.adaic.org/community/> Please make sure you book accommodation as soon as possible. For more info and latest updates see the conference website at <http://www.ada-europe.org/conference2024>. We look forward to seeing you in Barcelona in June 2024! ----------------------------------------------------------------------- Our apologies if you receive multiple copies of this announcement. Please circulate widely. Dirk Craeynest, AEiC 2024 Publicity Chair Dirk.Craeynest(a)cs.kuleuven.be * 28th Ada-Europe Int. Conf. Reliable Software Technologies (AEiC 2024) * June 11-14, 2024, Barcelona, Spain, www.ada-europe.org/conference2024 [View Less]

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