- computational.science - lists.iccsa.org

LOD 2019: Submit Your Paper/Abstract/Poster and Meet prominent speakers in the fields of Machine Learning, Data Science and Artificial Intelligence in Tuscany! Deadline: June 30
by Ludovico Montalcini 27 Jun '19

27 Jun '19

Register today and take advantage of the special rates available for individuals attending the 5th International Conference on machine Learning, Optimization & Data science LOD - An Interdisciplinary Conference: Deep Learning, Optimization and Big Data without Borders, this September 10-13 at the Certosa di Pontignano. https://lod2019.icas.xyz lod(a)icas.xyz LOD 2019 is a great opportunity to present your work and congregate with leaders and experts in the Deep Learning, Artificial Intelligence and Big Data. Feel free to check out our keynote speakers: - Michael Bronstein, Imperial College London, UK - Marco Gori, University of Siena, Italy - Arthur Gretton, UCL, UK - Arthur Guez Google DeepMind, Montreal, UK - Kaisa Miettinen, University of Jyväskylä, Finland - Jan Peters, Technische Universitaet Darmstadt - Mauricio Resende, Amazon, USA - Richard E. Turner, University of Cambridge, UK Submit your Paper/Abstract/Poster by June 30 https://easychair.org/conferences/?conf=lod2019 Sessions - LOD 2019 Big-Data Challenge: Our sponsor, Neodata Lab, will offer a prize of €2000 to the applicant who develops the most accurate algorithm to process an “approximate SQL-like query answering system” on a real dataset. https://lod2019.icas.xyz/industrial-session/ - Deep Neuroevolution Workshop https://lod2019.icas.xyz/deep-neuroevolution-workshop/ - Multi-Task Learning - Reinforcement Learning - Deep Learning - Generative Adversarial Networks - Networks with Memory - Learning from Less Data and Building Smaller Models - Simulation Environments to understand how AI Systems Learn - Chatbots and Conversational Agents - Data Science at Scale & Data in the Cloud - Urban Informatics & Data-Driven Modeling of Complex Systems - Data-centric Engineering - Data Security, Traceability of Information & GDPR - Economic Data Science https://lod2019.icas.xyz lod(a)icas.xyz

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Last Call - IEEE International Conference on High Performance Computing, Data, and Analytics 2019
by sanmukh＠hipc.org 26 Jun '19

26 Jun '19

********************************************************************** We apologize if you received multiple copies of this email Please feel free to distribute it to those who might be interested ********************************************************************** Last Call - HiPC Paper Submission Deadline Approaching. KEY DATES: Abstract Submission: Friday, June 21, 2019 Paper Submission: Friday, June 28, 2019 *Firm Extended Deadline* Easychair Submission link: https://easychair.org/conferences/?conf=hipc2019 ********************************************************************** HiPC 2019 CALL FOR PAPERS *** Paper Deadline Extended *** ********************************************************************** 26th IEEE International Conference on High Performance Computing, Data, and Analytics December 17-20, 2019, Hyderabad, India https://hipc.org/ HiPC 2019 will be the 26th edition of the IEEE International Conference on High Performance Computing, Data, Analytics and Data Science. HiPC serves as a forum to present current work by researchers from around the world as well as highlight activities in Asia in the areas of high performance computing and data science. The meeting focuses on all aspects of high performance computing systems, and data science and analytics, and their scientific, engineering, and commercial applications. Authors are invited to submit original unpublished research manuscripts that demonstrate current research in all areas of high performance computing, and data science and analytics, covering all traditional areas and emerging topics including from machine learning, big data analytics and blockchain. Each submission should be submitted to one of the tracks listed under the two broad themes of High Performance Computing and Data Science. High Performance Computing tracks: Algorithms: This track invites papers that describe original research on developing new parallel and distributed computing algorithms, and related advances. Examples of topics that are of interest include (but not limited to): * New parallel and distributed algorithms and design techniques; * Advances in enhancing algorithmic properties or providing guarantees (e.g., fault tolerance, resilience, concurrency, data locality, communication-avoiding); * Classical and emerging computation models (e.g., parallel/distributed models, quantum computing, neuromorphic and other bioinspired models); * Provably efficient parallel and distributed algorithms for advanced scientific computing and irregular applications (e.g., numerical linear algebra, graph algorithms, computational biology); and * Algorithmic techniques for resource allocation and optimization (e.g., scheduling, load balancing, resource management); Architectures: This track invites papers that describe original research on the design and evaluation of high performance computing architectures, and related advances. Examples of topics of interest include (but not limited to): * Design and evaluation of high performance processing architectures (e.g., reconfigurable, system-on-chip, manycores, vector processors); * Design and evaluation of networks for high performance computing platforms (e.g., interconnect topologies, network-on-chip); * Design and evaluation of memory, cache and storage architectures (e.g., 3D, photonic, Processing-In-Memory, NVRAM, burst buffers, parallel I/O); * Approaches to improve architectural properties (e.g., energy/power efficiency, reconfigurable, resilience/fault tolerance, security/privacy); and * Emerging computational architectures (e.g., quantum computing, neuromorphic and other bioinspired architectures). Applications: This track invites papers that describe original research on the design and implementation of scalable applications for execution on parallel and distributed platforms, and related advances. Examples of topics of interest include (but not limited to): * Design and implementation of shared and distributed memory parallel applications (e.g., scientific computing and industry applications, emerging applications in IoT and life sciences - biology, medicine, chemistry, etc.); * Design and simulation methodologies for scaling applications on peta- and exascale platforms (e.g., co-design approaches, hardware/software co-design, heterogeneous and hybrid programming); * Hardware acceleration of parallel applications (e.g., CPU/GPUs, multi-GPU clusters, FPGA, vector processors, manycore); and * Design of application benchmarks for parallel and distributed platforms. Systems Software: This track invites papers that describe original research on the design, implementation and evaluation of systems software for high performance computing platforms, and related advances. Examples of topics of interest include (but not limited to): * Scalable systems and software architectures for high performance computing (e.g., middleware, operating systems, I/O services); * Techniques to enhance parallel performance (e.g., compiler/runtime optimization, learning from application traces, profiling); * Techniques to enhance parallel application development and productivity (e.g., Domain-Specific Languages, programming environments, performance/correctness checking and debugging); * Techniques to deal with uncertainties, hardware/software resilience, and fault tolerance; * Software for cloud, data center, and exascale platforms (e.g., middleware tools, schedulers, resource allocation, data migration, load balancing); and * Software and programming paradigms for heterogeneous platforms (e.g., libraries for CPU/GPU, multi-GPU clusters, and other accelerator platforms); Data Science tracks: Scalable Algorithms and Analytics: This track invites papers that describe original research on developing scalable algorithms for data analysis at scale, and related advances. Examples of topics of interest include (but not limited to): * New scalable algorithms for fundamental data analysis tasks (supervised, unsupervised learning, and pattern discovery); * Scalable algorithms that are designed to address the characteristics of different data sources and settings (e.g., graphs, social networks, sequences, data streams); * Scalable algorithms and techniques to reduce complexity of large-scale data (e.g., streaming, sublinear data structures, summarization, compressive analytics); * Scalable algorithms that are designed to address requirements in different data-driven application domains (e.g., life sciences, business, agriculture); and * Scalable algorithms that ensure the transparency and fairness of the analysis. Scalable Systems and Software: This track invites papers that describe original research on developing scalable systems and software for handling data at scale, and related advances. Examples of topics of interest include (but not limited to): * Design of scalable system software to support various applications (e.g., recommendation systems, web search, crowdsourcing applications, streaming applications) * Design of scalable system software for various architectures (e.g., OpenPower, GPUs, FPGAs). * Architectures and systems software to support various operations in large data frameworks (e.g., storage, retrieval, automated workflows, data organization, visualization, visual analytics, human-in-the-loop); * Design and implementation of systems software for distributed data frameworks (e.g., distributed file system, virtualization, cloud services, resource optimization, scheduling); and * Standards and protocols for enhancing various aspects of data analytics (e.g., open data standards, privacy preserving and secure schemes). One or more best paper awards will be given for outstanding contributed papers. IMPORTANT DATES Abstract Submission: Friday, June 21, 2019 Paper Submission: Friday, June 28, 2019 *Firm Extended Deadline* Reviews for Rebuttals: Monday, July 29, 2019 Rebuttals due: Monday, August 5, 2019 Initial Submission Decision: Monday, August 19, 2019 Revisions Due: Friday, September 20, 2019 Author Notification: Monday, September 30, 2019 Camera Ready: Monday, October 14, 2019 Manuscript Guidelines Submitted manuscripts should be structured as technical papers and may not exceed ten (10) single-spaced double-column pages using 10-point size font on 8.5x11 inch pages (IEEE conference style), including figures, tables, and references. See IEEE style templates at this page for details. Electronic submissions must be in the form of a readable PDF file. Manuscripts must be received by the published paper submission deadline. All manuscripts will be reviewed by the Program Committee and evaluated on originality, relevance of the problem to the conference theme, technical strength, rigor in analysis, quality of results, and organization and clarity of presentation of the paper. Authors are highly encouraged to list the key contributions of their paper. This should be in a separate paragraph in the introduction to the paper. Please note that the review process is “single-blind” (i.e., authors can list their names on the paper). This year we are introducing a two-phase review process, in which the first round of reviews will be made available to the authors for a brief rebuttal. Based on the reviews and the rebuttal, an initial decision will be issued. Papers will be either accepted or rejected or recommended for a second round. Authors of papers recommended for a second round will be allowed to revise the paper to address the comments and suggestions made by the program committee. The revisions will undergo a second round of review before the final notification. Submitted papers must represent original unpublished research that is not currently under review for any other conference or journal. Papers not following these guidelines will be rejected without review and further action may be taken, including (but not limited to) notifications sent to the heads of the institutions of the authors and sponsors of the conference. Submissions received after the due date, exceeding length limit, or not appropriately structured may also not be considered. Authors may contact the Program Chairs of the respective tracks at their contact email addresses below for further information or clarification. Notification of review decisions will be emailed by September 30, 2019. Camera-ready papers are due by October 14, 2019. A published proceedings will be available at the conference. At least one author of each paper must be registered for the conference in order for the paper to be published in the proceedings. Presentation of an accepted paper at the conference is a requirement of publication. Any paper that is not presented at the conference will not be included in IEEE Xplore. Easychair Submission link: https://easychair.org/conferences/?conf=hipc2019 Journal Special Issue: Authors of selected high quality papers in HiPC 2019 will be invited to submit extended version of their papers for possible publication in a special issue of Journal of Parallel and Distributed Computing. PLEASE NOTE: * Authors must register their paper and submit an abstract, typically a paragraph or two, by June 21, 2019 * Authors must then submit full versions of registered papers by June 28, 2019 * All deadlines are end of day ANYWHERE ON EARTH. * Links to EasyChair submissions: https://easychair.org/conferences/?conf=hipc2019 PROGRAM CHAIRS Ananth Kalyanaraman, Washington State University, USA George Karypis, University of Minnesota, USA PROGRAM VICE-CHAIRS HPC Tracks: Algorithms: Bora Uçar, CNRS and École normale supérieure de Lyon, France Applications: Alba Cristina M.A. de Melo, University of Brasilia, Brazil Architecture: Smruti Ranjan Sarangi, Indian Institute of Technology Delhi, India System Software: Sriram Krishnamoorthy, Pacific Northwest National Laboratory, USA Data Science Tracks: Scalable Algorithms and Analytics: Srinivasan Parthasarathy, Ohio State University, USA Scalable Systems and Software: Gagan Agrawal, Ohio State University, USA Contact Information * High Performance Computing tracks: Ananth Kalyanaraman, Washington State University, USA, ananth(a)wsu.edu * Data Science tracks: George Karypis, University of Minnesota, USA, karypis(a)umn.edu ___________________________________________________ HiPC 2019 is co-sponsored by • IEEE Computer Society Technical Committee on Parallel Processing (TCPP) • HiPC Education Trust, India In cooperation with • ACM Special Interest Group on Algorithms and Computation Theory (SIGACT) • ACM Special Interest Group on Computer Architecture (SIGARCH) • FIP Working Group on Concurrent Systems • Manufacturers' Association for Information Technology (MAIT) • National Association of Software and Service Companies (NASSCOM)

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CFP OLA'2019 Int. Conf. on Optimization and Learning @Spain
by El-ghazali Talbi 24 Jun '19

24 Jun '19

Apologies for cross-posting. Appreciate if you can distribute this CFP to your network. **************************************************************************************** OLA'2020 International Conference on Optimization and Learning: Challenges and Applications 17-19 Feb 2020 Cadiz, Spain http://ola2020.sciencesconf.org/ **************************************************************************************** OLA is a conference focusing on the future challenges of optimization and learning methods and their applications. The conference OLA'2020 will provide an opportunity to the international research community in optimization and learning to discuss recent research results and to develop new ideas and collaborations in a friendly and relaxed atmosphere. OLA'2020 welcomes presentations that cover any aspects of optimization and learning research such as optimization for learning, learning for optimization, optimization and learning under uncertainty, new high-impact applications, parameter tuning, 4th industrial revolution, hybridization issues, optimization-simulation, meta-modeling, high-performance computing, parallel and distributed optimization and learning, surrogate modeling, multi-objective optimization ... Submission papers: We will accept two different types of submissions: - S1: Extended abstracts of work-in-progress and position papers of a maximum of 3 pages - S2: Original research contributions of a maximum of 10 pages Important dates: =============== Submission deadline Sept 20, 2019 Notification of acceptance Nov 9, 2019 Proceedings: Accepted papers in categories S1 and S2 will be published in the proceedings that will be available at the conference. In addition, a post-conference SCOPUS indexed Springer book and a special issue in a Journal are planned to be published. Participants will be invited to submit extended versions of their work for consideration. -- *********************************************************************** OLA'2020 Int. Conference on Optimization and Learning 17-19 Feb 2020, Cadiz, Spain http://ola2020.sciencesconf.org *********************************************************************** Prof. El-ghazali TALBI Polytech'Lille, University Lille - INRIA CRISTAL - CNRS

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Abstract Deadline Today - IEEE International Conference on High Performance Computing, Data, and Analytics 2019
by sanmukh＠hipc.org 21 Jun '19

21 Jun '19

********************************************************************** We apologize if you received multiple copies of this email Please feel free to distribute it to those who might be interested ********************************************************************** HiPC Paper Submission Deadline Approaching. KEY DATES: Abstract Submission: Friday, June 21, 2019 *Firm Extended Deadline* Paper Submission: Friday, June 28, 2019 *Firm Extended Deadline* Easychair Submission link: https://easychair.org/conferences/?conf=hipc2019 ********************************************************************** HiPC 2019 CALL FOR PAPERS *** Paper Deadline Extended *** ********************************************************************** 26th IEEE International Conference on High Performance Computing, Data, and Analytics December 17-20, 2019, Hyderabad, India https://hipc.org/ HiPC 2019 will be the 26th edition of the IEEE International Conference on High Performance Computing, Data, Analytics and Data Science. HiPC serves as a forum to present current work by researchers from around the world as well as highlight activities in Asia in the areas of high performance computing and data science. The meeting focuses on all aspects of high performance computing systems, and data science and analytics, and their scientific, engineering, and commercial applications. Authors are invited to submit original unpublished research manuscripts that demonstrate current research in all areas of high performance computing, and data science and analytics, covering all traditional areas and emerging topics including from machine learning, big data analytics and blockchain. Each submission should be submitted to one of the tracks listed under the two broad themes of High Performance Computing and Data Science. High Performance Computing tracks: Algorithms: This track invites papers that describe original research on developing new parallel and distributed computing algorithms, and related advances. Examples of topics that are of interest include (but not limited to): * New parallel and distributed algorithms and design techniques; * Advances in enhancing algorithmic properties or providing guarantees (e.g., fault tolerance, resilience, concurrency, data locality, communication-avoiding); * Classical and emerging computation models (e.g., parallel/distributed models, quantum computing, neuromorphic and other bioinspired models); * Provably efficient parallel and distributed algorithms for advanced scientific computing and irregular applications (e.g., numerical linear algebra, graph algorithms, computational biology); and * Algorithmic techniques for resource allocation and optimization (e.g., scheduling, load balancing, resource management); Architectures: This track invites papers that describe original research on the design and evaluation of high performance computing architectures, and related advances. Examples of topics of interest include (but not limited to): * Design and evaluation of high performance processing architectures (e.g., reconfigurable, system-on-chip, manycores, vector processors); * Design and evaluation of networks for high performance computing platforms (e.g., interconnect topologies, network-on-chip); * Design and evaluation of memory, cache and storage architectures (e.g., 3D, photonic, Processing-In-Memory, NVRAM, burst buffers, parallel I/O); * Approaches to improve architectural properties (e.g., energy/power efficiency, reconfigurable, resilience/fault tolerance, security/privacy); and * Emerging computational architectures (e.g., quantum computing, neuromorphic and other bioinspired architectures). Applications: This track invites papers that describe original research on the design and implementation of scalable applications for execution on parallel and distributed platforms, and related advances. Examples of topics of interest include (but not limited to): * Design and implementation of shared and distributed memory parallel applications (e.g., scientific computing and industry applications, emerging applications in IoT and life sciences - biology, medicine, chemistry, etc.); * Design and simulation methodologies for scaling applications on peta- and exascale platforms (e.g., co-design approaches, hardware/software co-design, heterogeneous and hybrid programming); * Hardware acceleration of parallel applications (e.g., CPU/GPUs, multi-GPU clusters, FPGA, vector processors, manycore); and * Design of application benchmarks for parallel and distributed platforms. Systems Software: This track invites papers that describe original research on the design, implementation and evaluation of systems software for high performance computing platforms, and related advances. Examples of topics of interest include (but not limited to): * Scalable systems and software architectures for high performance computing (e.g., middleware, operating systems, I/O services); * Techniques to enhance parallel performance (e.g., compiler/runtime optimization, learning from application traces, profiling); * Techniques to enhance parallel application development and productivity (e.g., Domain-Specific Languages, programming environments, performance/correctness checking and debugging); * Techniques to deal with uncertainties, hardware/software resilience, and fault tolerance; * Software for cloud, data center, and exascale platforms (e.g., middleware tools, schedulers, resource allocation, data migration, load balancing); and * Software and programming paradigms for heterogeneous platforms (e.g., libraries for CPU/GPU, multi-GPU clusters, and other accelerator platforms); Data Science tracks: Scalable Algorithms and Analytics: This track invites papers that describe original research on developing scalable algorithms for data analysis at scale, and related advances. Examples of topics of interest include (but not limited to): * New scalable algorithms for fundamental data analysis tasks (supervised, unsupervised learning, and pattern discovery); * Scalable algorithms that are designed to address the characteristics of different data sources and settings (e.g., graphs, social networks, sequences, data streams); * Scalable algorithms and techniques to reduce complexity of large-scale data (e.g., streaming, sublinear data structures, summarization, compressive analytics); * Scalable algorithms that are designed to address requirements in different data-driven application domains (e.g., life sciences, business, agriculture); and * Scalable algorithms that ensure the transparency and fairness of the analysis. Scalable Systems and Software: This track invites papers that describe original research on developing scalable systems and software for handling data at scale, and related advances. Examples of topics of interest include (but not limited to): * Design of scalable system software to support various applications (e.g., recommendation systems, web search, crowdsourcing applications, streaming applications) * Design of scalable system software for various architectures (e.g., OpenPower, GPUs, FPGAs). * Architectures and systems software to support various operations in large data frameworks (e.g., storage, retrieval, automated workflows, data organization, visualization, visual analytics, human-in-the-loop); * Design and implementation of systems software for distributed data frameworks (e.g., distributed file system, virtualization, cloud services, resource optimization, scheduling); and * Standards and protocols for enhancing various aspects of data analytics (e.g., open data standards, privacy preserving and secure schemes). One or more best paper awards will be given for outstanding contributed papers. IMPORTANT DATES Abstract Submission: Friday, June 21, 2019 *Firm Extended Deadline* Paper Submission: Friday, June 28, 2019 *Firm Extended Deadline* Reviews for Rebuttals: Monday, July 29, 2019 Rebuttals due: Monday, August 5, 2019 Initial Submission Decision: Monday, August 19, 2019 Revisions Due: Friday, September 20, 2019 Author Notification: Monday, September 30, 2019 Camera Ready: Monday, October 14, 2019 Manuscript Guidelines Submitted manuscripts should be structured as technical papers and may not exceed ten (10) single-spaced double-column pages using 10-point size font on 8.5x11 inch pages (IEEE conference style), including figures, tables, and references. See IEEE style templates at this page for details. Electronic submissions must be in the form of a readable PDF file. Manuscripts must be received by the published paper submission deadline. All manuscripts will be reviewed by the Program Committee and evaluated on originality, relevance of the problem to the conference theme, technical strength, rigor in analysis, quality of results, and organization and clarity of presentation of the paper. Authors are highly encouraged to list the key contributions of their paper. This should be in a separate paragraph in the introduction to the paper. Please note that the review process is “single-blind” (i.e., authors can list their names on the paper). This year we are introducing a two-phase review process, in which the first round of reviews will be made available to the authors for a brief rebuttal. Based on the reviews and the rebuttal, an initial decision will be issued. Papers will be either accepted or rejected or recommended for a second round. Authors of papers recommended for a second round will be allowed to revise the paper to address the comments and suggestions made by the program committee. The revisions will undergo a second round of review before the final notification. Submitted papers must represent original unpublished research that is not currently under review for any other conference or journal. Papers not following these guidelines will be rejected without review and further action may be taken, including (but not limited to) notifications sent to the heads of the institutions of the authors and sponsors of the conference. Submissions received after the due date, exceeding length limit, or not appropriately structured may also not be considered. Authors may contact the Program Chairs of the respective tracks at their contact email addresses below for further information or clarification. Notification of review decisions will be emailed by September 30, 2019. Camera-ready papers are due by October 14, 2019. A published proceedings will be available at the conference. At least one author of each paper must be registered for the conference in order for the paper to be published in the proceedings. Presentation of an accepted paper at the conference is a requirement of publication. Any paper that is not presented at the conference will not be included in IEEE Xplore. Easychair Submission link: https://easychair.org/conferences/?conf=hipc2019 Journal Special Issue: Authors of selected high quality papers in HiPC 2019 will be invited to submit extended version of their papers for possible publication in a special issue of Journal of Parallel and Distributed Computing. PLEASE NOTE: * Authors must register their paper and submit an abstract, typically a paragraph or two, by June 21, 2019 * Authors must then submit full versions of registered papers by June 28, 2019 * All deadlines are end of day ANYWHERE ON EARTH. * Links to EasyChair submissions: https://easychair.org/conferences/?conf=hipc2019 PROGRAM CHAIRS Ananth Kalyanaraman, Washington State University, USA George Karypis, University of Minnesota, USA PROGRAM VICE-CHAIRS HPC Tracks: Algorithms: Bora Uçar, CNRS and École normale supérieure de Lyon, France Applications: Alba Cristina M.A. de Melo, University of Brasilia, Brazil Architecture: Smruti Ranjan Sarangi, Indian Institute of Technology Delhi, India System Software: Sriram Krishnamoorthy, Pacific Northwest National Laboratory, USA Data Science Tracks: Scalable Algorithms and Analytics: Srinivasan Parthasarathy, Ohio State University, USA Scalable Systems and Software: Gagan Agrawal, Ohio State University, USA Contact Information * High Performance Computing tracks: Ananth Kalyanaraman, Washington State University, USA, ananth(a)wsu.edu * Data Science tracks: George Karypis, University of Minnesota, USA, karypis(a)umn.edu ___________________________________________________ HiPC 2019 is co-sponsored by • IEEE Computer Society Technical Committee on Parallel Processing (TCPP) • HiPC Education Trust, India In cooperation with • ACM Special Interest Group on Algorithms and Computation Theory (SIGACT) • ACM Special Interest Group on Computer Architecture (SIGARCH) • FIP Working Group on Concurrent Systems • Manufacturers' Association for Information Technology (MAIT) • National Association of Software and Service Companies (NASSCOM)

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MSc on "Digital Media - Computational Intelligence"
by ioannakoroni＠csd.auth.gr 20 Jun '19

20 Jun '19

The School of Informatics at the Aristotle University of Thessaloniki will offer the MSc Course Programme on "Digital Media - Computational Intelligence" the forthcoming academic year. This MSc covers a range of advanced topics related to digital media. Digital media collectively refer to content found in audio, images, video, written and aural speech, biosignals, graphics, and virtual reality. To analyze the aforementioned content, one needs good foundations in signal processing, computer vision, graphics, pattern recognition/machine learning and computational intelligence, including associated enabling technologies (e.g., language technologies, deep learning, computer animation, brain computer interfaces). The MSc provides an excellent opportunity to develop the skills required for careers in some of the most dynamic fields in processing and analysis of big data extracted from multimedia, social networks, the web, the internet of things, without excluding complex adaptive systems of social life and robotics. This programme builds on the internationally recognized research strengths of the Artificial Intelligence and Information Analysis Laboratory <https://www.aiia.csd.auth.gr/> within the School of Informatics <http://www.csd.auth.gr> at the Aristotle University of Thessaloniki. This research team conducts pioneering research in the required aforementioned fundamental disciplines and work areas. The laboratory is well equipped with first-class computational facilities and state-of-the-art measurement equipment, including multiple cameras, microphone arrays, motion capture magnetic sensors, brain interfaces, and drones. The MSc provides in-depth training in design, analysis, and management skills relevant to the theory and practice of related industry. Foreign students are welcome! Courses are taught in English. We are proud to quote 2019 U.S. News Education University Rankings of Aristotle University of Thessaloniki in Subjects Computer Science (#181 tied) and Engineering (#152 tied) under Best Global Universities https://www.usnews.com/education/best-global-universities/aristotle-universi ty-of-thessaloniki-506056 Stay informed and submit the application now at http://dmci.csd.auth.gr/admissions/ Deadline for application submission: September, the 10th, 2019. Contact details: Professor Constantine Kotropoulos, Director of the MSc Programme Email: costas(a)csd.auth.gr <mailto:costas@csd.auth.gr> Follow us in facebook: https://www.facebook.com/dmci.eng.csd Brochure https://drive.google.com/open?id=1vbePAGd6ttoApeR4pTFWjAmkrzaOS35s

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CFP: The 20th IEEE/ACM International Symposium on Cluster, Cloud and Internet Computing (CCGrid 2020)
by Bahman Javadi 18 Jun '19

18 Jun '19

===================================================================== The 20th IEEE/ACM International Symposium on Cluster, Cloud and Internet Computing (CCGrid 2020) May 11-14, 2020, Melbourne, Australia Website: http://cloudbus.org/ccgrid2020/ ===================================================================== Call for Papers Tremendous advances in processing, communication and systems/middle-ware technologies are leading to new paradigms and platforms for computing, ranging from computing Clusters to widely distributed Clouds and emerging Internet computing paradigms such as Fog/Edge Computing for Internet of Things (IoT)/Big Data applications. CCGrid is a series of very successful conferences, sponsored by the IEEE Computer Society Technical Committee on Scalable Computing (TCSC) and ACM (Association for Computing Machinery), with the overarching goal of bringing together international researchers, developers, and users and to provide an international forum to present leading research activities and results on a broad range of topics related to these platforms and paradigms and their applications. The conference features keynotes, technical presentations, posters, workshops, tutorials, as well as the SCALE challenge featuring live demonstrations and the ICFEC 2020 conference. In 2020, CCGrid will return to Melbourne, Australia, to celebrate its 20th anniversary. CCGrid 2020 will have a special focus on three important issues that are significantly influencing all aspects of Cluster, Cloud, and Internet computing: Adaptive Elastic Computing, Green Computing, and Cyber-Physical Computing. Topics of interest include, but are not limited to: Internet Computing Frontiers: Edge, Fog, Serverless, Lambda, Streaming, etc. More decentralized approaches to cloud computing. Edge/fog/mist computing, sensor data streaming and computation on the edges of the network. Function as a Service (Faas), Backend as a Service (BaaS), serverless computing, lambda computing. Architecture, Networking, Data Centers: Service oriented architectures. Utility computing models. IaaS, PaaS, SaaS, *aaS paradigms. Service composition and orchestration. Micro-datacenter, cloudlet, edge, or fog computing infrastructure. Virtualized hardware: GPUs, tensor processing units, FPGAs. Storage and I/O Systems: Distributed storage, cloud storage, Storage as a Service, data locality techniques for in-memory processing, storage in the edge. Programming Models and Runtime Systems: Programming models, languages, systems and tools/environments. Virtualization, containers, and middleware technologies. Actors, agents, programming decentralized computing systems. Resource Management and Scheduling: Resource allocation algorithms, profiling, modeling. Cluster, cloud, and internet computing scheduling and meta-scheduling techniques. Performance Modelling and Evaluation: Performance models. Monitoring and evaluation tools. Analysis of system/application performance. Cyber-Security and Privacy: Cloud security and trust. Access control. Data privacy and integrity. Regulation. Sustainable and Green Computing: Environment friendly computing ecosystems. Hardware/software/application energy efficiency. Power, cooling and thermal awareness. Applications: Data Science, Artificial Intelligence, Cyber-Physical Systems, etc. Applications to real and complex problems in science, engineering, business and society. User studies. Experiences with large-scale deployments systems and data science applications. Distributed AI/Machine Learning on the cloud. Data streaming analytics for intelligent transportation systems. ------------------------------------------------------------------- Chairs and Committees ------------------------------------------------------------------- General Chair: Rajkumar Buyya, University of Melbourne, Australia. General Vice Chairs: Dhabaleswar Panda, Ohio State University, USA Jin Hai, Huazhong University of Science and Technology, China Massimo Villari, The University of Messina, Italy Program Committee Co-Chairs: Carlos A Varela, RPI, USA Laurent Lefevre, INRIA, France Workshops Co-Chairs: George Pallis, The University of Cyprus, Cyprus Borja Sotomayor, The University of Chicago, USA Doctoral Symposium Chairs : Anne-Cecile Orgerie, Inria, France Ivan Rodero, The State University of New Jersey, USA Posters Co-Chairs : Hari Subramoni, Ohio State University, USA Joanna Kolodziej, National Research Institute (NASK), Poland Student Travel Awards Chair: Lena Mashayekhy, University of Delaware, USA SCALE Challenge Chair : Yogesh Simmhan, Indian Institute of Science, India Research/Product Demonstrations Chairs : Rodrigo Calheiros, Western Sydney University, Australia Proceedings Co-Chair : Omer Rana, Cardiff University, UK Adel N. Toosi, Monash University, Australia Publicity Co-Chairs: Jithin Jose, Microsoft, USA Stefan Schulte, Vienna University of Technology, Austria Bahman Javadi, Western Sydney University, Australia Mohsen Amini, The University of Louisiana at Lafayette, USA Ching-Hsien Hsu, National Chung Cheng University, Taiwan Carlos Westphall, Federal University of Santa Catarina, Brazil Cyber Chair : Mohammad Goudarzi, The University of Melbourne, Australia Important Dates Paper Due: 10 December 2019 Acceptance Notification: 30 January 2020 Camera Ready Papers Due: 25 February 2020 =====================================================================

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[CFP] IA^3 2019 - 9th SC Workshop on Irregular Applications: Architectures and Algorithms
by Tumeo, Antonino 18 Jun '19

18 Jun '19

[Apologies if you receive multiple copies of this CFP] IA^3 2019 9th Workshop on Irregular Applications: Architectures and Algorithms http://hpc.pnl.gov/IA3 November 18, 2019 Colorado Convention Center, Denver, CO In conjunction with SC19 Sponsored by IEEE TCHPC -------------------- Call for Papers -------------------- Irregular applications occur in many subject matters. While inherently parallel, they exhibit highly variable execution performance at a local level due to unpredictable memory access patterns and/or network transfers, divergent control structures, and data imbalances. Moreover, they often require fine-grain synchronization and communication on large-data structures such as graphs, trees, unstructured grids, sparse matrices, deep nets, tables, and their combinations (such as, for example, attributed graphs). They have a significant degree of latent parallelism, which however is difficult to exploit due to their complex behavior. Current high performance architectures rely on data locality and regular computation to reduce access latencies, and often do not cope well with the requirements of these applications. Furthermore, irregular applications are difficult to scale on current supercomputing machines, due to their limits in fine-grained synchronization and small data transfers. Irregular applications pertain both to well established and emerging fields, such as machine learning, social network analysis, bioinformatics, semantic graph databases, Computer Aided Design (CAD), and computer security. Many of these application areas also process massive sets of unstructured data, which keep growing exponentially. Emerging supercomputing applications are moving towards a convergence of scientific simulation, data analytics, and learning algorithms, mixed in various ways. Addressing the issues of irregular applications on current and future architectures will become critical to solve the challenges in science and data analysis of the next few years. This workshop seeks to explore solutions for supporting efficient execution of irregular applications in the form of new features at the level of the micro- and system-architecture, network, languages and libraries, runtimes, compilers, analysis, algorithms. Topics of interest, of both theoretical and practical significance, include but are not limited to: - Micro- and System-architectures, including multi- and many-core designs, heterogeneous processors, accelerators (GPUs, vector processors, Automata processor), reconfigurable (coarse grained reconfigurable and FPGA designs) and custom processors - Network architectures and interconnect (including high-radix networks, optical interconnects) - Novel memory architectures and designs (including processors-in memory) - Impact of new computing paradigms on irregular workloads (including neuromorphic processors and quantum computing) - Modeling, simulation and evaluation of novel architectures with irregular workloads - Innovative algorithmic techniques - Combinatorial algorithms (graph algorithms, sparse linear algebra, etc.) - Impact of irregularity on machine learning approaches - Parallelization techniques and data structures for irregular workloads - Data structures combining regular and irregular computations (e.g., attributed graphs) - Approaches for managing massive unstructured datasets (including streaming data) - Languages and programming models for irregular workloads - Library and runtime support for irregular workloads - Compiler and analysis techniques for irregular workloads - High performance data analytics applications (including graph databases and solutions that combine graph algorithms with machine learning) - Applications that integrate scientific simulation, data analytics, and learning, and require efficient execution of irregular workloads Besides regular papers, papers describing work-in-progress or incomplete but sound, innovative ideas related to the workshop theme are also encouraged. We solicit both 8-page regular papers and 4-page position papers. Authors of exciting but not mature enough regular papers may be offered the option of a short 4-page paper and related short presentation. -------------------- Important Dates -------------------- Abstract Submission: August 28, 2019 Position or Regular Paper Submission: September 4, 2019 Notification: October 1, 2019 Camera-ready: October 10, 2019 Workshop: November 18, 2019 -------------------- Submissions -------------------- Submission site: https://submissions.supercomputing.org Submitted manuscripts may not exceed eight (8) pages in length for regular papers and four (4) pages for position papers including figures, tables and references. Authors of regular papers will be able to provide up to one (1) additional pages for the Artifact Description (AD) appendix and, after paper acceptance, up to two (2) additional pages for the Artifact Evaluation (AE) appendix. The templates are available at: http://www.ieee.org/conferences_events/conferences/publishing/templates.html. Accepted papers will be published in the IEEE Digital Library through IEEE TCHPC. -------------------- Artifact Description & Evaluation -------------------- This edition of the workshop invites authors of regular papers to follow a reproducibility initiative like the main SC Conference, with specific appendices for the Artifact Description (AD) and the Artifact Evaluation (AE). Please refer to the SC reproducibility page for further details on the rationale behind AD and AE: https://sc19.supercomputing.org/submit/reproducibility-initiative/. Authors of regular papers will be able to use up to one (1) additional page to provide an Artifact Description (AD) Appendix, describing the details of their software environments and computational experiments to the extent that an independent person could replicate their results. This additional page is voluntary, and must focus only on details on software environments and methods to execute the experiments. It should not add details on the proposed technical approaches. If a paper has no computational results, the appendix only needs to mention that computational results are not part of the paper. Additionally, authors of accepted regular papers will be invited to formally submit their supporting materials to the Artifact Evaluation (AE) process. The process is voluntary, but authors that will participate in the AE will be eligible for the Best Paper Award of the workshop. Supporting materials for the AE include access to the actual software artifact, shared publicly (for example, through the CK - Collective Knowledge - https://github.com/ctuning/ck format), and two (2) further additional pages of the paper that details how to reproduce the results of the paper. For details on how to submit supporting materials to the AE process, please refer to: http://ctuning.org/ae/submission.html. Authors participating in the AE will receive an assessment of the artifact, and the related badge on their paper. For any additional question on the AD and the AE please contact the Artifact Evaluation Chair Flavio Vella at mailto:Flavio.Vella@unibz.it. -------------------- Organizers -------------------- Antonino Tumeo (PNNL), mailto:antonino.tumeo@pnnl.gov John Feo (PNNL), mailto:john.feo@pnnl.gov Vito Giovanni Castellana (PNNL), mailto:vitoGiovanni.castellana@pnnl.gov -------------------- Proceedings Chair -------------------- Marco Minutoli (PNNL and WSU), mailto:marco.minutoli@pnnl.gov -------------------- Artifact Evaluation Chair -------------------- Favio Vella (Free University of Bozen), mailto:Flavio.Vella@unibz.it -------------------- Technical Program Committee -------------------- Nesreen Ahmed, Intel, US Ashwin M. Aji, AMD, US Kubilay Atasu, IBM Zürich, CH Scott Beamer, University of California, Santa Cruz, US Jonathan Beard, ARM, US Michela Becchi, North Carolina State University, US Sanjukta Bhowmick, University of North Texas, US Erik Boman, Sandia National Laboratories, US David Brooks, Harvard University, US Aydin Buluç, Lawrence Berkeley National Laboratory, US Anastasiia Butko, Lawrence Berkeley National Laboratory, US Tim Davis, Texas A&M University, US Assefaw Gebremedhin, Washington State University, US Rajiv Gupta, University of California, Riverside, US George Karypis, University of Minnesota, US Peter M. Kogge, Notre Dame University, US Manoj Kumar, IBM TJ Watson, US John Leidel, Tactical Computing Labs, US Kamesh Madduri, Pennsylvania State University, US José Moreira, IBM TJ Watson, US Walid Najjar, University of California, Riverside, US Maxim Naumov, Facebook, US Fanny Nina-Paravecino, Intel, US Roger Pearce, Lawrence Livermore National Laboratory, US Cynthia Phillips, Sandia National Laboratories, US Keshav Pingali, University of Texas, Austin, US Alejandro Rico, ARM, US Jason Riedy, Georgia Tech, US John Shalf, Lawrence Livermore National Laboratory, US Edgar Solomonik, University of Illinois, Urbana Champaign, US Ruud van der Pas, Oracle, US Ana Lucia Varbanescu, University of Amsterdam, NL Jishen Zhao, University of California, San Diego, US Other members TBD

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[CFP - WORKSHOPS ESORICS 2019]: 24th European Symposium on Research in Computer Security (ESORICS 2019)
by Publicity Chair ESORICS 2019 18 Jun '19

18 Jun '19

====================================================================== CALL FOR PAPERS, WORKSHOPS ESORICS 2019 24th European Symposium on Research in Computer Security University of Luxembourg, Luxembourg, September 23-27, 2019 Website: https://esorics2019.uni.lu/workshops/ ====================================================================== Overview ------------------------------------ ESORICS is the annual European research event in Computer Security. The Symposium started in 1990 and has been held in several European countries, attracting a wide international audience from both the academic and industrial communities. Papers are solicited for the workshops held in conjunction with ESORICS 2019. Find below the list of workshops and their respective websites. Workshops will publish accepted regular papers in the companion Lecture Notes in Computer Science (LNCS) proceedings of ESORICS 2019 by Springer Nature. - ADIot (Attacks and Defenses for Internet-of-Things) Web: http://adiot2019.compute.dtu.dk/ Deadline: June 30, 2019 - CBT (Cryptocurrencies and Blockchain Technology) Web: http://cbtworkshop.org/ Deadline: June 25, 2019 - CSITS (Cyber Security for Intelligent Transportation Systems) Web: https://cyber.bgu.ac.il/esorics_csits2019/ Deadline: June 20, 2019 - CyberICPS (Security of Industrial Control Systems and of Cyber-Physical Systems) Web: https://www.ds.unipi.gr/cybericps2019/ Deadline: June 24, 2019 - DPM (Data and Privacy Management) Web: http://deic.uab.cat/conferences/dpm/dpm2019/ Deadline: June 17, 2019 - ETAA (Emerging Technologies for Authorization and Authentication) Web: https://www.iit.cnr.it/etaa2019 Deadline: June 15, 2019 - FINSEC (Security for Financial Critical Infrastructures and Services) Web: https://sites.google.com/fbk.eu/finsec19 Deadline: June 28, 2019 - IOSEC (Information & Operational Technology (IT & OT) security systems) Web: http://iosec2019.ics.forth.gr/ Deadline: June 15, 2019 - ISSA (Interplay of Security, Safety and System/Software Architecture) Web: https://www.irit.fr/issa/ Deadline: June 21, 2019 - MSTEC (Simulation and Training Environments for Cybersecurity) Web: https://www.threat-arrest.eu/html/mstec/ Deadline: June 30, 2019 - SECPRE (SECurity and Privacy Requirements Engineering) Web: http://samosweb.aegean.gr/secpre2019/ Deadline: June 28, 2019 - SIoT (Secure Internet of Things) Web: http://siot-workshop.org Deadline: June 25, 2019 - SPOSE (Security, Privacy, Organizations, and Systems Engineering) Web: https://spose-ws.github.io Deadline: June 14, 2019 - STAST (Socio-Technical Aspects in SecuriTy) Web: http://www.stast.uni.lu/ Deadline: June 30, 2019 - STM (Security and Trust Management) Web: https://stm2019.uni.lu/ Deadline: June 17, 2019 ====================================================================== For further details, visit https://esorics2019.uni.lu/workshops/ or contact jgalfaro(a)ieee.org

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Research Fellow in Medical Data Mining
by Uwe Aickelin 18 Jun '19

18 Jun '19

Hi, We seek a Research Fellow for a two-year appointment with expertise in computational algorithms, machine learning driven analytics and advanced data mining approaches for medical and health data. You will be working closely with other researchers in biomedical datamining projects, in particular in the analysis of electronic healthcare records. Job no: 0048228 Work type: Full-time, Fixed Term for 2 years Location: Parkville – Melbourne - Australia Department/School: School of Computing and Information Systems Salary: the appointment for this position will be either at a Level A Research Fellow ($89,251- $95,800 p.a) or a Level B Research Fellow ($100,849 - $119,753 p.a), commensurate with experience relevant to the role, plus 9.5% superannuation. Applications close: 12 Jul 2019 11:55 PM AUS Eastern Standard Time Full details: http://jobs.unimelb.edu.au/caw/en/job/899634/research-fellow-in-medical-dat… To apply: https://secure.dc2.pageuppeople.com/apply/422/aw/applicationForm/initApplic… Uwe Aickelin Professor Uwe Aickelin | Head of School of Computing and Information Systems Melbourne School of Engineering Level 8, Doug McDonell Building, 168 Grattan Street The University of Melbourne, Victoria 3010 Australia T: +61 3 8344 3635 E: uwe.aickelin(a)unimelb.edu.au<mailto:uwe.aickelin@unimelb.edu.au> http://aickelin.com/ | http://linkedin.com/in/aickelin I acknowledge the Traditional Owners of the land on which I work, and pay my respects to the Elders, past and present. CRICOS: 00116K This email and any attachments may contain personal information or information that is otherwise confidential or the subject of copyright. Any use, disclosure or copying of any part of it is prohibited. The University does not warrant that this email or any attachments are free from viruses or defects. Please check any attachments for viruses and defects before opening them. If this email is received in error, please delete it and notify us by return email. [signature_1111626909]<https://eng.unimelb.edu.au/about/join-mse/current-opportunities#current-opp…>

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Research Fellow position at Middlesex University, London, UK
by Ramona Trestian 17 Jun '19

17 Jun '19

=========================================================================== Apologies if you receive multiple copies of this email =========================================================================== Research Fellow in Digital Twin Modeling for Automation, Maintenance and Monitoring in Industry 4.0 Smart Factory ** Deadline for applications: July 15th, 2019 ** The relevant information to apply is available in the following link: https://jobs.mdx.ac.uk/vacancy.aspx?ref=SCT244 The successful candidate is expected to work with a team at Middlesex University and collaborate with several other teams from the UK (Festo/Siemens) and India (Indian Institute of Information Technology Sri City) to conduct research in Digital Twin and machine learning technology to develop a digital counterpart (a Digital Twin model) of Industry 4.0 Smart Factory facilities to replicate their functionalities, data, communications, feedback, emergency and safety aspects. The proposed digital twin for industry 4.0 will also enable development towards self-correcting smart process control facility. Applicants will hold a PhD in a relevant area. The post will be a full-time role with fixed term contract of 18 months, based in Hendon, London. Middlesex University is working towards equality of opportunity. Applications from under-represented sections of the community are welcomed. Interested candidates can contact Associate Professor Dr Huan X Nguyen via email: H.Nguyen(a)mdx.ac.uk<mailto:b.barn@mdx.ac.uk> or phone +44 (0) 20 8411 4885 Kind Regards, Ramona Dr. Ramona Trestian Senior Lecturer in Computing and Communications Engineering Design, Engineering and Maths | Faculty of Science and Technology Middlesex University The Burroughs, Hendon London NW4 4BT Room: T115, Town Hall Tel: +44(0)20 8411 2901 Web: http://www.mdx.ac.uk/about-us/our-people/staff-directory/trestian-ramona Research Gate: https://www.researchgate.net/profile/Ramona_Trestian

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