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[CFP] IA^3 2020 - 10th SC Workshop on Irregular Applications: Architectures and Algorithms - UPDATED
by Tumeo, Antonino 14 Aug '20

14 Aug '20

[Please accept our apologies if you receive multiple copies of this message.] !!!!!!!!! NEWS: WORKSHOP GOING VIRTUAL; PARCO SPECIAL ISSUE !!!!!!!! IA^3 2020 10th Workshop on Irregular Applications: Architectures and Algorithms http://hpc.pnl.gov/IA3 November 11, 2020 Virtual Workshop In conjunction with SC20 Sponsored by IEEE TCHPC -------------------- Call for Papers -------------------- Irregular applications occur in many subject matters. While inherently parallel, they exhibit highly variable execution performance at a local level due to unpredictable memory access patterns and/or network transfers, divergent control structures, and data imbalances. Moreover, they often require fine-grain synchronization and communication on large-data structures such as graphs, trees, unstructured grids, sparse matrices, deep nets, tables, and their combinations (such as, for example, attributed graphs). They have a significant degree of latent parallelism, which however is difficult to exploit due to their complex behavior. Current high performance architectures rely on data locality and regular computation to reduce access latencies, and often do not cope well with the requirements of these applications. Furthermore, irregular applications are difficult to scale on current supercomputing machines, due to their limits in fine-grained synchronization and small data transfers. Irregular applications pertain both to well established and emerging fields, such as machine learning, social network analysis, bioinformatics, semantic graph databases, Computer Aided Design (CAD), and computer security. Many of these application areas also process massive sets of unstructured data, which keep growing exponentially. Emerging supercomputing applications are moving towards a convergence of scientific simulation, data analytics, and learning algorithms, mixed in various ways. Addressing the issues of irregular applications on current and future architectures will become critical to solve the challenges in science and data analysis of the next few years. This workshop seeks to explore solutions for supporting efficient execution of irregular applications in the form of new features at the level of the micro- and system-architecture, network, languages and libraries, runtimes, compilers, analysis, algorithms. Topics of interest, of both theoretical and practical significance, include but are not limited to: - Micro- and System-architectures, including multi- and many-core designs, heterogeneous processors, accelerators (GPUs, vector processors, Automata processor), reconfigurable (coarse grained reconfigurable and FPGA designs) and custom processors - Network architectures and interconnect (including high-radix networks, optical interconnects) - Novel memory architectures and designs (including processors-in memory) - Impact of new computing paradigms on irregular workloads (including neuromorphic processors and quantum computing) - Modeling, simulation and evaluation of novel architectures with irregular workloads - Innovative algorithmic techniques - Combinatorial algorithms (graph algorithms, sparse linear algebra, etc.) - Impact of irregularity on machine learning approaches - Parallelization techniques and data structures for irregular workloads - Data structures combining regular and irregular computations (e.g., attributed graphs) - Approaches for managing massive unstructured datasets (including streaming data) - Languages and programming models for irregular workloads - Library and runtime support for irregular workloads - Compiler and analysis techniques for irregular workloads - High performance data analytics applications (including graph databases and solutions that combine graph algorithms with machine learning) - Applications that integrate scientific simulation, data analytics, and learning, and require efficient execution of irregular workloads Besides regular papers, papers describing work-in-progress or incomplete but sound, innovative ideas related to the workshop theme are also encouraged. We solicit both 8-page regular papers and 4-page position papers. Authors of exciting but not mature enough regular papers may be offered the option of a short 4-page paper and related short presentation. -------------------- Important Dates -------------------- Abstract Submission: August 28, 2020 (AoE) Position or Regular Paper Submission: September 4, 2020 (AoE) Notification: September 28, 2020 Artifact Evaluation: September 28, 2020 - October 10, 2020 Camera-ready: October 10, 2020 Workshop: November 11, 2020 -------------------- Submissions -------------------- Submission site: https://submissions.supercomputing.org Submitted manuscripts may not exceed eight (8) pages in length for regular papers and four (4) pages for position papers (excluding references). Authors of regular papers will be able to provide up to one (1) additional pages for the Artifact Description (AD) appendix and, after paper acceptance, up to two (2) additional pages for the Artifact Evaluation (AE) appendix. The templates are available at: http://www.ieee.org/conferences_events/conferences/publishing/templates.html. Accepted papers will be published in the IEEE Digital Library through IEEE TCHPC. -------------------- Artifact Description & Evaluation -------------------- This edition of the workshop invites authors of regular papers to follow a reproducibility initiative like the main SC Conference, with specific appendices for the Artifact Description (AD) and the Artifact Evaluation (AE). Please refer to the SC reproducibility page for further details on the rationale behind AD and AE: https://sc20.supercomputing.org/submit/transparency-reproducibility-initiat… Authors of regular papers will be able to use up to one (1) additional page to provide an Artifact Description (AD) Appendix, describing the details of their software environments and computational experiments to the extent that an independent person could replicate their results. Note that differently from the main conferene, this additional page is voluntary (not mandatory - i.e., if a paper has no computational results, do not attach it) for the workshop, and must focus only on details on software environments and methods to execute the experiments. It should not add details on the proposed technical approaches. Additionally, authors of accepted regular papers will be invited to formally submit their supporting materials to the Artifact Evaluation (AE) process. The process is voluntary, but authors that will participate in the AE will be eligible for the Best Paper Award of the workshop. Supporting materials for the AE include access to the actual software artifact, shared publicly (for example, through the CK - Collective Knowledge - https://github.com/ctuning/ck format), and two (2) further additional pages of the paper that details how to reproduce the results of the paper. For details on how to submit supporting materials to the AE process, please refer to: http://ctuning.org/ae/submission.html. Authors participating in the AE will receive an assessment of the artifact, and the related badge on their paper. For any additional question on the AD and the AE please contact the Artifact Evaluation Chair, Biagio Cosenza, at bcosenza(a)unisa.it. -------------------- Special Issue -------------------- Authors of papers accepted to the workshop will also be invited to submit extended version of their papers to a Special Issue of the journal of Parallel Computing (ParCO) on Hardware/Software Co-design for Sparse and Irregular Applications. Submissions for the special issue with open December 1, 2020 and will close on March 1, 2021. For more information on this special issue, please visit the special issue page and/or contact the guest co-editors, Flavio Vella (flavio.vella(a)unibz.it) and Antonino Tumeo (antonino.tumeo(a)pnnl.gov) https://www.journals.elsevier.com/parallel-computing/call-for-papers/hardwa… -------------------- Organizers -------------------- Antonino Tumeo (PNNL), antonino.tumeo(a)pnnl.gov John Feo (PNNL), john.feo(a)pnnl.gov Vito Giovanni Castellana (PNNL), vitoGiovanni.castellana(a)pnnl.gov -------------------- Proceedings Chair -------------------- Marco Minutoli (PNNL and WSU), marco.minutoli(a)pnnl.gov -------------------- Artifact Evaluation Chair -------------------- Biagio Cosenza (University of Salerno), bcosenza(a)unisa.it -------------------- Technical Program Committee -------------------- Nesreen Ahmed, Intel, US Johnathan Alsop, AMD, US Eishi Arima, University of Tokyo, JP Scott Beamer, University of California, Santa Cruz, US Jonathan Beard, ARM, US Michela Becchi, North Carolina State University, US Sanjukta Bhowmick, University of North Texas, US Erik Boman, SNL, US David Brooks, Harvard University, US Prerna Budhkar, Intel, US Aydin Buluc, LBNL, US Anastasiia Butko, LBNL, US Assefaw Gebremedhin, Washington State University, US Cat Graves, HPE, US Rajiv Gupta, University of California, Riverside, US Peter M. Kogge, Notre Dame University, US John Leidel, Tactical Computing Lab, US Kamesh Madduri, Pennsylvania State University José Moreira, IBM Research, US Miquel Moretó, Barçelona Supercomputing Center, ES Maxim Naumov, Facebook, US Fanny Nina-Paravecino, Microsoft, US Roger Pearce, LLNL, US Keshav Pingali, University of Texas, Austin, US Alejandro Rico, ARM, US Jason Riedy, Georgia Tech, US Thomas B. Rolinger, University of Maryland, US Kentaro Sano, RIKEN, JP John Shalf, LBNL, US Shaden Smith, Microsoft, US Tyler Sorensen, University of California, Santa Cruz, US Ruud van der Pas, Oracle, NL Ana Lucia Varbanescu, University of Amsterdam, NL Flavio Vella, Free University of Bozen, IT Other members TBD

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REMINDER - Call for Nominations: 2020 IEEE CS TCHPC ECR Award for Excellence in HPC
by Vladimir Getov 12 Aug '20

12 Aug '20

Call for Nominations: 2020 IEEE CS TCHPC Early Career Researchers Award for Excellence in High Performance Computing The IEEE Computer Society TCHPC Early Career Researchers Award for Excellence in High Performance Computing recognizes up to 3 individuals who have made outstanding, influential, and potentially long-lasting contributions in the field of high-performance computing within 5 years of receiving their PhD degree as of January 01 of the year of the award. It is sponsored by the IEEE Computer Society Technical Consortium on High Performance Computing (TCHPC) and its member Technical Committees: •Technical Committee on Parallel Processing (TCPP) •Technical Committee on Computer Communications (TCCC) •Technical Committee on Distributed Processing (TCDP) •Technical Committee on Cloud Computing (TCCLD) •Task Force on Rebooting Computing (TFRC) •Technical Committee on Computational Life Sciences (TCCLS) Nominations: A candidate must be nominated by member(s) of the community. An individual may nominate at most one candidate for this award. The nomination application must be submitted via email to tchpc-awards(a)computer.org as a single PDF file and should contain the following details: 1.Name/email of person making the nomination (self-nominations are not eligible). 2.Name/email of candidate for whom the award is recommended. 3.A statement by the nominator (maximum of 500 words) as to why the nominee is highly deserving of the award. Note that since the award is for outstanding contributions, the statement and supporting letters should address what the contributions are and why they are both outstanding and significant. The nomination should also list the names and email of up to 3 persons who have provided letters supporting the nomination. 4.CV of the nominee. 5.Up to three letters of support from persons other than the nominator – these should be collected by the nominator and included in the nomination. Important Dates: •Nomination Deadline: August 15, 2020 •Results Notification: September 15, 2020 Award Selection Committee: The award selection committee consists of: •Rosa M. Badia, Barcelona Supercomputing Center, Spain •Tom Conte, Georgia Institute of Technology, USA •Yufei Ding, University of California Santa Barbara, USA •Vladimir Getov, University of Westminster, UK (Chair) •Xu Liu, College of William & Mary, USA •Guillaume Pallez, Inria, France •Happy Sithole, National Integrated Cyber-Infrastructure (NICIS), South Africa Note that members of the selection committee cannot be nominators or provide support letters. Award & Presentation Note: Awardees will be presented a plaque and will be recognized by IEEE Computer Society and TCHPC websites, newsletters and archives. The awards will be presented at the SC20 conference that will be held virtually during November 9 – 19, 2020. Details of the conference can be found at http://sc20.supercomputing.org/. For more information, please send email to tchpc-awards(a)computer.org. The University of Westminster is a charity and a company limited by guarantee. Registration number: 977818 England. Registered Office: 309 Regent Street, London W1B 2HW. This message and its attachments are private and confidential. If you have received this message in error, please notify the sender and remove it and its attachments from your system.

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Maple Conference 2020 - Reminder
by Juergen Gerhard 10 Aug '20

10 Aug '20

The deadline to submit a presentation proposal to the Maple Conference 2020 is coming up quickly! Proposals are due on Aug. 16, 2020. Please see the Call for Presentations, below, for details. Call for Presentations Maple Conference 2020 invites submissions of proposals for presentations on a range of topics related to Maple, falling into three broad categories: Maple in Education Topics could include, but are not limited to: * Effective ways to use Maple as a tool to support remote learning or hybrid courses * Innovative uses of Maple in the classroom (new ways to approach old problems, methods for using Maple to teach courses outside of traditional core math, impact on the curriculum, etc.) * Measurable improvements in student performance after integrating Maple into a course * Classroom tips and techniques/best practices drawn from experience Algorithms and Software Topics could include, but are not limited to: * Symbolic and symbolic-numeric methods for solving mathematical problems, from any field * Algorithm optimization and performance tuning techniques * Effective use of types and data representations for particular problems or domains * User interfaces for mathematical problem solving Applications of Maple Topics could include, but are not limited to: * Applications that use Maple in unusual settings or in unusual ways * Applications that push or extend the limit of what Maple can do * Applications that explore critical world problems * Applications that combine Maple with other technology All presentation proposals will be reviewed by the conference organizing committee. If the proposal is accepted, the submitter will be invited to present their work at the conference. After the conference, all presenters and invited speakers will be invited to submit a full paper for inclusion in the conference proceedings. These submissions will undergo peer-review, and the decision about acceptance or rejection lies with the Maple Conference 2020 Program Committee<https://www.maplesoft.com/mapleconference/Papers-and-Presentations.aspx>. Presentation Proposals Your presentation proposal should be in the form of a title and abstract for your proposed talk. Abstracts should be under one page/400 words in length, and must be in English. If your presentation proposal is accepted, at least one author is expected to attend the conference to present the paper. All presentations are to be given in English. Papers (optional) After the conference, all presenters and invited speakers will be invited to submit a full paper on the work they presented. These papers will undergo peer-review, and if accepted, will appear in the conference proceedings. Papers should not duplicate work published or submitted for consideration elsewhere. Papers must be in English and should be 6-15 pages in length. Please follow the Springer LNCS conference proceedings author instructions<https://www.springer.com/gp/computer-science/lncs/conference-proceedings-gu…>. Authors should download the .zip file: "LaTeX2e Proceedings Templates." Submission Instructions Proposals should be in the form of a Word doc or a PDF. Submission is via EasyChair at https://easychair.org/conferences/?conf=maple2020 Conference Details and Important Dates Conference Date: November 2-6, 2020 Location: The conference will be held online. Program Chairs: Robert M. Corless, Western University, and Jürgen Gerhard, Maplesoft Submission Deadlines Abstract submission: July 15, 2020 Extended to August 16, 2020 Notification of acceptance/rejection of presentation proposal: August 31, 2020 September 18, 2020 Paper submission: December 31, 2020 Notification of paper acceptance/rejection: February 28, 2021 Camera-ready copy due: March 31, 2021 We look forward to reviewing your proposal. See you at Maple Conference 2020! Sincerely, Rob Corless and Jürgen Gerhard, Maple Conference 2020 Program Chairs (c) Maplesoft, a division of Waterloo Maple Inc., 615 Kumpf Drive Waterloo ON Canada N2V1K8; customerservice(a)maplesoft.com<mailto:customerservice@maplesoft.com>. All trademarks are property of their respective owners. To manage subscriptions or to opt out of all commercial email communications from Maplesoft, please click here<%25%25unsubscribe%25%25>.

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HPBench 2020 is going online and accordingly dates has changed
by Samar Aseeri 06 Aug '20

06 Aug '20

Dear Sir, dear Madam, Please, can you pass this announcement also to interested colleagues. Kind regards ========================================================================== CALL FOR PAPERS The 7th Special Session on High Performance Computing for Application Benchmarking and Optimization (HPBench 2020) As part of the International Conference on High Performance Computing & Simulation (HPCS 2020) http://hpcs2020.cisedu.info/ or http://conf.cisedu.info/rp/hpcs20 Barcelona, Spain (Virtual/Online event) ========================================================================== Benchmarking is an essential aspect of modern high performance computing and computational science, and as such, it provides a means for quantifying and comparing the performance of different computer systems. With a large combination of aspects to benchmark, all the way from the capability of a single core, to cluster configuration, and to various software configurations, the benchmarking process is more of an art than science. However, the results of this process drive modern science and are vital for the community to draw sensible conclusions on the performance of applications and systems. This special session focuses on research work aimed at benchmarking modern parallel and distributed systems for addressing a number of real world problems. As such, contributions concerning the definition of new open platforms, new benchmarks to match modern architectural evolutions, studies on the aspects of benchmarking different aspects of systems (from raw runtime performance to energy consumption to energy consumed per data movement) and mathematical foundations of benchmarking are sought. IMPORTANT DATES : Papers Due: 07 September 2020 - Extended Author Notification: 28 September 2020 Camera-Ready Submission: 09 October 2020 Conference Dates: 10-14 October 2020 TOPICS : The HPBench topics of interest include, but are not limited to -Open Platforms for Parallel and Distributed Application Benchmarking and Optimization -Benchmarking on the Cloud -Benchmarking of Clusters, Supercomputers, and large-scale systems -Benchmarking the Performance of I/O -Benchmarking of Energy and Energy Efficiency -Benchmarking Web Services -Virtualization for Distributed Benchmarking -Data Distribution for Benchmarking -Performance results of benchmarks on modern platforms -Scalability Aspects of Benchmarking Parallel Applications on Parallel and Distributed Systems -Benchmarking of Parallel Scientific and Business Applications -Performance of Benchmarking Applications (Eg: NAS parallel benchmarks) -Techniques, frameworks and results concerning the benchmarking of library packages -Tools and frameworks for performance modeling systems and applications -Tools and frameworks for simulation, measurement and monitoring -Performance Measurements, Monitoring, Modeling and Simulation -Domain-specific benchmarks and applications (such as image processing, pattern recognition, cryptography, biometrics, differential equation solvers, signal processing and alike) -Mathematical Foundations of Benchmarking, Metrics and Heuristics GENERAL CHAIRS : Samar Aseeri, King Abdullah University of Science and Technology, Saudi Arabia Jordi Blasco, New Zealand eScience Infrastructure & Landcare Research, New Zealand Luigi Iapichino, Leibniz Supercomputing Centre (LRZ), Germany TECHNICAL PROGRAM COMMITTEE: Cosimo Anglano, Universitá del Piemonte Orientale, Italy Fabio Baruffa, Intel, Germany Ben Blamey, Uppsala University, Sweden Suren Byna, Lawrence Berkeley National Laboratory, California, USA Paul Carpenter, Barcelona Supercomputing Center, Spain Jesus Carretero, Universidad Carlos III de Madrid, Spain Douglas Doerfler, Lawrence Berkeley National Laboratory, USA Zhiyi Huang, University of Otago, New Zealand Clay Hughes, Sandia National Laboratories, USA Aleksandar Ilic, Universidade de Lisboa, Portugal Vasileios Karakasis, CSCS Swiss National Supercomputing Centre, Switzerland Bok Jik Lee, Seoul National University, Korea Sebastian Lührs, Jülich Supercomputing Centre, Forschungszentrum Jülich GmbH, Jülich, Germany Ravi Reddy Manumachu, University College Dublin, Ireland Dana Petcu, West University of Timisoara, Romania Ivan Rodero, Rutgers University, USA ********************************************************************* For more information see http://conf.cisedu.info/rp/hpcs20/2-conference/special-sessions/session02-h… Kind Regards -- Samar Aseeri, PhD Computational Scientist Extreme Computing Research Center (ECRC) Building 1 -Office: 0128 *King Abdullah University of Science & Technology* Thuwal, Saudi Arabia -- This message and its contents, including attachments are intended solely for the original recipient. If you are not the intended recipient or have received this message in error, please notify me immediately and delete this message from your computer system. Any unauthorized use or distribution is prohibited. Please consider the environment before printing this email.

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CFP - 21th IEEE/ACM International Symposium on Cluster, Cloud and Internet Computing (CCGrid 2021)
by Bahman Javadi 04 Aug '20

04 Aug '20

============================================================================== The 21th IEEE/ACM International Symposium on Cluster, Cloud and Internet Computing (CCGrid 2021) May 10-13, 2021, Melbourne, Victoria, Australia cloudbus.org/ccgrid2021/ ============================================================================== Call For Papers The 21st IEEE/ACM international Symposium on Cluster, Cloud and Internet Computing (CCGrid 2021) is a leading forum to disseminate and discuss research activities and results on a broad range of topics in distributed systems, ranging from computing Clusters to widely distributed Clouds and emerging Internet computing paradigms such as Fog/Edge Computing for Internet of Things (IoT)/Big Data applications. The conference features keynotes, technical presentations, posters, workshops, tutorials, as well as the SCALE challenge featuring live demonstrations and the ICFEC 2021 conference. In 2021, IEEE/ACM CCGrid 2021 will be ‘self-colocated’ with its postponed 2020 edition, in Melbourne, Australia. We will jointly celebrate the 20th and 21st anniversary of the conference ! We solicit original contributions on all aspects of distributed systems and applications in the context of Cluster, Cloud, and Internet computing environments. Specific topics of interest include but are not limited to the following: Internet Computing Frontiers: Edge, Fog, Serverless, Lambda, Streaming, Highly decentralized approaches to cloud computing. Edge/Fog computing, sensor data streaming and computation on the edges of the network. Function as a Service (Faas), Backend as a Service (BaaS), serverless computing, lambda computing. Architecture, Networking, Data Centers: Service oriented architectures. Utility computing models. IaaS, PaaS, SaaS, *aaS paradigms. Service composition and orchestration. Software-Defined Network-enabled Systems. Micro-datacenter, cloudlet, edge, or fog computing infrastructure. Virtualized hardware: GPUs, tensor processing units, FPGAs. Storage and I/O Systems: Distributed storage, cloud storage, Storage as a Service, data locality techniques for in-memory processing, storage in the edge. Programming Models and Runtime Systems: Programming models, languages, systems and tools/environments. Virtualization, containers, and middleware technologies. Actors, agents, programming decentralized computing systems. Resource Management and Scheduling: Resource allocation algorithms, profiling, modeling. Cluster, cloud, and internet computing scheduling and meta-scheduling techniques. Performance Modelling and Evaluation: Performance models. Monitoring and evaluation tools. Analysis of system/application performance. Cyber-Security, Privacy and Resilient Distributed Systems: Distributed Systems security and trust. Access control. Data privacy and integrity. Regulation. Resiliency of service attacks. Sustainable and Green Computing: Environment friendly computing ecosystems. Hardware/software/application energy efficiency. Power, cooling and thermal awareness. Applications: Data Science, Artificial Intelligence, Machine Learning, Cyber-Physical Systems, e-Health, Internet of Things (IoT)-enabled Smart Systems and Applications. ------------------------ Chairs and Committees ------------------------ General Chairs: Rajkumar Buyya, University of Melbourne, Australia Gul Agha, University of Illinois at Urbana-Champaign, USA Program Committee Co-Chairs: Laurent Lefevre, INRIA, France Stacy Patterson, RPI, USA Young Choon Lee, Macquarie University, Australia Important Dates Paper Due: 8 December 2020 (Final paper submission : 15 December) Acceptance Notification: 8 February 2021 Camera Ready Papers Due: 3 March 2021 ==============================================================================

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CFP: HiPar20 - Papers due August 31st - SC20 Going Virtual
by Rizzi, Francesco NMN 01 Aug '20

01 Aug '20

******************************************************************** Call for Participation Workshop on Hierarchical Parallelism for Exascale Computing ---HiPar20--- Held in conjunction with SC20 - virtual event In cooperation with: IEEE and TCHPC. www.hipar.net ******************************************************************** ================================ Summary ================================ High Performance Computing (HPC) platforms are evolving towards having fewer but more powerful nodes, driven by the increasing number of physical cores in multiple sockets and accelerators. The boundary between nodes and networks is starting to blur, with some nodes now containing tens of compute elements and memory sub-systems connected via a memory fabric. The immediate consequence is an increase in complexity due to ever more complex architectures (e.g., memory hierarchies), novel accelerator designs, and energy constraints. Spurred largely by this trend, hierarchical parallelism is gaining momentum. This approach embraces, rather than avoiding, the intrinsic complexity of current and future HPC systems by exploiting parallelism at all levels: compute, memory and network. This workshop focuses on hierarchical parallelism. It aims to bring together application, hardware, and software practitioners proposing new strategies to fully exploit computational hierarchies, and examples to illustrate their benefits to achieve extreme scale parallelism. ================================ Scope and Aims ================================ HiPar20 is designed to showcase new studies, approaches, and cutting-edge ideas on hierarchical parallelism for extreme-scale computing. We welcome papers and talks from the HPC community addressing the use of emerging architectures — focusing particularly on those characterized by fewer but more powerful nodes as well as systems with hierarchical network with tiered communication semantics. Specifically, the emphasis is on the design, implementation, and application of programming models for multi-level parallelism, including abstractions for hierarchical memory access, heterogeneity, multi-threading, vectorization, and energy efficiency, as well as scalability and performance studies thereof. Of particular interest are models addressing these concerns portably: providing ease of programming and maintaining performance in the presence of varied accelerators, hardware configurations, and execution models. Studies that explore the merits of specific approaches to addressing these concerns, such as generic programming or domain specific languages, are also in scope. The workshop is not limited to the traditional HPC software community. As one example, another key topic is the use of hierarchical parallelism in dealing with the challenges arising in machine learning due to the growing importance of this field, the large scale of systems tackled in that area, and the increasing interest from more traditional HPC areas. A goal of HiPar20 is to highlight not just success stories but also discuss drawbacks and challenges. HiPar20 welcomes HPC practitioners from all areas, ranging from hardware and compiler experts to algorithms and software developers, to present and discuss the state of the art in emerging approaches to utilize multi-level parallelism for extreme scale computing. ================================ Topics ================================ Submissions are encouraged in, but not limited to the following areas: * Hierarchical work scheduling and execution; * Hardware, software, and algorithmic advances for efficient use of memory hierarchies, multi-threading and vectorization; * Efficient use of nested parallelism, for example CUDA dynamic parallelism, for large scale simulations; * Programming heterogeneous nodes; * Leading-edge programming models, for example fully distributed task-based models and hybrid MPI+X, with X representing shared memory parallelism via threads, vectorization, tasking or parallel loop constructs. * Implementations of algorithms that are natural fits for nested work (for example approaches that use recursion); * Challenges and successes in managing computing hierarchies; * Examples demonstrating effective use of the combination of inter-node and intra-node parallelism; * Novel approaches leveraging asynchronous execution to maximize efficiency; * Challenges and successes of porting of existing applications to many-core and heterogeneous platforms; * Recent developments in compiler optimizations for emerging architectures; * Applications of hierarchical programming models from emerging AI fields, for example deep learning and extreme-scale data analytics. ================================ Submission Guidelines ================================ We solicit submissions in the following categories: (a) Regular research papers: Intended for submissions describing original work and ideas that have not appeared in another conference or journal, and are not currently under review for any other conference or journal. Regular papers must be at least (6) and must not exceed (10) letter size pages (U.S. letter – 8.5"x11"). Accepted regular papers will be published in the workshop proceedings in cooperation with IEEE TCHPC. (b) Short papers: Intended for material that is not mature enough for a full paper, to present novel, interesting ideas or preliminary results that will be formally submitted elsewhere. Short papers must not exceed four (4) pages. Short papers will NOT be included in the proceedings. Please note that: - The page limits above only apply to the core text, content-related appendices, and figures. References and reproducibility appendix do not count against the page limit. - When deciding between submissions with comparable evaluations, priority will be given to those with higher quality of presentation and whose focus relates more directly to the workshop themes. - Papers must be submitted electronically at https://submissions.supercomputing.org/ and must follow the IEEE format: www.ieee.org/conferences/publishing/templates.html ================================ Reproducibility Initiative ================================ HiPar20 follows the SC20 reproducibility and transparency initiative. The SC20 details can be found at: https://sc20.supercomputing.org/submit/transparency-reproducibility-initiat…. HiPar20 requires all submission to include an Artifact Description (AD) Appendix. Note that the AD will be auto-generated from author responses to a form embedded in the online submission system. The Artifact Evaluation (AE) remains optional. We also encourage authors to follow the transparency initiative for two reasons: (a) it helps the authors themselves with the actual writing and structuring of the paper to express the research process; (b) it helps readers understand the thinking process used by the authors to plan, obtain and explain their results. ================================ HiPar20 will be virtual ================================ SC20 will be fully virtual: https://sc20.supercomputing.org/2020/07/27/sc20-virtual-event-announced-by-… Please refer to our website www.hipar.net for latest updates. ================================ Important dates ================================ Submission Deadline: August 31, 2020 (AoE) Author Notification: September 14, 2020 Camera Ready: October 5, 2020 Final Program: October 9, 2020 Workshop Date: November 11-13, 2020 (details TBD) ================================ Chairs and Committees ================================ Workshop chair: - Francesco Rizzi NexGen Analytics Organizing Committee: - D.S. Hollman Sandia National Labs - Lee Howes Facebook - Xiaoye Sherry Li Lawrence Berkeley National Lab Program Committee Chairs: - Christian Trott Sandia National Labs - Filippo Spiga NVIDIA Program Committee: - Mark Bull EPCC - Carlo Cavazzoni CINECA - Benjamin Cumming CSCS - Chris Forster NVIDIA - Marta Garcia Gasulla BSC - Anja Gerbes Goethe Uni.Frankfurt - Mark Hoemmen Stellar Science - Toshiyuki Imamura RIKEN - Guido Juckeland Helmholtz Center - Hartmut Kaiser LSU - Vivek Kale Brookhaven Labs - Jonathan Lifflander Sandia National Labs - James Lin Shanghai J.Tong Univ. - Aram Markosyan Xilinx - Rui Oliveira INESC TEC - Philippe Pebay NexGen Analytics - Zhiqi Tao Intel - Flavio Vella Univ. of Bozen - Michèle Weiland EPCC - Jeremiah Wilke Sandia National Labs ================================ Contact information: ================================ For questions, please email us at: hiparws(a)gmail.com

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CFP: Virtual/Online Conference Announcement and new dates for Virtualization in Machine Learning, High Performance Computing and Simulation
by Uday Kurkure 30 Jul '20

30 Jul '20

Dear All, 1. Covid-19 Announcement: Under the extenuating circumstances due to the international pandemic, HPCS 2020 is going fully virtual/online. Accepted and presented papers in the HPCS 2020 will be published in the conference proceedings as usual and submitted for inclusion in the Digital Library after they are successfully presented at the virtual conference. Information and instructions on how to prepare for the virtual presentation will be posted on the conference website and sent separately. Registration fees for the HPCS 2020 will be adjusted accordingly and posted on the HPCS 2020 website as well. 2. The deadlines have been extended for the new dates for the conference. You can still make changes until the deadline. After the deadline, the paper will be reviewed by multiple reviewers. You will be notified about the final status of the paper. IMPORTANT DATES Paper Submissions: ------------------------------------------- 07 September 2020 - Extended Acceptance Notification: -------------------------------------- 28 September 2020 Camera Ready Papers and Registration Due by: ----------- 09 October 2020 Conference Dates: --------------------------------------------- 10-14 December 2020 3. Call for Papers: The Third Special Session on Virtualization in Machine Learning, High Performance Computing and Simulation (VIRT 2020) CALL FOR PAPERS & PARTICIPATION As part of The 18th International Conference on High Performance Computing & Simulation (HPCS 2020) 10 - 14 December 2020 Barcelona, Spain (Virtual/Online event) http://hpcs2020.cisedu.info/ or http://conf.cisedu.info/rp/hpcs20 Paper Submission Deadline: 07 September 2020 - Extended Submissions could be for full papers, short papers, poster papers, or posters PURPOSE AND SCOPE Virtualization has become the foundation of cloud computing. The scale of cloud computing data centers is similar to the supercomputers used in High Performance Computing. Both involve millions of CPU cores, tens of thousands of accelerators like GPUs, FPGAs connected by high speed interconnects and different connection topologies. Studies have shown that the GPU utilization in HPC is often at 50%. Virtualization can be the key to increasing resource utilization and managing massive infrastructures efficiently. GPU vendors have introduced virtualized versions of GPUs. FPGAs are being deployed in virtual infrastructure. These and other developments in the field, along with future exascale systems, will provide increasing degree of virtualization within the systems. The goal of this special session is to be an opportunity to discuss and exchange research on the different virtualization technologies and how they can be efficiently applied in High Performance Computing. Theoretical research, engineering solutions dealing with practical tradeoffs, and complex system implementation papers are welcomed. The VIRT topics include (but are not limited to) the following: Virtualization in HPC o Energy efficient solutions for HPC applications in the cloud environment o High-availability based on system-level virtualization mechanisms for HPC o Fault tolerance mechanisms based on system-level virtualization mechanisms for HPC o Performance and evaluation of diverse HPC workloads in virtualization environment o Security Isolation, Resource Isolation and Data Isolation in Virtualized HPC o Flexibility and Ease of system administration and management for virtualized environments for HPC o Running diverse workloads o Running heterogeneous Operating Systems o Live Migration and Suspend/Resume of VMs to improve resource utilization and avoid downtime o Scheduling of resources and Workloads o Software Defined Data Centers (SDDC) o Hypervisors and other virtualization solutions tailored for HPC systems o Big Data and Analytics in Virtualized Environments o Enterprise High Performance Computing in Virtualized Environments Accelerators in Virtualized HPC Environments: o Virtualized GPUs o Scheduling of Virtual GPUs o Using FPGAs in Virtualization Stack o Dynamic Reconfiguration of FPGAs IO Virtualization o Network Virtualization o SR-IOV o Software Defined Networking (SDN) o Storage Virtualization o RDMA and vRDMA Containers in HPC o Isolation of Multiple User-Spaces o Running containers in Virtual Machines Tools o Virtualization solutions for dealing with heterogeneity in HPC environments o Compilers for heterogenous architectures involving GPUS, FPGAs, multi-core CPUs o Operating system support for virtualization in HPC systems o Debugging and/or profiling in virtual environments Algorithms o Distributed Resource Scheduling o Distributed Computing AI, Machine Learning and Deep Learning o Virtualization of Deep Learning Workloads o Deep Learning in HPC Simulations o Resource Allocation Using Machine Learning o Reinforcement Learning for Resource Allocation o Machine Learning to build tools for measurement & calibration Virtualization in Simulation INSTRUCTIONS FOR PAPER SUBMISSIONS You are invited to submit original and unpublished research works on above and other topics related to virtualization in high performance computing and simulation. Submitted papers must not have been published or simultaneously submitted elsewhere until it appears in HPCS proceedings, in the case of acceptance, or notified otherwise. Submission can be for - Regular papers, please submit a PDF copy of your full manuscript, not to exceed 8 double-column formatted pages per template, and include up to 6 keywords and an abstract of no more than 400 words. Additional pages will be charged additional fee. Submission should include a cover page with authors' names, affiliation addresses, fax numbers, phone numbers, and all authors email addresses. Please, indicate clearly the corresponding author(s) although all authors are equally responsible for the manuscript. - Short papers (up to 4 pages), please submit a PDF copy of your full manuscript, not to exceed 4 double-column formatted pages per template, and include up to 6 keywords and an abstract of no more than 400 words. Additional pages will be charged additional fee. Submission should include a cover page with authors' names, affiliation addresses, fax numbers, phone numbers, and all authors email addresses. Please, indicate clearly the corresponding author(s) although all authors are equally responsible for the manuscript. - Poster papers and Posters (please refer to http://hpcs2020.cisedu.info/1-call-for-papers-and-participation/call-for-po… for posters submission details) will also be considered. Please specify the type of submission you have. Please include page numbers on all preliminary submissions to make it easier for reviewers to provide helpful comments. Submit a PDF copy of your full manuscript to the special session paper submission site at https://cmt3.research.microsoft.com/VIRT2020 . Acknowledgement will be sent within 48 hours of submission. Conference Policies Only PDF files will be accepted, uploaded to the submission link above. Each paper will receive a minimum of three reviews. Papers will be selected based on their originality, relevance, significance, technical clarity and soundness, presentation, language, and references. Submission implies the willingness of at least one of the authors to register and present the paper, if accepted. At least one of the authors of each accepted paper will have to register and attend (virtually) the HPCS 2020 conference to present the paper at the special session as scheduled. By submitting the paper to the HPCS conference, all authors agree to abide by all HPCS conference paper submission, publication and presentation policies as well as following ethical and professional codes of conduct, including those of the professional co-sponsoring organizations. Contents of manuscripts submitted to the tracks program committees shall be regarded as privileged as well and handled in the same manner and standards. For more information, please refer to the Authors Info and Registration Info pages. Proceedings Accepted papers will be published in the Conference proceedings. Instructions for final manuscript format and requirements will be posted on the HPCS 2020 Conference web site. It is our intent to have the proceedings formally published in hard and soft copies and be available at the time of the conference. The proceedings is projected to be included in the IEEE or ACM Digital Library and indexed in all major indexing services accordingly. SPECIAL ISSUE Plans are underway to have the best papers, in extended version, selected for possible publication in a reputable journal as special issue. Detailed information will soon be announced and will be made available on the conference website. If you have any questions about paper submission or the special session, please contact the special session organizers. IMPORTANT DATES Paper Submissions: ------------------------------------------- 07 September 2020 - Extended Acceptance Notification: -------------------------------------- 28 September 2020 Camera Ready Papers and Registration Due by: ----------- 09 October 2020 Conference Dates: --------------------------------------------- 10-14 December 2020 SPECIAL SESSION ORGANIZERS Uday Kurkure VMware, Inc. 3401 Hillview Avenue Palo Alto, CA 94304, USA Phone: +1 650-427-1179 Fax: +1 650- Email: uday(a)alumni.stanford.edu Hari Sivaraman VMware, Inc. 3401 Hillview Avenue Palo Alto, CA 94304, USA Phone: +1 650-427-3681 Fax: +1 650- Email: hsivaraman(a)vmware.com Lan Vu VMware, Inc. 3401 Hillview Avenue Palo Alto, CA 94304, USA Phone: +1 650-427-1327 Fax: +1 650- Email: lanv(a)vmware.com Uday Kurkure, Lan Vu and Hari Sivaraman Co-Chairs of Virtualization in Machine Learning, High Performance Computing and Simulation

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CFP - The Sixth IEEE Workshop on Quantum Communications and Information Technology (QCIT’20)
by Peter Mueller 29 Jul '20

29 Jul '20

Call for Papers The sixth workshop on Quantum Communications and Information Technology (QCIT’20) http://qcit.committees.comsoc.org/ At IEEE Globecom’20, Taipei, Taiwan, 7-11 December 2020 http://globecom2020.ieee-globecom.org Scope of the workshop: Recent experimental results confirm feasibility of real applications in quantum communications, computing, security, and sensing. Companies and governments started to invest significant amounts of funding in research and development of quantum technologies. These developments are offering numerous opportunities to contribute to the research and engineering aspects of quantum technologies. On the scientific side, the workshop also addresses novel ideas in the fields of quantum communications and information processing, which contribute to the general know-how of quantum technologies. The following topics are key to the workshop, but not exclusive: - Quantum communications - Entanglement distillation & swapping - Quantum state discrimination - Quantum sensing & metrology - Quantum coding theory - Homomorphic applications - Quantum networks - Quantum algorithms - Error Correction for quantum systems - Interconnection and complexity theory - Modeling and simulation - Optimized algorithms and applications - Quantum eco-system - Other topics related to quantum communications and information processing Submission info for camera-ready manuscripts: Original and unpublished regular papers are solicited from the above-mentioned areas. Regular papers have a length of 4 to 6 pages with an optional payable 7th page. All manuscripts will be peer reviewed and published in the workshop proceedings and after presentation in IEEE Xplore. Templates for the manuscripts can be downloaded from: https://www.ieee.org/conferences_events/conferences/publishing/templates.ht… The formatted manuscript should be electronically submitted as pdf via EDAS: https://edas.info/N27538 Further information is available in the Globecom 2020 webpages: http://globecom2020.ieee-globecom.org Important dates: Manuscript submission due date: 1. August 2020 Notification date: 17. August 2020 Final manuscript due date: 1. October 2020 QCIT’20 workshop date: 7. December 2020 (Afternoon) Globecom’20 conference date: 7.-11. December 2020 Workshop organizers: Andrea Conti, University of Ferrara, Italia, a.conti(a)ieee.org Lajos Hanzo, University of Southampton, United Kingdom, lh(a)ecs.soton.ac.uk Peter Mueller, IBM Research Zurich Laboratory, Switzerland, pmu(a)zurich.ibm.com Michael Ng, University of Southampton, United Kingdom, sxn(a)ecs.soton.ac.uk

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Call for Nominations: 2020 IEEE CS TCHPC ECR Award for Excellence in HPC
by Vladimir Getov 20 Jul '20

20 Jul '20

Call for Nominations: 2020 IEEE CS TCHPC Early Career Researchers Award for Excellence in High Performance Computing The IEEE Computer Society TCHPC Early Career Researchers Award for Excellence in High Performance Computing recognizes up to 3 individuals who have made outstanding, influential, and potentially long-lasting contributions in the field of high-performance computing within 5 years of receiving their PhD degree as of January 01 of the year of the award. It is sponsored by the IEEE Computer Society Technical Consortium on High Performance Computing (TCHPC) and its member Technical Committees: • Technical Committee on Parallel Process (TCPP) • Technical Committee on Computer Communications (TCCC) • Technical Committee on Distributed Processing (TCDP) • Technical Committee on Cloud Computing (TCCLD) • Task Force on Rebooting Computing (TFRC) • Technical Committee on Computational Life Sciences (TCCLS) Nominations: A candidate must be nominated by member(s) of the community. An individual may nominate at most one candidate for this award. The nomination application must be submitted via email to tchpc-awards(a)computer.org as a single PDF file and should contain the following details: 1. Name/email of person making the nomination (self-nominations are not eligible). 2. Name/email of candidate for whom the award is recommended. 3. A statement by the nominator (maximum of 500 words) as to why the nominee is highly deserving of the award. Note that since the award is for outstanding contributions, the statement and supporting letters should address what the contributions are and why they are both outstanding and significant. The nomination should also list the names and email of up to 3 persons who have provided letters supporting the nomination. 4. CV of the nominee. 5. Up to three letters of support from persons other than the nominator – these should be collected by the nominator and included in the nomination. Important Dates: • Nomination Deadline: August 15, 2020 • Results Notification: September 15, 2020 Award Selection Committee: The award selection committee consists of: • Rosa M. Badia, Barcelona Supercomputing Center, Spain • Tom Conte, Georgia Institute of Technology, USA • Yufei Ding, University of California Santa Barbara, USA • Vladimir Getov, University of Westminster, UK (Chair) • Xu Liu, College of William & Mary, USA • Guillaume Pallez, Inria, France • Happy Sithole, National Integrated Cyber-Infrastructure (NICIS), South Africa Note that members of the selection committee cannot be nominators or provide support letters. Award & Presentation Note: Awardees will be presented a plaque and will be recognized by IEEE Computer Society and TCHPC websites, newsletters and archives. The awards will be presented at the SC20 conference that will be held in Atlanta, GA, USA during November 15 – 20, 2020. Details of the conference can be found at http://sc20.supercomputing.org/. For more information, please send email to tchpc-awards(a)computer.org. The University of Westminster is a charity and a company limited by guarantee. Registration number: 977818 England. Registered Office: 309 Regent Street, London W1B 2HW. This message and its attachments are private and confidential. If you have received this message in error, please notify the sender and remove it and its attachments from your system.

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Maple Conference 2020 - Deadline Extended
by Juergen Gerhard 13 Jul '20

13 Jul '20

The deadline to submit a presentation proposal to the Maple Conference 2020 has been extended until Aug. 16, 2020. Please see the Call for Presentations, below, for details. Call for Presentations Maple Conference 2020 invites submissions of proposals for presentations on a range of topics related to Maple, falling into three broad categories: Maple in Education Topics could include, but are not limited to: * Effective ways to use Maple as a tool to support remote learning or hybrid courses * Innovative uses of Maple in the classroom (new ways to approach old problems, methods for using Maple to teach courses outside of traditional core math, impact on the curriculum, etc.) * Measurable improvements in student performance after integrating Maple into a course * Classroom tips and techniques/best practices drawn from experience Algorithms and Software Topics could include, but are not limited to: * Symbolic and symbolic-numeric methods for solving mathematical problems, from any field * Algorithm optimization and performance tuning techniques * Effective use of types and data representations for particular problems or domains * User interfaces for mathematical problem solving Applications of Maple Topics could include, but are not limited to: * Applications that use Maple in unusual settings or in unusual ways * Applications that push or extend the limit of what Maple can do * Applications that explore critical world problems * Applications that combine Maple with other technology All presentation proposals will be reviewed by the conference organizing committee. If the proposal is accepted, the submitter will be invited to present their work at the conference. After the conference, all presenters and invited speakers will be invited to submit a full paper for inclusion in the conference proceedings. These submissions will undergo peer-review, and the decision about acceptance or rejection lies with the Maple Conference 2020 Program Committee<https://www.maplesoft.com/mapleconference/Papers-and-Presentations.aspx>. Presentation Proposals Your presentation proposal should be in the form of a title and abstract for your proposed talk. Abstracts should be under one page/400 words in length, and must be in English. If your presentation proposal is accepted, at least one author is expected to attend the conference to present the paper. All presentations are to be given in English. Papers (optional) After the conference, all presenters and invited speakers will be invited to submit a full paper on the work they presented. These papers will undergo peer-review, and if accepted, will appear in the conference proceedings. Papers should not duplicate work published or submitted for consideration elsewhere. Papers must be in English and should be 6-15 pages in length. Please follow the Springer LNCS conference proceedings author instructions<https://www.springer.com/gp/computer-science/lncs/conference-proceedings-gu…>. Authors should download the .zip file: "LaTeX2e Proceedings Templates." Submission Instructions Proposals should be in the form of a MS Word document or a PDF document. Submission is via EasyChair at https://easychair.org/conferences/?conf=maple2020 Conference Details and Important Dates Conference Date: November 2-6, 2020 Location: The conference will be held online. Program Chairs: Robert M. Corless, Western University, and Jürgen Gerhard, Maplesoft Submission Deadlines Abstract submission: July 15, 2020 Extended to August 16, 2020 Notification of acceptance/rejection of presentation proposal: August 31, 2020 September 18, 2020 Paper submission: December 31, 2020 Notification of paper acceptance/rejection: February 28, 2021 Camera-ready copy due: March 31, 2021 See you at Maple Conference 2020! Sincerely, Rob Corless and Jürgen Gerhard, Maple Conference 2020 Program Chairs (c) 2020 Maplesoft, a division of Waterloo Maple Inc., 615 Kumpf Drive Waterloo ON Canada N2V1K8; customerservice(a)maplesoft.com<mailto:customerservice@maplesoft.com>. All trademarks are property of their respective owners. To manage subscriptions or to opt out of all commercial email communications from Maplesoft, please click here<%25%25unsubscribe%25%25>.

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