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Machine Learning positions and PhD studentships available now
by Peter Bentley 31 Jul '17

31 Jul '17

FULL-TIME POSITIONS, PHD STUDENTSHIPS, & CONSULTANCY OPPORTUNITIES AT BRAINTREE LTD, LONDON, UK Braintree is looking to hire exceptional talent in machine learning immediately. The company encourages imaginative applicants who may wish a career in the development of innovative AI solutions. We have opportunities for: Data Scientists and Software Developers ======================================= You will join a dynamic team of developers and researchers who are leading the way in applied machine learning. You have the opportunity to tackle real problems and build systems in a range of domains, including: 1. retail (clustering/customer segmentation in large datasets) 2. fault prediction (large-scale multi variate analysis in time series data) 3. semantic networks of research papers (text/concept mining) 4. graph-native machine learning tools Essential qualifications and skills: + Degree in machine learning or related discipline (MSc and PhD preferred). + JAVA / C / Python to high standard + Quick learner + Good communication + Creative, independent, motivated, proactive + Experienced in machine learning Good to have experience in one or more of: + Statistical analysis of large datasets + Machine learning for big data + Neural networks, genetic algorithms, deep learning + Clustering (K-Means, SOM) + Natural language processing (Text mining) + Graph database (Neo4j) + Novel hardware, optimised architectures + User interface design Senior and junior positions available now. To apply, send your CV to p.bentley(a)cs.ucl.ac.uk or p.bentley(a)braintree.com, with Subject: Braintree Job Enquiry PhD Studentships ================ Braintree is offering full UK/EU funding for 3 PhD students in machine learning. Applicants should meet the entry requirements for UCL CS PhD programmes. Projects are available in the following areas: + graph-native machine learning + parallel architectures / optimised hardware for machine learning + analysis/visualisation of massive graphs + agent-based modelling + novel machine learning algorithm development + affective computing / social robots (other topics may be considered) Candidates must hold or expect to hold a UK first or upper second class honours degree, or equivalent qualification, in a discipline relevant to the project. Candidates will normally have relevant research experience gained through their Bachelor’s degree course, a Masters or work experience. At least two satisfactory academic or relevant work placement/employment references will be required. Students in receipt of a studentship offer will need to provide acceptable proof of legal right to study in the UK and satisfy the current requirements of UK Visa and Immigration. The offer of a Braintree studentship does not automatically confer an offer by UCL, whose application process must be followed in full. To apply, send your CV to p.bentley(a)cs.ucl.ac.uk or p.bentley(a)braintree.com, with Subject: Braintree PhD Studentship Enquiry Consultancy =========== Braintree needs expertise from world-class brains. If you are currently a PhD student, a postdoc researcher, or a member of academic staff, and you wish to have a side income by helping industry with their machine learning problems, Braintree will pay for your time as a consultant. If you can spare a couple of hours a week or a couple of days a month, you will also gain valuable real-world experience and make great contacts. Roles may optionally include travel to Europe, all expenses paid. We need consultants who have expertise in one or more of: + Machine learning for big data + Neural networks, genetic algorithms, deep learning + Natural language processing, Text Mining + Data architectures + Data Modelling for Graph databases (Neo4j) + Networking, server specification and setup + Large scale system architectures Applicants must be able to demonstrate expertise in their area with at least three recent publications in recognised international conferences or journals, and/or have more than 5 years work experience in a recognised centre of excellence. To apply, send your CV to p.bentley(a)cs.ucl.ac.uk or p.bentley(a)braintree.com, with Subject: Braintree Consultancy Enquiry ABOUT BRAINTREE LTD: ================== Braintree Ltd www.braintree.com <http://www.braintree.com/> is a Research and Development AI company based at 7 Gower St, London, UK (across the road from UCL). First created in 2002, it offers machine learning, optimisation, and analytics solutions to large multi-national organisations including governments, retailers, and the manufacturing industry. Since 2016, UCL researcher Peter Bentley has been CTO and Director of Braintree, bringing his UCL CS PhD students into the company, and forming close ties with UCL CS. Braintree has several contracts with industry and has just been awarded an Innovate UK grant to work with UCL CS on graph-based machine learning. The company has a culture of nurturing talent, encouraging personal growth, and allowing freedom for imaginative and creative problem-solvers. Come and join us!

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CFP: Special Issue on 'Software Defined Networking and Network Function Virtualization' in Scalable Computing and Communications (Springer)
by Javid Taheri 31 Jul '17

31 Jul '17

--------------------------------------------------------------------------------- Please accept our apologies if you receive multiple copies of this CFP --------------------------------------------------------------------------------- CALL FOR PAPERS Scalable Computing and Communications ~Special Issue Call for Papers~ Software Defined Networking and Network Function Virtualization IMPORTANT DATES: - Submission Deadline: 15 Dec 2017 - Notification of Acceptance: 31 March 2018 - Final Version: 31 May 2018 INTRODUCTION AND MOTIVATION With maturity of virtualization techniques, more and more services are to be run inside virtualized Data Centers vDCs) to further reduce Operational (OPEX) and Capital Expenditures (CAPEX). Aligned with the general trend of migrating traditional IT architectures to clouds (public or private), next generation of telecommunication networks such as 5G are also envisaged to be run on virtualized environments where network functions are deployed on virtual machines and/or containers instead of current proprietary equipment. Several proof-of-concept and initial industrial deployments proved that Software Defined Networking (SDN) and Network Function Virtualization (NFV) are two promising technologies to enable such technological shift. Nevertheless, how to optimize and guarantee the performance of such virtualized systems is still challenging, because they require accurate modelling and efficient optimization to satisfy ever increasing demand of future networks. To address several major issues raised by migrating network applications to virtualized infrastructures, this special issue aims to highlight challenges, state-of-the-art, and solutions to a set of currently unresolved key questions including, but not limited to: performance, modelling, optimizations, reliability, security, and techno-economic aspects of virtualized networks. By addressing these concerns, technology might be one step closer to understanding, and consequently, closing the gap between the performance of the next generation SDN/NFV-based networks and their current counterparts in proprietary boxes. In this special issue, we welcome contributions that can shed light onto any of the following questions: 1. How virtualized networks should be designed to guarantee the performance required by network operations? 2. How virtualized services can be benchmarked and/or compared? 3. How virtualized services should be designed and/or operated to take advantage of cloud infrastructures and further provide flexibilities (such as load migration) that current proprietary equipment cannot provide? 4. How network functions should be placed and/or network capacities should be sliced to optimize network critical metrics such as throughput, delay, jitter, etc.? 5. How virtualized services should/can be efficiently orchestrated, monitored, and managed? PAPER SUBMISSION: - Authors are encouraged to submit high-quality, original work that has neither appeared in, nor is under consideration by, other journals. - All papers will be reviewed following standard reviewing procedures for the Journal. - Papers must be prepared in accordance with the Journal guidelines: www.springer.com/41122 - Submit manuscripts to: http://SCAC.edmgr.com. Topics to be covered in this Special Issue are including, but not limited to: 1. Model, benchmark, and/or optimize operation of SDN/NFV-based networks and services. 2. Resource and/or content allocation for SDN/NFV-based networks and services. 3. Reliability and resiliency of SDN/NFV-based networks and services. 4. Dynamic/flexible construction and deployment of Service Function Chains using SDN/NFV technologies. 5. Fault detection and/or correction for SDN/NFV-based networks and services. 6. Architectures, applications, and use cases of SDN/NFV to provide networking services. 7. Monitoring techniques for SDN/NFV-based networks and services. 8. Deployment, management, and orchestration of SDN/NFV-based networks and services. 9. Business/economic aspects of SDN/NFV-based networks and services. 10. Security concerns of SDN/NFV-based networks and services. 11. Mobile and/or Wireless Networks enabled by SDN/NFV-based networks and services.

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CFP: 3rd Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC 2017) at SC17: Extended abstracts due Sept. 1
by Jason D. Bakos 29 Jul '17

29 Jul '17

========================================================================== ** Call for Papers ** ========================================================================== Third International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC 2017) Held in conjunction with Supercomputing 2017 Friday Morning, November 17, 2017 Denver, CO http://h2rc.cse.sc.edu ========================================================================== Submission Deadline: September 1, 2017 (one page extended abstracts) ========================================================================== As conventional von-Neumann architectures are suffering from rising power densities, we are facing an era with power, energy efficiency, and cooling as first-class constraints for scalable HPC. FPGAs can tailor the hardware to the application, avoiding overheads and achieving higher hardware efficiency than general-purpose architectures. Leading FPGA manufacturers have recently made a concerted effort to provide a range of higher-level, easier to use high-level programming models for FPGAs. Such initiatives are already stimulating new interest within the HPC community around the potential advantages of FPGAs over other architectures. With this in mind, this workshop, now in its third year, brings together HPC and heterogeneous-computing researchers to demonstrate and share experiences on legacy and new high-level programming models, optimizations specific to scientific computing and data analytics, tools for performance/energy improvements, FPGA computing in the cloud, and popular applications for reconfigurable computing such as machine learning and big data. ========================================================================== Submissions (one page extended abstract): Submissions are solicited that explore the state of the art in the use of FPGAs in heterogeneous high-performance computing architectures and, at a system level, in data centers and supercomputers. FPGAs may be considered from either or both the distributed, parallel and composable fabric of compute elements or from their dynamic reconfigurability. We particularly encourage submissions which focus on the mapping of algorithms and applications to heterogeneous FPGA-based systems as well as the overall impact of such architectures on the compute capacity, cost, power efficiency, and overall computational capabilities of data centers and supercomputers. Submissions may report on theoretical or applied research, implementation case studies, benchmarks, standards, or any other area that promises to make a significant contribution to our understanding of heterogeneous high-performance reconfigurable computing and will help to shape future research and implementations in this domain. A non-comprehensive list of potential topics of interest is given below: 1. FPGAs in Supercomputer, Cloud and Data Center: FPGAs in relation to challenges to Cloud/Data Center/Supercomputing posed by the end of Dennard scaling 2. Supercomputing, Cloud and Data Center Applications: Exploiting FPGA compute fabric to implement critical cloud/HPC applications 3. Leveraging Reconfigurability: Using reconfigurability for new approaches to algorithms used in cloud/HPC applications 4. Benchmarks: Compute performance and/or power and cost efficiency for cloud/HPC with heterogeneous architectures using FPGAs 5. Implementation Studies: Heterogenous Hardware and Management Infrastructure 6. Programming Languages/Runtimes/OS/Tools/Frameworks for Heterogeneous High Performance Reconfigurable Computing 7. Future-gazing: New Applications/The Cloud Enabled by Heterogeneous High Performance Reconfigurable Computing, Evolution of Computer Architecture in relation to Heterogeneous High Performance Reconfigurable Computing 8. Community building: Standards, consortium activity, open source, education, initiatives to enable and grow Heterogeneous High Performance Reconfigurable Computing Prospective authors are invited to submit original and unpublished contributions as a ONE PAGE EXTENDED ABSTRACT in ACM SIG Proceedings format. ========================================================================== You can submit your contribution(s) through a link on the H2RC website: http://h2rc.cse.sc.edu ========================================================================== Important dates: Submission Deadline: September 1, 2017 Acceptance Notification: October 15, 2017 Camera-ready Manuscripts Due: November 4, 2017 Workshop Date: November 17, 2017 ========================================================================== Workshop Format: H2RC is a half-day Friday workshop. It will be comprised of Keynote and invited talks and talks selected from paper submissions. ========================================================================== Organizing Committee: Workshop Organizers: Michaela Blott, Xilinx Franck Cappello, Argonne National Lab Torsten Hoefler, ETH Zurich Jason D. Bakos, University of South Carolina Program Committee: Rizwan Ashraf, Oak Ridge National Laboratory Paul Chow, University of Toronto Carl Ebeling, Altera Hans Eberle, NVIDIA Alan George, University of Florida Christoph Hagleitner, IBM Miriam Leeser, Northeastern University Viktor Prasanna, Univ. of Southern California Marco Santambrogio, Politecnico Di Milano Jeffrey Vetter, Oak Ridge National Lab -- Jason D. Bakos, Ph.D. Professor Dept. of Computer Science and Engineering Univ. of South Carolina 301 Main St., Suite 3A01L Columbia, SC 29208 803-777-8627 (voice), 803-777-3767 (fax) http://www.cse.sc.edu/~jbakos jbakos(a)cse.sc.edu

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[Deadline extended to Aug. 13] - CFP: 12th Workflows in Support of Large-Scale Science (WORKS) Workshop
by Ilia Pietri 28 Jul '17

28 Jul '17

********** WORKS 2017 Workshop ********** Workflows in Support of Large-Scale Science Workshop http://works.cs.cardiff.ac.uk/ Monday 13 November 2017, Denver, Colorado, USA. Held in conjunction with SC17, http://sc17.supercomputing.org/ Paper submission deadline: 13 August 2017 ***************************************** Call For Papers Data-intensive workflows (a.k.a. scientific workflows) are routinely used in most scientific disciplines today, especially in the context of high-performance, parallel and distributed computing. They provide a systematic way of describing a complex scientific process and rely on sophisticated workflow management systems to execute on a variety of parallel and distributed resources. With the dramatic increase of raw data volume in every domain, they play an even more critical role to assist scientists in organizing and processing their data and to leverage HPC or HTC resources, being at the interface between end-users and computing infrastructures. This workshop focuses on the many facets of data-intensive workflow management systems, ranging from actual execution to service management and the coordination and optimization of data, service and job dependencies. The workshop covers a broad range of issues in the scientific workflow lifecycle that include: data-intensive workflows representation and enactment; designing workflow composition interfaces; workflow mapping techniques to optimize the execution of the workflow for different infrastructures; workflow enactment engines that need to deal with failures in the application and execution environment; and a number of computer science problems related to scientific workflows such as semantic technologies, compiler methods, scheduling and fault detection and tolerance. The topics of the workshop include but are not limited to: Big Data analytics workflows Data-driven workflow processing (including stream-based workflows) Workflow composition, tools, and languages Workflow execution in distributed environments (including HPC, clouds, and grids) Reproducible computational research using workflows Dynamic data dependent workflow systems solutions Exascale computing with workflows Workflow fault-tolerance and recovery techniques Workflow user environments, including portals Workflow applications and their requirements Adaptive workflows Workflow optimizations (including scheduling and energy efficiency) Performance analysis of workflows Workflow debugging Workflow provenance Interactive workflows (including workflow steering) ***************************************** Important Dates Papers Due: 13 August 2017 (EXTENDED) Notifications of Acceptance: 9 September 2017 E-copyright registration completed by authors: 1 October 2017 Final Papers Due: 1 October 2017 Submitted papers must be at most 10 pages long. The proceedings should be formatted according to http://www.acm.org/publications/proceedings-template. WORKS papers will be published in collaboration with SIGHPC and will be available from both ACM and IEEE digital repositories. ***************************************** WORKS 2017 Organizing Committee – PC Chairs Sandra Gesing, University of Notre Dame, USA Rizos Sakellariou, University of Manchester, UK – General Chairs Johan Montagnat, CNRS, Sophia Antipolis, France Ian Taylor, Cardiff University, UK and University of Notre Dame, USA – Steering Committee David Abramson, University of Queensland, Australia Malcolm Atkinson, University of Edinburgh, UK Ewa Deelman, University of Southern California, USA Michela Taufer, University of Delaware, USA – Publicity Chairs Rafael Ferreira da Silva, USC, USA Ilia Pietri, University of Athens, Greece ***************************************** WORKS 2017 Program Committee Pinar Alper, King's College London, UK Ilkay Altintas, San Diego Supercomputer Center, USA Khalid Belhajjame, Université Paris-Dauphine, France Adam Belloum, University of Amsterdam, the Netherlands Ivona Brandic, TU Wien, Austria Kris Bubendorfer, Victoria University of Wellington, New Zealand Jesus Carretero, Universidad Carlos III de Madrid, Spain Henri Casanova, University of Hawaii at Manoa, USA Ewa Deelman, USC Information Sciences Institute, USA Rafael Ferreira Da Silva, USC Information Sciences Institute, USA Daniel Garijo, USC Information Sciences Institute, USA Sandra Gesing, University of Notre Dame, USA Tristan Glatard, CNRS, France Daniel Katz, University of Illinois Urbana-Champaign, USA Tamas Kiss, University of Westminster, UK Dagmar Krefting, HTW Berlin, Germany Maciej Malawski, AGH University of Science and Technology, Poland Anirban Mandal, Renaissance Computing Institute, USA Marta Mattoso, Federal Univ. Rio de Janeiro, Brazil Andrew Stephen Mcgough, Newcastle University, UK Paolo Missier, Newcastle University, UK Jarek Nabrzyski, University of Notre Dame, USA Daniel de Oliveira, Fluminense Federal University, Brazil Ilia Pietri, University of Athens, Greece Radu Prodan, University of Innsbruck, Austria Omer Rana, Cardiff University, UK Ivan Rodero, Rutgers University, USA Rizos Sakellariou, University of Manchester, UK Domenico Talia, University of Calabria, Italy Rafael Tolosana-Calasanz, Universidad de Zaragoza, Spain Chase Wu, New Jersey Institute of Technology, USA

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Special issue on Optimisation Solutions in Systems
by Fernando Rubio 25 Jul '17

25 Jul '17

*CALL FOR PAPERS * *http://antares.sip.ucm.es/~fernando/jsit/cfp.htm <http://antares.sip.ucm.es/~fernando/jsit/cfp.htm>* *A Special Issue of the Journal of Systems and Information Technology on Optimisation Solutions in Systems* *Aims and Scope* Optimisation is a major necessity in Science and Engineering. No matter if we want to reduce the amount of needed resources to perform a task or maximize the output of some process, so often the difficulty of making the right decisions can be rephrased as some kind of optimisation problems. Unfortunately, for many optimisation problems finding the optimal solution is not feasible in general due to the hardness of the problem —moreover, for some of them we cannot even guarantee any constant ratio between the quality of the optimal solution and the quality of any solution found in reasonable time. Despite these disheartening theoretical limits, optimisation problems appear whenever there is a sophisticated system, so we do have to face them by some means —necessarily non-exhaustive methods. Some of these methods are specific to the problem under consideration, whereas others are adaptations of general optimization heuristics (metaheuristics) to the studied problem. Typically, the latter search for solutions similar to the most promising observed ones, or their combinations, for example by making some simple entities interact with each other according to simple rules and collaboratively construct new solutions. Within this category we can find evolutionary computation methods and swarm optimization methods, which are sometimes inspired by some natural process. Regardless of the method selected to tackle a hard optimization problem, the difficulty of the problem and the performance of the best known heuristics for the problem may have a high impact on the application field the problem belongs to, since the difficulty of a scientific or engineering process can be, to some extent, due to the computational difficulty of the underlying optimization problem it implicitly poses. The goal of this special issue is to introduce new research, or comprehensive compilations of existing ones, on optimisation techniques for engineering systems, and their applications. *We solicit contributions related, but not limited to the following topics:* · New optimisation algorithms and metaheuristics, enhancement of existing ones · Problem-specific and generic optimisation methods · Comparison of optimisation algorithms and metaheuristics · Nature inspired metaheuristics, evolutionary computation, swarm intelligence · Classification and generalization of metaheuristics, hybridisation of methods · Optimisation problems on real data, case studies · Benchmark usage and generation · Optimisation hardness, complexity of problems and optimisation algorithms · Impact of the optimisation difficulty on Social Sciences, Natural Sciences and Engineering · Comprehensive compilations of the state of art on any aspect of optimisation We encourage submissions from both academics and practitioners. *Submission Procedure* Full papers should be submitted to: *http://mc.manuscriptcentral.com/jsit* <http://mc.manuscriptcentral.com/jsit> (all manuscripts should follow the submission guidelines available at http://emeraldgrouppublishing. com/products/journals/author_guidelines.htm?id=jsit You must first create an author account in the system if you do not have one. Once registered, you will see the Author Centre button when you sign in to your account. Click on the ‘click here to submit a new manuscript’ link, which will take you through to the Manuscript Submission page. Follow the instructions to complete all fields and browse to upload your manuscript. At the ‘please select the issue you are submitting to’ dropdown list (under Details & Comments) please choose *“Special Issue on Optimisation Solutions in Systems”*. *Important dates:* · Please submit papers on or before October 1st 2017. All submissions will be peer-reviewed following the review process of the Journal of Systems and Information Technology. (Prospective authors are encouraged to indicate their interests any time before the submission deadline. Please, contact fernando(a)sip.ucm.es) · Notification of results: December 15th 2017. · Final submission: January 31st 2018. · The special issue will be published in June 2018 Special Issue Guest Editors: Dr. Pablo Rabanal, Facultad de Informática, Universidad Complutense de Madrid, Spain Dr. Ismael Rodríguez, Facultad de Informática, Universidad Complutense de Madrid, Spain Dr. Fernando Rubio, Facultad de Informática, Universidad Complutense de Madrid, Spain

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Call For Papers [Best Paper Award, Keynote Speaker and Panel]: ESPM2@SC17 - Third International Workshop on Extreme Scale Programming Models and Middleware
by Hari Subramoni 24 Jul '17

24 Jul '17

======================================================================== Call For Papers Third International IEEE Workshop on Extreme Scale Programming Models and Middleware (ESPM2 2017) November 12, 2017, Denver, Colorado to be held in conjunction with SuperComputing 2017, November 12 - 16, 2017 Denver, Colorado http://nowlab.cse.ohio-state.edu/espm2/ ======================================================================== Next generation architectures and systems being deployed are characterized by high concurrency, low memory per-core, and multiple levels of hierarchy and heterogeneity. These characteristics bring out new challenges in energy efficiency, fault-tolerance and, scalability. It is commonly believed that software has the biggest share of the responsibility to tackle these challenges. In other words, this responsibility is delegated to the next generation programming models and their associated middleware/runtimes. This workshop focuses on different aspects of programming models such as task-based parallelism (Charm++, OCR, Habanero, Legion, X10, HPX, etc), PGAS (OpenSHMEM, UPC, CAF, Chapel, UPC++, etc.), BigData (Hadoop, Spark, etc), Deep Learning (Caffe, Microsoft CNTK, Google TensorFlow), directive-based languages (OpenMP, OpenACC) and Hybrid MPI+X, etc. It also focuses on their associated middleware (unified runtimes, interoperability for hybrid programming, tight integration of MPI+X, and support for accelerators) for next generation systems and architectures. The ultimate objective of the ESPM2 workshop is to serve as a forum that brings together researchers from academia and industry working in the areas of programming models, runtime systems, compilers, programming languages, and application developers. ESPM2 2017 will be held as a full day workshop in conjunction with the SuperComputing (SC 2017), Denver, Colorado, USA, Sunday, November 12th, 2017. Topics ------ ESPM2 2017 welcomes original submissions in a range of areas, including but not limited to: * New programming models, languages and constructs for exploiting high concurrency and heterogeneity * Experience with and improvements for existing parallel languages and run-time environments such as: - MPI - PGAS (OpenSHMEM, UPC, CAF, Chapel, UPC++, etc.) - Directive-based programming (OpenMP, OpenACC) - Asynchronous Task-based models (Charm++, OCR, Habanero, Legion, X10, HPX, etc) - Hybrid MPI+X models - BigData (Hadoop, Spark, etc), and - Deep Learning (Caffe, Microsoft CNTK, Google TensorFlow) * Parallel compilers, programming tools, and environments * Software and system support for extreme scalability including fault tolerance * Programming environments for heterogeneous multi-core systems and accelerators such as KNL, OpenPOWER, ARM, GPUs, FPGAs, MICs, and DSPs Papers should present original research and should provide sufficient background material to make them accessible to the broader community. Best Paper Award ---------------- Intel has generously offered to sponsor the Best Paper Award. This award will be given to the author(s) of the paper selected by the Technical Program Committee and the Program Chairs. The award will be determined from viewpoints of the technical and scientific merits, impact on the science and engineering of the research work and the clarity of presentation of the research contents in the paper. Keynote Speakers ---------------- We are happy to announce that Prof. William D. Gropp, Interim Director and Chief Scientist at the National Center for Supercomputing Applications and the Thomas M. Siebel Chair in Computer Science at the University of Illinois Urbana-Champaign will deliver the keynote address at ESPM2'17. Panel Information ----------------- Panel Topic : Effective Programming Models for Deep Learning at Scale Panel Moderator : Daniel Holmes, EPCC, The University of Edinburgh, UK. Panel Members : Coming soon! Paper Submission and Registration --------------------------------- Abstracts and papers need to be submitted via the EasyChair conference system. EasyChair URL for ESPM2'17: https://easychair.org/conferences/?conf=espm22017 Submissions should not exceed 8 pages using ACM format with 10pt font. Each submission must be a single PDF file. Papers must be submitted in PDF format (readable by Adobe Acrobat Reader 5.0 and higher) and formatted for 8.5" x 11" (U.S. Letter). The manuscript should be formatted according to ACM format (see http://www.acm.org/sigs/publications/proceedings-templates) Papers should present original research and should provide sufficient background material to make them accessible to the broader community. It should not be submitted in parallel to any other conference or journal. At least one of the authors of each accepted paper must register as a participant of the workshop and present the paper at the workshop, in order to have the paper published in the proceedings. Each research paper will be taken through a comprehensive peer review process by an internationally recognized group of experts in the field. Papers will be evaluated along the metrics of a) Quality of Presentation; b) Novelty / Originality; c) Relation to State of the Art; d) Technical Strength; e) Significance of Work; and f) Relevance to Workshop. Every effort will be made to ensure that each paper receives multiple reviews. Please contact the Program Chairs for any questions/clarifications Proceedings Information ----------------------- ACM SigHPC will publish the workshop proceedings which will be available through the ACM Digital Library. The camera-ready versions need to be submitted via the EasyChair conference management system. The link to the submission site will be provided soon. Please contact the Program Chairs for any questions/clarifications. Important Dates --------------- Technical paper submission deadline : 11:59 PM, AoE, August 31, 2017 Author notification : October 1, 2017 Camera-ready deadline : 11:59 PM, AoE, October 7, 2017 Workshop : Sunday, November 12, 2017 ESPM2'17 Workshop Organizers ------------------------------ Hari Subramoni, The Ohio State University Karl Schulz, Intel Corporation Dhabaleswar K. (DK) Panda, The Ohio State University Program Committee ----------------- * Guang R. Gao, University of Delaware * Vladimir Getov, University of Westminster, UK * Jeff Hammond, Intel Labs * Michael A. Heroux, Sandia National Laboratories * Costin Iancu, Lawrence Berkeley National Laboratory * Darren Kerbyson, Pacific Northwest National Laboratory * Guangming Tan, Institute of Computing Technology, Chinese Academy of Sciences, China * Olivier Tardieu, IBM T.J. Watson Research Center * Daniel Tian, The Portland Group * Sean Treichler, NVIDIA Corporation * Abhinav Vishnu, Pacific Northwest National Laboratory Further Information ------------------- See the ESPM2'17 website at http://nowlab.cse.ohio-state.edu/espm2/ Thanks, The ESPM2'17 Organizing Committee.

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[CFP] IA^3 2017 - Seventh SC Workshop on Irregular Applications: Architectures and Algorithms
by Tumeo, Antonino 24 Jul '17

24 Jul '17

[Apologies if you receive multiple copies of this CFP] IA^3 2017 Seventh Workshop on Irregular Applications: Architectures and Algorithms http://hpc.pnl.gov/IA3/ November 13, 2017 In conjunction with SC17 In collaboration with ACM SIGHPC Sponsored by IEEE TCHPC Call for Papers Irregular applications occur in many subject matters. While inherently parallel, they exhibit highly variable execution performance at a local level due to unpredictable memory access patterns and/or network transfers, divergent control structures, and data imbalances. Moreover, they often require fine-grain synchronization and communication on large-data structures such as graphs, trees, unstructured grids, tables, sparse matrices, deep nets, and their combinations (such as, for example, attributed graphs). They have a significant degree of latent parallelism, which however is difficult to exploit due to their complex behavior. Current high performance architectures rely on data locality and regular computation to reduce access latencies, and often do not cope well with the requirements of these applications. Furthermore, irregular applications are difficult to scale on current supercomputing machines, due to their limits in fine-grained synchronization and small data transfers. Irregular applications pertain both to well established and emerging fields, such as machine learning, social network analysis, bioinformatics, semantic graph databases, Computer Aided Design (CAD), and computer security. Many of these application areas also process massive sets of unstructured data, which keep growing exponentially. Addressing the issues of irregular applications on current and future architectures will become critical to solve the challenges in science and data analysis of the next few years. This workshop seeks to explore solutions for supporting efficient execution of irregular applications in the form of new features at the level of the micro- and system-architecture, network, languages and libraries, runtimes, compilers, analysis, algorithms. Topics of interest, of both theoretical and practical significance, include but are not limited to: * Micro- and System-architectures, including multi- and many-core designs, heterogeneous processors, accelerators (GPUs, vector processors, Automata processor), reconfigurable (coarse grained reconfigurable and FPGA designs) and custom processors * Network architectures and interconnect (including high-radix networks, optical interconnects) * Novel memory architectures and designs (including processors-in memory) * Impact of new computing paradigms on irregular workloads (including neuromorphic processors and quantum computing) * Modeling, simulation and evaluation of novel architectures with irregular workloads * Innovative algorithmic techniques * Combinatorial algorithms (graph algorithms, sparse linear algebra, etc.) * Impact of irregularity on machine learning approaches * Parallelization techniques and data structures for irregular workloads * Data structures combining regular and irregular computations (e.g., attributed graphs) * Approaches for managing massive unstructured datasets (including streaming data) * Languages and programming models for irregular workloads * Library and runtime support for irregular workloads * Compiler and analysis techniques for irregular workloads * High performance data analytics applications, including graph databases Besides regular papers, papers describing work-in-progress or incomplete but sound, innovative ideas related to the workshop theme are also encouraged. We solicit both 8-page regular papers and 4-page position papers. Authors of exciting but not mature enough regular papers may be offered the option of a short 4-page paper and related short presentation. Artifact Evaluation For this edition of IA3, authors of accepted regular papers will be invited to formally submit their supporting materials to the Artifact Evaluation process, similarly to the process followed for SC17. The participation to the Artifact Evaluation process is voluntary and will not change decisions regarding the paper. However, papers that undergo the evaluation process will receive a seal of approval on the paper, and will be able to participate in the BEST PAPER AWARD selection. DIVIDITI will provide an Amazon Gift Voucher (valued $200) to the authors of the paper that passes artifact evaluation with the highest score and that shares the artifact in the CK (Collective Knowledge - https://github.com/ctuning/ck) format. Authors that go through the Artifact Evaluation process are also encouraged (but not mandated) to submit the supporting materials as “Source Materials” in the digital library. For details on how to submit supporting materials to the Artifact Evaluation process, please refer to: http://ctuning.org/ae/submission.html. For any additional question on the Artifact Evaluation process please contact the Artifact Evaluation Chair Flavio Vella. Important Dates Abstract submission: 22 August 2017 Position or full paper submission: 29 August 2017 Notification of acceptance: 3 October 2017 Camera-ready position and full papers: 10 October 2017 Workshop: 13 November 2017 Submissions Submission site: https://easychair.org/conferences/?conf=ia32017 All submissions should be in double-column, single-spaced letter format, with at least one-inch margins on each side and respect the ACM standard proceedings templates (sigconf) available at: https://www.acm.org/publications/proceedings-template. The proceedings of the workshop will be published in cooperation with ACM SIGHPC. Submitted manuscripts may not exceed eight (8) pages in length for regular papers and four(4) pages for position papers including figures, tables and references. Organizers Antonino Tumeo, PNNL, US John Feo, PNNL/NIAC, US, Vito Giovanni Castellana, PNNL, US Artifact Evaluation Chair Flavio Vella, DIVIDITI, UK Publication Chair Marco Minutoli, PNNL, US Program Committee Scott Beamer, LBNL, US Michela Becchi, North Carolina State University, US Erik Boman, Sandia National Laboratories, US David Brooks, Harvard University, US Aydin Buluc, LBNL, US Sunita Chandrasekaran, University of Delaware, US Fabio Checconi, IBM, US Rajiv Gupta, Univerisity of California Riverside, US Maya Gokhale, LLNL, US Peter Kogge, Univ. of Notre Dame, US Vivek Kumar, Rice University, US John Leidel, Texas Tech University, US Kamesh Madduri, Pennsylvania State University, US Naoya Maruyama, RIKEN AICS, JP Tim Mattson, Intel, US Miquel Moreto, BSC and UPC, SP Richard Murphy, Micron Technology Inc, US Walid Najjar, University of California Riverside, US Maxim Naumov, NVIDIA, US Jacob Nelson, University of Washington, US Sreepathi Pai, University of Rochester, US Roger Pearce, LLNL, US Miquel Pericas, Chalmers University, SE Viktor Prasanna, University Of Southern California, US Alejandro Rico, ARM, US Jason Riedy, Georgia Institute of Technology, US Erik Saule, University of North Carolina at Charlotte, US John Shalf, LBNL, US Shaden Smith, University of Minnesota, US Bora Ucar, CNRS and LIP ENS Lyon, FR Ruud Van Der Pas, Oracle, US Flavio Vella, DIVIDITI, UK Ana Lucia Varbanescu, University of Amsterdam, NL

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IEEE SC2 2017 Submission Deadline - August 10, 2017
by Robert Hsu 24 Jul '17

24 Jul '17

IEEE SC2 2017, The 7th IEEE International Symposium on Cloud and Service Computing Kanazawa, Japan, November 22-25, 2017 http://grid.chu.edu.tw/iov2017 Dear Colleagues: We cordially invite you to share your latest research results at the 2017 IEEE SC2 Conference. --------------------------- CALL FOR PAPERS --------------------------- The “Cloud” is a natural evolution of distributed computing and the widespread adaption of virtualization and SOA. Services computing is a new cross-discipline subject that covers the science and technology needed to bridge the gap between business services and IT services. In cloud computing, IT-related capabilities and resources are provided as services, via the Internet and on-demand, accessible without requiring detailed knowledge of the underlying technology. SC2 2017 is an important forum for researchers and industry practitioners to exchange information regarding advancements in the state of art and practice of IT-driven cloud computing technologies and services, as well as to identify emerging research topics and define the future directions of cloud and services computing. IEEE SC2 2017 will be held on Nov. 22-25, 2017 in Kanazawa, Japan. Topics of interest include, but are not limited to: - Cloud architecture - Cloud OS, middleware, and toolkits - Storage architecture - Big data infrastructure, systems, methodologies, and applications - Virtualization techniques - Resource provision, monitoring, and scheduling - Privacy and access control for cloud computing - Performance evaluation and modeling measurement for cloud computing - Programming models for building cloud applications - Networking in cloud computing - Security, privacy and trustworthy in clouds - Security, privacy and trustworthy for service oriented architectures and systems - Energy efficient hardware and software solutions - High availability and reliability - Large scale cloud applications - Internet/web computing and data mining - Volunteer and utility computing - Green and pervasive computing - Service oriented architecture - Discovery of services and data in cloud computing infrastructures - Foundations of services computing - Services-centric business models - Business process integration and management --------------------------------------- PUBLICATION HIGHLIGHTS --------------------------------------- IEEE CS proceedings, indexed by - IEEE Xplore - Scopus - Compendex EI - ACM Digital Library - DBLP - Google Scholar Extended version of the selected papers will be invited for publication in prestigious international journals. Cluster Computing (Springer) Journal of Supercomputing (Springer) Vehicular Communications Journal International Journal of Big Data Intelligence International Journal of Grid and High-Performance Computing Journal of Foundations of Computing and Decision Sciences International Journal of Applied Mathematics and Computer Science IEEE Transactions on Emerging Topics in Computing IET Intelligent Transport Systems ---------------------------- IMPORTANT DATES ---------------------------- Research Track: Submission 8/10 Notification 9/10 Poster / Special Session Submission 9/17 Notification 9/24 Registration Due 10/5 Camera ready 10/5 --------------------------------------------- SUBMISSION and PUBLICATION --------------------------------------------- Papers need to be prepared according to the IEEE format, and submitted in PDF format via the IEEE SC2 2017 submission site: https://easychair.org/conferences/?conf=sc22017 IEEE formatting information: http://www.ieee.org/conferences_events/conferences/publishing/templates.html ------------------------------- Organizing Committees ------------------------------- General Chairs Keqin Li, State University of New York at New Paltz, USA Ren-Hung Hwang, National Chung Cheng University, Taiwan Christophe Cerin, Université Paris 13, France General Executive Chairs Tokuro Matsuo, Advanced Institute of Industrial Technology, Japan Robert Hsu, Chung Hua University, Taiwan Program Chairs Amir H. Alavi, Michigan State University, USA Yue-Shan Chang, National Taipei University, Taiwan Workshop Chairs Chia-Hung Yeh, National Sun Yat-sen University, Taiwan Alex Kuo, University of Victoria, Canada Demo/Poster Chair Carson Leung, University of Manitoba, Canada Special Session Chair Kuan-Chou Lai, National Taichung University, Taiwan Award Chair Ce-Kuen Shieh, National Cheng Kung University, Taiwan International Liaison & Publicity Chair Yu Chen, Binghamton University, USA Bingsheng He, National University of Singapore, Singapore Jun Li, University of Sydney, Australia Bingwei Liu, Aetna Inc., USA Koji Nakano, Hiroshima University, Japan Yan Zhang, University of Oslo, Norway Li-Hsin Yen, National Chiao Tung Univ. Taiwan Rynson Lau, City Univ. of Hong Kong, Hong Kong Publication Chair Wen-Hwa Liao, Tatung University, Taiwan Saeid Abolfazli, YTL Communications and Xchanging, Malaysia Advisory Committee Robert Hsu, Chung Hua University, Taiwan Rajkumar Buyya, University of Melbourne, Australia H.J. Siegel, Colorado State University, USA Chung-Ta King, National Tsing Hua University, Taiwan Hamid R. Arabnia, The University of Georgia, USA Lizhe Wang, Chinese Academy of Sciences, China Hung-Chang Hsiao, National Tsing Hua University, Taiwan Anna Kobusinska, Poznan University of Technology, Poland Hui Lei, IBM, USA Kwei-Jay Lin, University of California Irvine, USA Philip Yu, University of Illinois at Chicago, USA Please visit the IEEE SC2 2016 website http://grid.chu.edu.tw/sc2-2017/tpc.php for the complete listing of organizing committee and TPC members.

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Call for Papers: IEEE HiPC 2017 workshops
by Anand Panangadan 21 Jul '17

21 Jul '17

24th IEEE International Conference on High Performance Computing, Data, and Analytics HiPC 2017 December 18-21, 2017 Jaipur, India http://www.hipc.org The 24th annual IEEE International Conference on High Performance Computing, Data and Analytics (HiPC 2017) will be held at the Le Meridian, Jaipur, India. Complementing the main technical program, HiPC workshops serve to broaden the technical scope of the conference in emerging areas of high performance computing, communication, data and analytics and their applications. Below is the listing of the four workshops to be held on the first day of the conference, December 18. • International Workshop on Foundations of Big Data Computing (BigDF) • Third Workshop on Computational Fluid Dynamics (CFD) • Dynamic Data Driven Smart Systems (DDDSS) • Second International Workshop on Software Composable Infrastructure (SCI) See details at http://hipc.org/workshops for workshop paper submission deadlines and formatting requirements. WORKSHOPS CO-CHAIRS Manish Parashar, Rutgers University, USA Chiranjib Sur, Shell, India HiPC 2017 is co-sponsored by •IEEE Computer Society Technical Committee on Parallel Processing (TCPP) •HiPC Education Trust, India In cooperation with •ACM Special Interest Group on Algorithms and Computation Theory (SIGACT) •ACM Special Interest Group on Computer Architecture (SIGARCH) •FIP Working Group on Concurrent Systems •Manufacturers' Association for Information Technology (MAIT) •National Association of Software and Service Companies (NASSCOM) ------------------------------------------------------------------------------------------------ Follow us on Twitter https://twitter.com/hipcconf Google+ https://plus.google.com/+HipcOrg Facebook https://www.facebook.com/hipc.conference/ ------------------------------------------------------------------------------------------------

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Final Call: IEEE Workshop on Quantum Communications and Information Technology (QCIT’17)
by Peter Mueller 21 Jul '17

21 Jul '17

Third Workshop on Quantum Communications and Information Technology (QCIT’17) ----------------------------------------------------------- Review manuscript due date: July 23. 2017 ========================================= http://qcit.committees.comsoc.org/qcit17-workshop/ At IEEE Globecom’17, Singapore, 4-8 December 2017 http://globecom2017.ieee-globecom.org The scope of this dedicated workshop is to explore the opportunities for application of communications theory and technologies to quantum technology and its applications. The workshop is the annual main event of ComSoc’s Emerging Technical Committee on Quantum Communications and Information Technology (ETC-QCIT). Over the last decade, a wide variety of experimental quantum communications and processing devices has been invented and used for fundamental demonstrations in laboratories. Results confirm feasibility of real applications in quantum communications and information related fields. Recently one can observe upcoming applications in areas like a quantum communications, quantum sensors and random number generators which are partially even commercially available. Companies and governments started to spend significant amounts of funding in research and development of quantum technologies. However, the step from quantum technology based devices to real systems running a communications or information processing task has not completed yet. Moreover, many problems show opportunities to contribute with knowhow, technologies and engineering out of the communications area. The following topics are crucial to the development of future quantum technology based systems: - Algorithms and applications complexity - Analysis of classical vs quantum software - Coding theory - Coherent routers, repeaters and converters - Communications and information theory - Devices and circuits - Entanglement distillation - Error correction - Experimental results and demonstrations - Interconnection and complexity theory - Metrology for quantum systems - Modeling and simulation - Network coding - Photonic communications technology - Processing and systems architecture - Quantum electro-dynamics - Quantum information theory - Quantum key distribution - Quantum sensors - Quantum-algorithms and applications - Remote state preparation - RF based programming and algorithms - RF technology and control - Signal processing for quantum control It is the aim of this workshop to connect people from academia and industry to discuss about theory, technology and applications and exchange ideas to move efficiently forward in research, engineering and development of this exciting area. Submission info for camera-ready manuscripts -------------------------------------------- Original and unpublished regular papers are solicited from the above-mentioned areas. Regular papers have a length of 4 to 6 pages with an optional payable 7th page. All manuscripts will be peer reviewed and published in the workshop proceedings and after presentation in IEEE Xplore. Templates for the manuscripts can be downloaded from: http://www.ieee.org/conferences_events/conferences/publishing/templates.html The formatted manuscript should be electronically submitted as pdf via EDAS: https://edas.info/newPaper.php?c=23835 Further information is available in the Globecom 2017 webpages: http://globecom2017.ieee-globecom.org Important dates --------------- Manuscript submission due date: 23. July, 2017 (extended) Notification date: 1. September, 2017 Final manuscript due date: 1. October, 2017 Conference date: 4.-8. December, 2017 Workshop organizers ------------------- Andrea Conti, University of Ferrara, Italy, a.conti(a)ieee.org Lajos Hanzo, University of Southampton, United Kingdom, lh(a)ecs.soton.ac.uk Peter Mueller, IBM Research Zurich Laboratory, Switzerland, pmu(a)zurich.ibm.com Michael Ng, University of Southampton, United Kingdom, sxn(a)ecs.soton.ac.uk

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