computational.science July 2023

computational.science@lists.iccsa.org

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CFP: IEEE HPCC2023 (High Performance Computing and Communications), Dec. 2023
by Jesson Butt 30 Jul '23

30 Jul '23

Call for papers: The 25th IEEE International Conference on High Performance Computing and Communications (HPCC 2023), 13-15 Dec. 2023, Melbourne, Australia. Website: http://www.swinflow.org/confs/2023/hpcc/ Key dates: Submission Deadline: August 25, 2023 Notification: October 15, 2023 Final Manuscript Due: October 30, 2023 Submission site: http://www.swinflow.org/confs/2023/hpcc/submission.htm Publication: Proceedings will be published by IEEE CS Press. Distinguished papers will be invited to special issues of selected journals listed on the conference website. =========== Introduction With the rapid growth in computing and communications technology, the past decade has witnessed a proliferation of powerful parallel and distributed systems and an ever increasing demand for practice of high performance computing and communications (HPCC). HPCC has moved into the mainstream of computing and has become a key technology in determining future research and development activities in many academic and industrial branches, especially when the solution of large and complex problems must cope with very tight timing schedules. Among a series of highly successful International Conferences on High Performance Computing and Communications (HPCC), HPCC conference comes to its 25th edition of a forum for engineers and scientists in academia, industry, and government to address the resulting profound challenges and to present and discuss their new ideas, research results, applications and experience on all aspects of high performance computing and communications. IEEE HPCC is sponsored by IEEE, IEEE Computer Society, and IEEE Technical Committee on Scalable Computing (TCSC). Scope and Topics Topics of particular interest include, but are not limited to: Track 1: High Performance Computing and Applications - High Performance Computing Theory - High Performance Computing Architectures - System Software and Middleware - System Software Support for Scientific Workflows - Storage and I/O Systems - Resource Management - Instruction-Level and Thread-Level Parallelism - Performance Modeling and Evaluation - Massively Multicore Systems - Future Novel Computing Platforms - Database Applications and Data Mining - High Performance Computing for Bioinformatics - High Performance Computing for Big Data - High Performance Computing for AI - High Performance Computing for Block Chains - Green High Performance Computing Track 2: Parallel and Distributed Computing and Systems - Parallel and Distributed System Architectures - Parallel and Distributed Algorithms - Data Center Architectures - Resource Virtualization - Web Services and Internet Computing - Cloud, Edge, and Cluster Computing - Sustainable and Energy Efficient Computing - Federated Learning - Embedded Systems - Distributed Systems and Applications - Pervasive/Ubiquitous Computing & Intelligence - Distributed Graphics and VR/AR/MR Systems - Distributed AI and Soft/Natural Computing - Power-Efficient and Green Computing Systems - Parallel and Distributed Computing for Big Data - Parallel and Distributed Computing for AI Track 3: Communications and Networking - Network and Interconnect Architectures - Computer Networks - Internet Architectures and Protocols - Telecommunications - Trust, Security, and Privacy - Energy-Aware Computing and Networking - 5G Network - Software Defined Networking - Network Functions Virtualization - Machine Learning and Deep Learning - Social Networking and Computing - Performance Evaluation and Measurement Submission Guidelines Submissions must include an abstract, keywords, the e-mail address of the corresponding author and should not exceed 8 pages for main conference, including tables and figures in IEEE CS format. The template files for LATEX or WORD can be downloaded here. All paper. submissions must represent original and unpublished work. Each submission will be peer reviewed by at least three program committee members. Submission of a paper should be regarded as an undertaking that, should the paper be accepted, at least one of the authors will register for the conference and present the work. Submit your paper(s) in PDF file at the submission site: http://www.swinflow.org/confs/2023/hpcc/submission.htm. Publications Accepted and presented papers will be included into the IEEE Conference Proceedings published by IEEE CS Press. Authors of accepted papers, or at least one of them, are requested to register and present their work at the conference, otherwise their papers may be removed from the digital libraries of IEEE CS and EI after the conference. Distinguished papers will be invited to special issues of selected journals listed on the conference website. General Chairs Xian-He Sun, Illinois Institute of Technology, USA Beniamino Di Martino, Universita' della Campania "Luigi Vanvitelli", Italy Laurence T. Yang, St. Francis Xavier University, Canada Program Chairs Muneeb Hassan, Deakin University, Australia Carson Leung, University of Manitoba, Canada

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(CALL FOR PAPERS) PAW-ATM: Parallel Applications Workshop, Alternatives To MPI+X
by Morris, Karla NMN 19 Jul '23

19 Jul '23

Call for Papers PAW-ATM 2023: Parallel Applications Workshop, Alternatives To MPI+X https://sourceryinstitute.github.io/PAW/ Held in conjunction with SC23, Denver, CO Submissions deadline: July 24, 2023 July 31, 2023 Notification to authors: August 31, 2023 Workshop date: November 13, 2023 Summary As supercomputers become more and more powerful, the number and diversity of applications that can be tackled with these machines grows. Unfortunately, the architectural complexity of these supercomputers grows as well, with heterogeneous processors, multiple levels of memory hierarchy, and many ways to move data and synchronize between processors. The MPI+X programming model, use of which is considered by many to be standard practice, demands that a programmer be expert in both the application domain and the low-level details of the architecture(s) on which that application will be deployed, and the availability of such superhuman programmers is a critical bottleneck. Things become more complicated when evolution and change in the underlying architecture translates into significant re-engineering of the MPI+X code to maintain performance. Numerous alternatives to the MPI+X model exist, and by raising the level of abstraction on the application domain and/or the target architecture, they offer the ability for "mere mortal" programmers to take advantage of the supercomputing resources that are available to advance science and tackle urgent real-world problems. However, compared to the MPI+X approach, these alternatives generally lack two things. First, they aren't as well known as MPI+X and a domain scientist may simply not be aware of models that are a good fit to their domain. Second, they are less mature than MPI+X and likely have more functionality or performance "potholes" that need only be identified to be addressed. PAW-ATM is a forum for discussing HPC applications written in alternatives to MPI+X. Its goal is to bring together application experts and proponents of high-level languages to present concrete example uses of such alternatives, describing their benefits and challenges. Scope and Aims The PAW-ATM workshop is designed to be a forum for discussion of supercomputing-scale parallel applications and their implementation in programming models outside of the dominant MPI+X paradigm. Papers and talks will explore the benefits (or perhaps drawbacks) of implementing specific applications with alternatives to MPI+X, whether those benefits are in performance, scalability, productivity, or some other metric important to that application domain. Presenters are encouraged to generalize the experience with their application to other domains in science and engineering and to bring up specific areas of improvement for the model(s) used in the implementation. In doing so, our hope is to create a setting in which application authors, language designers, and architects can present and discuss the state of the art in alternative scalable programming models, while also wrestling with how to increase their effectiveness and adoption. Beyond well-established HPC scientific simulations, we also encourage submissions exploring artificial intelligence, big data analytics, machine learning, and other emerging application areas. Topics of interest include, but are not limited to: * Novel application development using high-level parallel programming languages and frameworks. * Examples that demonstrate performance, compiler optimization, error checking, and reduced software complexity. * Applications from artificial intelligence, data analytics, bioinformatics, and other novel areas. * Performance evaluation of applications developed using alternatives to MPI+X and comparisons to standard programming models. * Novel algorithms enabled by high-level parallel abstractions. * Experience with the use of new compilers and runtime environments. * Libraries using or supporting alternatives to MPI+X. * Benefits of hardware abstraction and data locality on algorithm implementation. Papers that include description of applications that demonstrate the use of alternative programming models will be given higher priority. Submissions Submissions are solicited in 2 categories: 1. Full-length papers presenting novel research results: Full-length papers will be published in the workshop proceedings. Submitted papers must describe original work that has not appeared in, nor is under consideration for, another conference or journal. Papers shall be eight (8) pages minimum and not exceed ten (10) pages including text, appendices, and figures, but excluding bibliography and acknowledgments. Submissions shall not exceed twelve (12) pages total under any circumstance. 1. Extended abstracts summarizing preliminary/published results: Extended abstracts will be evaluated separately and will not be included in the published proceedings; they are intended to propose timely communications of novel work that will be formally submitted elsewhere at a later stage, and/or of already published work that would be of interest to the PAW-ATM audience in terms of topic and timeliness. Extended abstracts shall not exceed four (4) pages. See https://sourceryinstitute.github.io/PAW/ for further details. WORKSHOP CHAIR * Karla Morris - Sandia National Laboratories ORGANIZING COMMITTEE * Engin Kayraklioglu - Hewlett Packard Enterprise * Irene Moulitsas - Cranfield University * Elliott Slaughter - SLAC National Accelerator Laboratory PROGRAM COMMITTEE CO-CHAIRS * Bill Long - Hewlett Packard Enterprise * Daniele Lezzi - Barcelona Supercomputing Center PROGRAM COMMITTEE * Dan Bonachea - Lawrence Berkeley National Laboratory * Jan Ciesko - Sandia National Laboratories * Iacopo Colonnelli - University of Turin * Mario Di Renzo - University of Salento and Stanford University * Salvatore Filippone - Universita di Roma Tor Vergata * Magne Haveraaen - University of Bergen * Peter Hawkins - Google * Engin Kayraklioglu - Hewlett Packard Enterprise * Jannis Klikenberg - RWTH Aachen University * Daniele Lezzi - Barcelona Supercomputing Center * Bill Long - Hewlett Packard Enterprise * Francesc Lordan - Barcelona Supercomputing Center * Lee Margetts - University of Manchester * Fabrizio Marozzo - University of Calabria * Josh Milthorpe - Australian National University * Henry Monge Camacho - Oak Ridge National Laboratory * Karla Morris - Sandia National Laboratories * Irene Moulitsas - Cranfield University * Elliott Slaughter - SLAC National Accelerator Laboratory * Kenjiro Taura - University of Tokyo * Miwako Tsuji - RIKEN Advanced Institute for Computational Science ADVISORY COMMITTEE * Bradford L. Chamberlain - Hewlett Packard Enterprise * Damian W. I. Rouson - Lawrence Berkeley National Laboratory * Katherine A. Yelick - Lawrence Berkeley National Laboratory ARTIFACT EVALUATION COMMITTEE CHAIR * Irene Moulitsas - Cranfield University ARTIFACT EVALUATION COMMITTEE MEMBERS * Scott Baden - University of California San Diego * Desmond Bisandu - Cranfield University * Valentin Churavy - Massachusetts Institute of Technology * Fabio Durastante - University of Pisa * Yakup Koray Budanaz - Technical University of Munich * Boyu Kuang - Cranfield University * Soren Rasmussen - National Center for Atmospheric Research * Anjiang Wei - Stanford University IMPORTANT DATES * Submissions deadline: July 24, 2023 July 31, 2023 * Manuscripts review period: August 2-23, 2023 * Notification to authors: August 31, 2023 * Updated AD/AE appendix due from authors: September 4, 2023 * PAW-ATM workshop date: November 13, 2023

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CFP: IEEE HPCC 2023 (High Performance Computing and Communications), Dec. 2023
by Jesson Butt 08 Jul '23

08 Jul '23

Call for papers: The 25th IEEE International Conference on High Performance Computing and Communications (HPCC 2023), 17-21 Dec. 2023, Melbourne, Australia. Website: www.swinflow.org/confs/2023/hpcc Key dates: Submission Deadline: August 25, 2023 (11:59pm UTC/GMT) Notification: October 15, 2023 Final Manuscript Due: October 30, 2023 Submission site: http://www.swinflow.org/confs/2023/hpcc/submission.htm Publication: Proceedings will be published by IEEE CS Press. Distinguished papers will be invited to special issues of selected journals listed on the conference website. =========== Introduction With the rapid growth in computing and communications technology, the past decade has witnessed a proliferation of powerful parallel and distributed systems and an ever increasing demand for practice of high performance computing and communications (HPCC). HPCC has moved into the mainstream of computing and has become a key technology in determining future research and development activities in many academic and industrial branches, especially when the solution of large and complex problems must cope with very tight timing schedules. Among a series of highly successful International Conferences on High Performance Computing and Communications (HPCC), HPCC conference comes to its 25th edition of a forum for engineers and scientists in academia, industry, and government to address the resulting profound challenges and to present and discuss their new ideas, research results, applications and experience on all aspects of high performance computing and communications. IEEE HPCC is sponsored by IEEE, IEEE Computer Society, and IEEE Technical Committee on Scalable Computing (TCSC). Scope and Topics Topics of particular interest include, but are not limited to: 1. Parallel and distributed system architectures 2. Languages and compilers for high performance computing 3. Parallel and distributed software technologies 4. Parallel and distributed algorithms 5. Embedded systems 6. Peer-to-peer computing 7. Cluster computing 8. Web services and Internet computing 9. Cloud computing 10. Utility computing 11. Performance evaluation and measurement 12. Tools and environments for software development 13. Distributed systems and applications 14. High-performance scientific and engineering computing 15. Database applications and data mining 16. Biological/molecular computing 17. Collaborative and cooperative environments 18. Mobile computing and wireless communications 19. Computer Networks 20. Telecommunications 21. Pervasive/ubiquitous computing and intelligence 22. Autonomic, reliability and fault-tolerance 23. Trust, security and privacy Submission Guidelines Submissions must include an abstract, keywords, the e-mail address of the corresponding author and should not exceed 8 pages for main conference, including tables and figures in IEEE CS format. The template files for LATEX or WORD can be downloaded here. All paper. submissions must represent original and unpublished work. Each submission will be peer reviewed by at least three program committee members. Submission of a paper should be regarded as an undertaking that, should the paper be accepted, at least one of the authors will register for the conference and present the work. Submit your paper(s) in PDF file at the submission site: http://www.swinflow.org/confs/2023/hpcc/submission.htm. Publications Accepted and presented papers will be included into the IEEE Conference Proceedings published by IEEE CS Press. Authors of accepted papers, or at least one of them, are requested to register and present their work at the conference, otherwise their papers may be removed from the digital libraries of IEEE CS and EI after the conference. Distinguished papers will be invited to special issues of selected journals listed on the conference website. General Chairs Xian-He Sun, Illinois Institute of Technology, USA Beniamino Di Martino, Universita' della Campania "Luigi Vanvitelli", Italy Laurence T. Yang, St. Francis Xavier University, Canada Program Chairs Muneeb Hassan, Deakin University, Australia Carson Leung, University of Manitoba, Canada

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CFP: Fifth International Conference on Microservices
by Alessandro Bocci 04 Jul '23

04 Jul '23

International Conference on Microservices: Call for Papers ========================================================== Fifth International Conference on Microservices October 10th-12th 2023, Pisa, Italy https://www.conf-micro.services/2023/ Important Dates (EXTENDED) --------------- - Submission deadline : July 09th, 2023 (AoE) (extended) - Notification to authors: July 19th, 2023 (AoE) (extended) - Camera-ready due: July 30th, 2023 (AoE) - Early bird registration until: July 30th, 2023 (AoE) - October 10th-12th, 2023 Theme and Topics ---------------- Microservices are pervading enterprise IT, with many big companies already adopting microservice architectures to deliver their core businesses. Microservices indeed provide an alternative to traditional software architectures, which brings various additional benefits, including increased flexibility, scalability, and improved resilience to failures. Additionally, microservices allow for faster and more efficient development, as well as better collaboration between cross-functional teams. As the technology landscape continues to evolve and become more complex, the importance of microservices in building modern, scalable, and effective applications cannot be overstated. The 5th International Conference on Microservices (Microservices 2023) seeks contributions from both industry and academia covering all aspects and phases of the design and implementation of microservice architectures, as well as experiences based on daily working with them. Topics of interests include, but are not limited to, the following: - Software engineering methods for microservices, specifically (but not limited to) agile service design practices, behavior- and domain-driven design - Formal models for microservices - Programming languages, notations, and techniques for microservices - Verification (both static and runtime) of microservice systems - Testing for microservices: unit tests, system tests, acceptance and regression tests, test-driven service development - DevOps for microservices, in particular (but not limited to) continuous deployment and distributed monitoring - Microservices in the context of development, security, and operations (DevSecOps) - Secure by design in the context of Microservices - Microservice operation and contributor analysis - Microservice management: fault, configuration, accounting/cost, performance, security - Co-change and change impact analysis - Discovery/recovery and reverse engineering of microservices solutions - Microservice evolution - Global governance for microservices - Methodologies for identification, specification, and realization of candidate services - Patterns for cloud-native application architectures; service API design and management - Microservices infrastructure components: API gateways, side cars, and service meshes; reactive messaging brokers; service registries; service containers and cluster managers; infrastructure as code - Function-as-a-service and serverless cloud offerings; service-based event sourcing and data streaming architectures - Security and other service quality concerns (consistency, availability, recoverability) in microservices; dealing with General Data Protection Regulation (GDPR) compliance and other data privacy requirements Testing for microservices: unit tests, system tests, acceptance and regression tests, test-driven service development Internet technologies: services, human interactions, data analytics and AI for IoT, architecture things centric, sensor networks, security, privacy, applications - AI and Microservices (including Datasets, Open-source technology) - Cyber-physical Systems: AI/ML applications, security - Industrial case studies and applications: Data Science/Big Data, Smart Industry, Healthcare, Government, Manufacturing, Logistics and Supply Chain Management - Empirical studies of microservices adoption - Case Studies and Surveys on the topic of Microservices - Sustainable practices in the Microservices community - Education about Microservices technologies Submissions Guidelines ---------------------- A submission should describe a talk to be given at the conference in the form of extended abstracts with a maximum of two pages for talks from industry and six pages for academic presentations (including references). Submissions can be based on work in progress, scientific work published or submitted for publication, practical experience reports, or practical tool demonstrations. They must further be prepared using the TBA template, be in PDF format, printable in black and white on A4 paper, and interpretable by common PDF tools. Submissions must be in English. Contributions may be submitted via TBA. The submission deadline is June 25th, 2023 AoE. Resubmissions are allowed until the submission deadline. Contributions will be reviewed and selected by the Program Committee. Extended abstracts of accepted contributions will be available electronically before the conference. Selected contributions will be invited to submit manuscripts based on their abstracts for conference post-proceedings. Organisation ------------ General Chair: Antonio Brogi, University of Pisa (IT) Program Chairs: Tomas Cerny, Baylor University (US) Valentina Lenarduzzi, University of Oulu (FI) Jacopo Soldani, University of Pisa (IT) Industrial Liaison Chair: Claudio Guidi, italianaSoftware (IT) Publicity Chair: Alessandro Bocci, University of Pisa (IT) Philip Wizenty, University of Applied Sciences and Arts Dortmund (DE) Local Chairs: Stefano Forti, University of Pisa (IT) Steering Committee ----------------- Giulio Manzonetto, Université Sorbonne Paris Nord Fabrizio Montesi, University of Southern Denmark Sabine Sachweh, University of Applied Sciences and Arts Dortmund Program Committee ----------------- Amr S. Abdelfattah, Baylor University (USA) Nour Ali, Brunel University London (UK) Carlo Aliprandi, Extra RED (IT) Hernán Astudillo, Universidad Técnica Federico Santa Maria (CL) Luciano Baresi, Politecnico di Milano (IT) Justus Bogner, University of Stuttgart (DE) Andrea Janes, Vorarlberg University of Applied Science (AT) Ivan Lanese, University of Bologna (IT) Pavas Navaney, Oracle (USA) Phu Nguyen, SINTEF (NO) Claus Pahl, Free University of Bozen-Bolzano (IT) Florian Rademacher, RWTH Aachen University (DE) Larisa Safina, INRIA (FR) Davide Taibi, University of Oulu (FI) Pavel Tisnovsky, Red Hat (USA) Nabil El Ioini, The University of Nottingham (MY) Richard Lipka, University of West Bohemia (CZ) Muhammad Waseem, University of Jyväskylä (FI) Contact Information ------------------- Please contact us if you have questions: https://www.conf-micro.services/2023/contact/

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Summer School on Reactive Synthesis + Workshop on Synthesis, Monitoring and Learning at University of Udine
by Gabriele Puppis 04 Jul '23

04 Jul '23

*** apologies for cross-postings *** ===== Call for Attendance ===== ----------------------------------------------------------------------------- Third edition of the UniVr/UniUd Summer School on Formal Methods for Cyber-Physical Systems - Udine, August 28-31 http://tcs.uniud.it/summer-school + Workshop on Synthesis, Monitoring and Learning - Udine, August 31-September 1 http://tcs.uniud.it/smile ----------------------------------------------------------------------------- Synthesis is a fundamental problem in computer science and mathematics, concerned with automatically generating programs that satisfy a given logical specification. Its applications span a range of domains, including model-based system design, software engineering, and automated theorem proving. For instance, designing a controller that guides the behavior of a reactive system, that is, a system that continually interacts with its environment, can be framed as a synthesis problem. Similarly, the design and verification of a distributed system often depend on distributed synthesis, which finds programs that enforce correct component interaction and satisfy desired specifications. The third edition of the Summer School on Formal Methods for Cyber-Physical Systems offers an in-depth exploration of reactive synthesis, a topic that was already introduced in the first edition of the school. The lecturers will provide a systematic account of the main achievements and the current trends of research in reactive synthesis, covering both theory and applications. The course will begin with an overview of the classical synthesis problem in the finite-state setting, as originally formulated by Church and solved by Buechi and Landweber. This introductory part will introduce the terminology of infinite two-player games, explain the automatic construction of winning strategies in “regular games”, and address history of the subject, discussing extensions and open problems. From there, the course will investigate approaches for making reactive synthesis more efficient and practical, including techniques for solving the synthesis problem in restricted settings, for decomposing the problem into subproblems, and for employing algorithms, data structures, and heuristics to manage complexity. Variants of the synthesis problem will also be explored, such as control strategies for hybrid and distributed systems, monitor synthesis, synthesis under incomplete information, distributed synthesis, and symmetric synthesis. The implementation of synthesis tools will also receive significant attention, with a focus on recent advances and applications of UPPAAL Stratego and the SYNTCOMP reactive synthesis competition. The summer school will conclude with a workshop on emerging research trends in synthesis, monitoring, and learning, which showcases some exciting interactions between formal methods and machine learning. Distinguished invited speakers will lead the workshop. Participants will also have the opportunity to engage with peers from around the world and may propose to deliver short research talks voluntarily. ### Lecturers Wolfgang Thomas - RWTH Aachen University, Germany 3-hour lecture on “Synthesis of strategies in infinite two-player games” We give an introduction to the synthesis of reactive systems in the finite-state setting, using the terminology of infinite two-player games and explaining the automatic construction of winning strategies in “regular games”. We also address the history of the subject, discuss extensions, and mention basic problems that are still open. Martin Zimmermann - Aalborg University, Denmark 3-hour lecture on “Synthesis of infinite-state systems” The reactive synthesis problem asks to compute, from a given specification of the input-output behavior of a reactive system, a system satisfying this specification (or to determine that no such system exists). In this lecture, we consider the synthesis of infinite-state systems with a focus on pushdown systems, which model simple recursive systems with finite data. On a technical level, we show how to solve infinite games on configuration graphs of pushdown automata and present recent work on generalizations to history-deterministic pushdown automata. Kim G. Larsen - Aalborg University, Denmark 3-hour lecture on “Synthesis and Optimization for Cyber Physical Systems” In these lectures we will present recent advances and applications of the tool UPPAAL Stratego (www.uppaal.org) supporting automatic synthesis of guaranteed safe and near-optimal control strategies for Cyber Physical Systems (CPS). UPPAAL Stratego combines symbolic methods from model checking, reinforcement learning methods from machine learning, as well as abstraction techniques for hybrid games. Trade-offs between efficiency of strategy representation and degree of optimality subject to safety constraints will be discussed, as well as successful applications (autonomous driving maneuvers, heating systems and traffic control). Dana Fisman - Ben Gurion University of the Negev, Israel 3-hour lecture on “Automata learning of languages of finite and infinite words” In these lectures we will get acquainted with the research area called grammatical inference or automata learning. We will start with the earliest results on the subject, and span different learning paradigms. We will describe several positive results, and efficient algorithms for learning regular languages. We will prove several negative results for learning different classes of languages in different learning paradigms. We will then discuss state-of-the-art results on learning regular languages of infinite words. Swen Jacobs - CISPA Helmholtz-Center for Information Security, Germany 3-hour lecture on “Reactive synthesis: towards practice” I will give an overview of different lines of research that try to make reactive synthesis (more) practical. This includes research into approaches to restrict the problem to more efficiently solvable fragments, into ways to split the problem into subproblems that can be solved independently or iteratively, and into efficient algorithms and data structures as well as heuristics that allow us to implement synthesis tools that can solve problems of significant size. I will report on progress observed in the reactive synthesis competition (SYNTCOMP), and on case studies and benchmark problems that demonstrate the capabilities of state-of-the-art synthesis tools. Alessandro Cimatti - Fondazione Bruno Kessler, Italy 3-hour lecture on “Runtime verification and monitor synthesis” Runtime Verification (RV) is a lightweight verification technique that aims at checking whether a run of a system under scrutiny (SUS) satisfies or violates a given correctness specification. The lecture will first overview the general framework of RV, and the techniques to synthesize run-time monitors that can be efficiently executed in combination with the SUS. Then, we will cover the relationship between RV and the field of Fault Detection and Isolation (FDI). In FDI, runtime monitors are built taking into account models of the SUS, in order to monitor the occurrence of internal (faulty) conditions that are not directly observable. ### Programme Monday, August 28 13:30 - 14:00 Registration 14:00 - 14:30 Course Introduction 14:30 - 16:00 Wolfgang Thomas 16:00 - 16:30 Coffee break 16:30 - 18:00 Wolfgang Thomas Tuesday, August 29 09:30 - 11:00 Martin Zimmermann 11:00 - 11:30 Coffee break 11:30 - 13:00 Martin Zimmermann 13:00 - 14:00 Lunch 14:30 - 16:00 Kim G. Larsen 16:00 - 16:30 Coffee break 16:30 - 18:00 Kim G. Larsen Wednesday, August 30 09:30 - 11:00 Dana Fisman 11:00 - 11:30 Coffee break 11:30 - 13:00 Dana Fisman 13:00 - 14:00 Lunch 14:30 - 16:00 Swen Jacobs 16:00 - 16:30 Coffee break 16:30 - 18:00 Swen Jacobs 19:00 - 23:00 Social dinner Thursday, August 31 09:30 - 11:00 Alessandro Cimatti 11:00 - 11:30 Coffee break 11:30 - 13:00 Alessandro Cimatti 13:00 - 14:00 Lunch 14:30 - 16:30 Workshop on Synthesis, Monitoring and Learning Friday, September 1 09:30 - 14:00 Workshop on Synthesis, Monitoring and Learning ### Admission and accommodation The course is offered in a hybrid format giving the possibility to remotely attend the course (on the Microsoft Teams platform). On-site places are limited and assigned on first come first served basis. The registration fees are: - On-site participation, 250.00 Euro + VAT 22% - Online participation, 120.00 Euro + VAT 22% Deadline for online application is August 18, 2023. Participation application is available at https://www.cism.it/en/activities/courses/J2303/ ### Contacts CISM, Palazzo del Torso Piazza Garibaldi 18, 39100 Udine, Italy tel. +39 0432 248511 email: cism(a)cism.it | www.cism.it ### Organization Angelo Montanari - University of Udine, Italy Gabriele Puppis - University of Udine, Italy Tiziano Villa - University of Verona, Italy

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(CALL FOR PAPERS) PAW-ATM: Parallel Applications Workshop, Alternatives To MPI+X
by Morris, Karla NMN 03 Jul '23

03 Jul '23

Call for Papers PAW-ATM 2023: Parallel Applications Workshop, Alternatives To MPI+X https://sourceryinstitute.github.io/PAW/ Held in conjunction with SC23, Denver, CO Submissions deadline: July 24, 2023 Notification to authors: August 31, 2023 Workshop date: November 13, 2023 Summary As supercomputers become more and more powerful, the number and diversity of applications that can be tackled with these machines grows. Unfortunately, the architectural complexity of these supercomputers grows as well, with heterogeneous processors, multiple levels of memory hierarchy, and many ways to move data and synchronize between processors. The MPI+X programming model, use of which is considered by many to be standard practice, demands that a programmer be expert in both the application domain and the low-level details of the architecture(s) on which that application will be deployed, and the availability of such superhuman programmers is a critical bottleneck. Things become more complicated when evolution and change in the underlying architecture translates into significant re-engineering of the MPI+X code to maintain performance. Numerous alternatives to the MPI+X model exist, and by raising the level of abstraction on the application domain and/or the target architecture, they offer the ability for "mere mortal" programmers to take advantage of the supercomputing resources that are available to advance science and tackle urgent real-world problems. However, compared to the MPI+X approach, these alternatives generally lack two things. First, they aren't as well known as MPI+X and a domain scientist may simply not be aware of models that are a good fit to their domain. Second, they are less mature than MPI+X and likely have more functionality or performance "potholes" that need only be identified to be addressed. PAW-ATM is a forum for discussing HPC applications written in alternatives to MPI+X. Its goal is to bring together application experts and proponents of high-level languages to present concrete example uses of such alternatives, describing their benefits and challenges. Scope and Aims The PAW-ATM workshop is designed to be a forum for discussion of supercomputing-scale parallel applications and their implementation in programming models outside of the dominant MPI+X paradigm. Papers and talks will explore the benefits (or perhaps drawbacks) of implementing specific applications with alternatives to MPI+X, whether those benefits are in performance, scalability, productivity, or some other metric important to that application domain. Presenters are encouraged to generalize the experience with their application to other domains in science and engineering and to bring up specific areas of improvement for the model(s) used in the implementation. In doing so, our hope is to create a setting in which application authors, language designers, and architects can present and discuss the state of the art in alternative scalable programming models, while also wrestling with how to increase their effectiveness and adoption. Beyond well-established HPC scientific simulations, we also encourage submissions exploring artificial intelligence, big data analytics, machine learning, and other emerging application areas. Topics of interest include, but are not limited to: * Novel application development using high-level parallel programming languages and frameworks. * Examples that demonstrate performance, compiler optimization, error checking, and reduced software complexity. * Applications from artificial intelligence, data analytics, bioinformatics, and other novel areas. * Performance evaluation of applications developed using alternatives to MPI+X and comparisons to standard programming models. * Novel algorithms enabled by high-level parallel abstractions. * Experience with the use of new compilers and runtime environments. * Libraries using or supporting alternatives to MPI+X. * Benefits of hardware abstraction and data locality on algorithm implementation. Papers that include description of applications that demonstrate the use of alternative programming models will be given higher priority. Submissions Submissions are solicited in 2 categories: 1. Full-length papers presenting novel research results: Full-length papers will be published in the workshop proceedings. Submitted papers must describe original work that has not appeared in, nor is under consideration for, another conference or journal. Papers shall be eight (8) pages minimum and not exceed ten (10) pages including text, appendices, and figures, but excluding bibliography and acknowledgments. Submissions shall not exceed twelve (12) pages total under any circumstance. 1. Extended abstracts summarizing preliminary/published results: Extended abstracts will be evaluated separately and will not be included in the published proceedings; they are intended to propose timely communications of novel work that will be formally submitted elsewhere at a later stage, and/or of already published work that would be of interest to the PAW-ATM audience in terms of topic and timeliness. Extended abstracts shall not exceed four (4) pages. See https://sourceryinstitute.github.io/PAW/ for further details. WORKSHOP CHAIR * Karla Morris - Sandia National Laboratories ORGANIZING COMMITTEE * Engin Kayraklioglu - Hewlett Packard Enterprise * Irene Moulitsas - Cranfield University * Elliott Slaughter - SLAC National Accelerator Laboratory PROGRAM COMMITTEE CO-CHAIRS * Bill Long - Hewlett Packard Enterprise * Daniele Lezzi - Barcelona Supercomputing Center PROGRAM COMMITTEE * Dan Bonachea - Lawrence Berkeley National Laboratory * Jan Ciesko - Sandia National Laboratories * Iacopo Colonnelli - University of Turin * Mario Di Renzo - University of Salento and Stanford University * Salvatore Filippone - Universita di Roma Tor Vergata * Magne Haveraaen - University of Bergen * Peter Hawkins - Google * Engin Kayraklioglu - Hewlett Packard Enterprise * Jannis Klikenberg - RWTH Aachen University * Daniele Lezzi - Barcelona Supercomputing Center * Bill Long - Hewlett Packard Enterprise * Francesc Lordan - Barcelona Supercomputing Center * Lee Margetts - University of Manchester * Fabrizio Marozzo - University of Calabria * Josh Milthorpe - Australian National University * Henry Monge Camacho - Oak Ridge National Laboratory * Karla Morris - Sandia National Laboratories * Irene Moulitsas - Cranfield University * Elliott Slaughter - SLAC National Accelerator Laboratory * Kenjiro Taura - University of Tokyo * Miwako Tsuji - RIKEN Advanced Institute for Computational Science ADVISORY COMMITTEE * Bradford L. Chamberlain - Hewlett Packard Enterprise * Damian W. I. Rouson - Lawrence Berkeley National Laboratory * Katherine A. Yelick - Lawrence Berkeley National Laboratory ARTIFACT EVALUATION COMMITTEE CHAIR * Irene Moulitsas - Cranfield University ARTIFACT EVALUATION COMMITTEE MEMBERS * Scott Baden - University of California San Diego * Desmond Bisandu - Cranfield University * Valentin Churavy - Massachusetts Institute of Technology * Fabio Durastante - University of Pisa * Yakup Koray Budanaz - Technical University of Munich * Boyu Kuang - Cranfield University * Soren Rasmussen - National Center for Atmospheric Research * Anjiang Wei - Stanford University IMPORTANT DATES * Submissions deadline: July 24, 2023 * Manuscripts review period: August 2-23, 2023 * Notification to authors: August 31, 2023 * Updated AD/AE appendix due from authors: September 4, 2023 * PAW-ATM workshop date: November 13, 2023

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computational.science July 2023