[Apologies if you receive multiple copies of this CFP]
IA^3 2019
9th Workshop on Irregular Applications: Architectures and Algorithms
http://hpc.pnl.gov/IA3
November 18, 2019
Colorado Convention Center, Denver, CO
In conjunction with SC19
Sponsored by IEEE TCHPC
Proceedings published in the IEEE Digital Library through IEEE TCHPC.
--------------------
Important Dates
--------------------
Abstract Submission: August 28, 2019
Position or Regular Paper Submission: September 4, 2019
Notification: October 1, 2019
Camera-ready: October 10, 2019
Workshop: November 18, 2019
--------------------
Call for Papers
--------------------
Irregular applications occur in many subject matters. While inherently parallel, they exhibit highly variable execution performance at a local level due to unpredictable memory access patterns and/or network transfers, divergent control structures, and data imbalances. Moreover, they often require fine-grain synchronization and communication on large-data structures such as graphs, trees, unstructured grids, sparse matrices, deep nets, tables, and their combinations (such as, for example, attributed graphs). They have a significant degree of latent parallelism, which however is difficult to exploit due to their complex behavior. Current high performance architectures rely on data locality and regular computation to reduce access latencies, and often do not cope well with the requirements of these applications. Furthermore, irregular applications are difficult to scale on current supercomputing machines, due to their limits in fine-grained synchronization and small data transfers.
Irregular applications pertain both to well established and emerging fields, such as machine learning, social network analysis, bioinformatics, semantic graph databases, Computer Aided Design (CAD), and computer security. Many of these application areas also process massive sets of unstructured data, which keep growing exponentially. Emerging supercomputing applications are moving towards a convergence of scientific simulation, data analytics, and learning algorithms, mixed in various ways. Addressing the issues of irregular applications on current and future architectures will become critical to solve the challenges in science and data analysis of the next few years.
This workshop seeks to explore solutions for supporting efficient execution of irregular applications in the form of new features at the level of the micro- and system-architecture, network, languages and libraries, runtimes, compilers, analysis, algorithms. Topics of interest, of both theoretical and practical significance, include but are not limited to:
- Micro- and System-architectures, including multi- and many-core designs, heterogeneous processors, accelerators (GPUs, vector processors, Automata processor), reconfigurable (coarse grained reconfigurable and FPGA designs) and custom processors
- Network architectures and interconnect (including high-radix networks, optical interconnects)
- Novel memory architectures and designs (including processors-in memory)
- Impact of new computing paradigms on irregular workloads (including neuromorphic processors and quantum computing)
- Modeling, simulation and evaluation of novel architectures with irregular workloads
- Innovative algorithmic techniques
- Combinatorial algorithms (graph algorithms, sparse linear algebra, etc.)
- Impact of irregularity on machine learning approaches
- Parallelization techniques and data structures for irregular workloads
- Data structures combining regular and irregular computations (e.g., attributed graphs)
- Approaches for managing massive unstructured datasets (including streaming data)
- Languages and programming models for irregular workloads
- Library and runtime support for irregular workloads
- Compiler and analysis techniques for irregular workloads
- High performance data analytics applications (including graph databases and solutions that combine graph algorithms with machine learning)
- Applications that integrate scientific simulation, data analytics, and learning, and require efficient execution of irregular workloads
Besides regular papers, papers describing work-in-progress or incomplete but sound, innovative ideas related to the workshop theme are also encouraged. We solicit both 8-page regular papers and 4-page position papers. Authors of exciting but not mature enough regular papers may be offered the option of a short 4-page paper and related short presentation.
--------------------
Submissions
--------------------
Submission site: https://submissions.supercomputing.org
Submitted manuscripts may not exceed eight (8) pages in length for regular papers and four (4) pages for position papers including figures, tables and references.
Authors of regular papers will be able to provide up to one (1) additional pages for the Artifact Description (AD) appendix and, after paper acceptance, up to two (2) additional pages for the Artifact Evaluation (AE) appendix.
The templates are available at:
http://www.ieee.org/conferences_events/conferences/publishing/templates.html.
Accepted papers will be published in the IEEE Digital Library through IEEE TCHPC.
--------------------
Artifact Description & Evaluation
--------------------
This edition of the workshop invites authors of regular papers to follow a reproducibility initiative like the main SC Conference, with specific appendices for the Artifact Description (AD) and the Artifact Evaluation (AE). Please refer to the SC reproducibility page for further details on the rationale behind AD and AE: https://sc19.supercomputing.org/submit/reproducibility-initiative/.
Authors of regular papers will be able to use up to one (1) additional page to provide an Artifact Description (AD) Appendix, describing the details of their software environments and computational experiments to the extent that an independent person could replicate their results. This additional page is voluntary, and must focus only on details on software environments and methods to execute the experiments. It should not add details on the proposed technical approaches. If a paper has no computational results, the appendix only needs to mention that computational results are not part of the paper.
Additionally, authors of accepted regular papers will be invited to formally submit their supporting materials to the Artifact Evaluation (AE) process. The process is voluntary, but authors that will participate in the AE will be eligible for the Best Paper Award of the workshop. Supporting materials for the AE include access to the actual software artifact, shared publicly (for example, through the CK - Collective Knowledge - https://github.com/ctuning/ck format), and two (2) further additional pages of the paper that details how to reproduce the results of the paper. For details on how to submit supporting materials to the AE process, please refer to: http://ctuning.org/ae/submission.html. Authors participating in the AE will receive an assessment of the artifact, and the related badge on their paper.
For any additional question on the AD and the AE please contact the Artifact Evaluation Chair Flavio Vella at mailto:Flavio.Vella@unibz.it.
--------------------
Organizers
--------------------
Antonino Tumeo (PNNL), mailto:antonino.tumeo@pnnl.gov
John Feo (PNNL), mailto:john.feo@pnnl.gov
Vito Giovanni Castellana (PNNL), mailto:vitoGiovanni.castellana@pnnl.gov
--------------------
Proceedings Chair
--------------------
Marco Minutoli (PNNL and WSU), mailto:marco.minutoli@pnnl.gov
--------------------
Artifact Evaluation Chair
--------------------
Favio Vella (Free University of Bozen), mailto:Flavio.Vella@unibz.it
--------------------
Technical Program Committee
--------------------
Nesreen Ahmed, Intel, US
Ashwin M. Aji, AMD, US
Kubilay Atasu, IBM Zurich, CH
Scott Beamer, University of California, Santa Cruz, US
Jonathan Beard, ARM, US
Michela Becchi, North Carolina State University, US
Sanjukta Bhowmick, University of North Texas, US
Erik Boman, Sandia National Laboratories, US
David Brooks, Harvard University, US
Aydin Buluc, Lawrence Berkeley National Laboratory, US
Anastasiia Butko, Lawrence Berkeley National Laboratory, US
Tim Davis, Texas A&M University, US
Assefaw Gebremedhin, Washington State University, US
Rajiv Gupta, University of California, Riverside, US
George Karypis, University of Minnesota, US
Peter M. Kogge, Notre Dame University, US
Manoj Kumar, IBM TJ Watson, US
John Leidel, Tactical Computing Labs, US
Kamesh Madduri, Pennsylvania State University, US
José Moreira, IBM TJ Watson, US
Miquel Moretó, Barcelona Supercomputing Center, ES
Walid Najjar, University of California, Riverside, US
Maxim Naumov, Facebook, US
Fanny Nina-Paravecino, Intel, US
Roger Pearce, Lawrence Livermore National Laboratory, US
Cynthia Phillips, Sandia National Laboratories, US
Keshav Pingali, University of Texas, Austin, US
Alejandro Rico, ARM, US
Jason Riedy, Georgia Tech, US
John Shalf, Lawrence Livermore National Laboratory, US
Edgar Solomonik, University of Illinois, Urbana Champaign, US
Ruud van der Pas, Oracle, US
Ana Lucia Varbanescu, University of Amsterdam, NL
Jishen Zhao, University of California, San Diego, US
Other members TBD
**********************************************************************
We apologize if you received multiple copies of this Call for Papers
Please feel free to distribute it to those who might be interested
**********************************************************************
Paper Deadline in Less Than 1 Month - Data Science for Future Energy
Systems - HiPC Workshop 2019
https://hipc.org/dsfes
17 December 2019 Hyderabad, India
CALL FOR WORKSHOP PAPER
An Energy System is defined as a system primarily designed to supply
energy services to end users. Such systems form the backbone of modern
economy and include power grids, oilfields, heating/cooling systems,
etc. The design of efficient, reliable and scalable Energy Systems for
the future requires making them smarter and transitioning them into
Future Energy Systems via novel data driven solutions built on top of
the existing monitoring and control infrastructure.
The goal of this workshop is to highlight and encourage discussions
regarding novel applications of data science and data analytics
techniques in the domain of Energy Systems such as smart (power)
grids, smart oilfields, smart heating/cooling systems etc. Data driven
techniques enabling transition to Future Energy Systems via improved
sustainability and electrification of the energy systems, Uberization
of the energy systems, mobility changes due to future energy systems,
etc. are solicited.
This workshop seeks submissions related to the following topic areas
as applicable to the domain of future energy systems:
* Discovery of knowledge and insights using data
* Data Analytics Applications: Learning, prediction, anomaly
detection, pattern recognition, search, mining, etc.
* Data management/infrastructure
* Data privacy/security
* Data driven modeling
* Data driven decision making
* Data driven techniques enabling energy transition for improved
sustainability and electrification
* Uberization of energy systems enabling peer-to-peer transactions,
minimizing distance between the producer and consumers, user rating
system for quality of service, etc.
* Mobility changes due to future energy systems
MANUSCRIPT GUIDELINES
Submitted manuscripts should be structured as technical papers and may
not exceed six (6) single-spaced double-column pages using 10-point
size font on 8.5 x 11 inch pages (IEEE conference style), including
figures, tables, and references. See IEEE style templates at this page
for details.
Electronic submissions must be in the form of a readable PDF file. All
manuscripts will be reviewed by the Program Committee and evaluated on
originality, relevance of the problem to the conference theme,
technical strength, rigor in analysis, quality of results, and
organization and clarity of presentation of the paper.
Submitted papers must represent original unpublished research that is
not currently under review for any other conference or journal. Papers
not following these guidelines will be rejected without review and
further action may be taken, including (but not limited to)
notifications sent to the heads of the institutions of the authors and
sponsors of the conference.
Presentation of an accepted paper at the workshop is a requirement of
publication. Any paper that is not presented at the conference will
not be included in proceedings.
IMPORTANT DATES
Paper Submission: September 20th, 2019
Notification to Authors: October 14th, 2019
Workshop camera-ready: October 28th, 2019
SUBMISSION PORTAL
Easychair Submission Link: https://easychair.org/conferences/?conf=dsfes2019
ORGANIZING COMMITTEE
Sanmukh R. Kuppannagari, University of Southern California, USA
Chayan Sarkar, TCS Research, India
PROGRAM COMMITTEE MEMBERS
Ram Balachandran, India
Charalampos Chelmis, University of Albany, USA
Sanmukh R. Kuppannagari (organizer), University of Southern California, USA
Akshay Uttama Nambi, Microsoft Research, India
Anand Panangadan, California State University, USA
Laks Raghupati, Shell, India
Kiran Sajjanshetty, Voyage Auto Inc., USA
Chayan Sarkar (organizer), TCS Research & Innovation, India
Ajitesh Srivastava, University of Southern California, USA
Mahima Agumbe Suresh, San Jose State University, USA
**********************************************************************
We apologize if you received multiple copies of this message
Please feel free to distribute it to those who might be interested
**********************************************************************
HiPC 2019 WORKSHOP PAPER DEADLINES
**********************************************************************
The 26th annual IEEE International Conference on High Performance
Computing, Data, and Analytics (HiPC 2019) will be held at the
Hyderabad International Convention Centre, Hyderabad, India, during
17-20 December 2019. Complementing the main technical program, HiPC
workshops serve to broaden the technical scope of the conference in
emerging areas of high performance computing, communication, data and
analytics and their applications.
Below is the listing of the workshops with deadlines to be held on the
first day of the conference, December 17th. Please follow the links
below for a detailed description and the Call for Papers of each
workshop.
SEPTEMBER 15, 2019
* Workshop on Education for High Performance Computing (EduHiPC) -
https://hipc.org/eduhipc-2019
SEPTEMBER 20, 2019
* Multi-tier Big Data Pipelines from Edge to the Cloud Data Centers -
https://hipc.org/bigdata/
* Workshop on Data Science for Future Energy Systems - https://hipc.org/dsfes/
* Workshop on Memory and Storage Systems 2019 (WoMSS) - http://hipc.org/womss/
WORKSHOP CO-CHAIRS
* Vandana Janeja, University of Maryland, Baltimore County, USA
* Antonino Tumeo, Pacific Northwest National Laboratory, USA
Workshops co-chairs may be contacted at workshops(a)hipc.org.
*** 12th HiPC Student Research Symposium (SRS) ***
Held in conjunction with the
26th INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING, DATA, and
ANALYTICS (HIPC 2019)
December 17-20, 2019 | Hyderabad, INDIA | www.hipc.org
OVERVIEW
HiPC 2019 will feature the 12th Student Research Symposium on High
Performance Computing, Data, and Analytics (HPC) aimed at stimulating
and fostering student research, and providing an international forum
to highlight student research accomplishments. The symposium will also
provide exposure to students in the best practices in HPC in academia
and industry.
The symposium will feature student posters and provide students with
other enriching experiences, such as workshops, industry exhibits, and
demos. The Conference Reception and multiple Student Symposium Poster
Exhibit sessions will provide an opportunity for students to interact
with HPC researchers and practitioners (and recruiters) from academia
and industry.
Awards for Best Poster, sponsored by IEEE Computer Society – Technical
Committee on Parallel Processing (TCPP) – will be presented at the
symposium. An online book containing the resumes of the students
participating in the symposium will be compiled and made available to
the sponsors of the HiPC 2019 conference.
TOPICS
Papers are solicited in all areas of high-performance computing, data,
and analytics, including but not limited to topics mentioned below.
High-Performance Computing
Algorithms: This track invites papers that describe original research
on developing new parallel and distributed computing algorithms, and
related advances. Examples of topics that are of interest include (but
not limited to):
• New parallel and distributed algorithms and design techniques;
• Advances in enhancing algorithmic properties or providing guarantees
(e.g., fault tolerance, resilience, concurrency, data locality,
communication-avoiding);
• Classical and emerging computation models (e.g.,
parallel/distributed models, quantum computing, neuromorphic and other
bioinspired models);
• Provably efficient parallel and distributed algorithms for advanced
scientific computing and irregular applications (e.g., numerical
linear algebra, graph algorithms, computational biology); and
• Algorithmic techniques for resource allocation and optimization
(e.g., scheduling, load balancing, resource management).
Architectures: This track invites papers that describe original
research on the design and evaluation of high-performance computing
architectures, and related advances. Examples of topics of interest
include (but not limited to):
• Design and evaluation of high-performance processing architectures
(e.g., reconfigurable, system-on-chip, many cores, vector processors);
• Design and evaluation of networks for high-performance computing
platforms (e.g., interconnect topologies, network-on-chip);
• Design and evaluation of memory, cache and storage architectures
(e.g., 3D, photonic, Processing-In-Memory, NVRAM, burst buffers,
parallel I/O);
• Approaches to improve architectural properties (e.g., energy/power
efficiency, reconfigurable, resilience/fault tolerance,
security/privacy); and
• Emerging computational architectures (e.g., quantum computing,
neuromorphic and other bioinspired architectures).
Applications: This track invites papers that describe original
research on the design and implementation of scalable applications for
execution on parallel and distributed platforms, and related advances.
Examples of topics of interest include (but not limited to):
• Design and implementation of shared and distributed memory parallel
applications (e.g., scientific computing and industry applications,
emerging applications in IoT and life sciences – biology, medicine,
chemistry, etc.);
• Design and simulation methodologies for scaling applications on peta
and exascale platforms (e.g., co-design approaches, hardware/software
co-design, heterogeneous and hybrid programming);
• Hardware acceleration of parallel applications (e.g., CPU/GPUs,
multi-GPU clusters, FPGA, vector processors, manycore); and
• Design of application benchmarks for parallel and distributed platforms.
Systems Software: This track invites papers that describe original
research on the design, implementation, and evaluation of systems
software for high-performance computing platforms, and related
advances. Examples of topics of interest include (but not limited to):
• Scalable systems and software architectures for high-performance
computing (e.g., middleware, operating systems, I/O services);
• Techniques to enhance parallel performance (e.g., compiler/runtime
optimization, learning from application traces, profiling);
• Techniques to enhance parallel application development and
productivity (e.g., Domain-Specific Languages, programming
environments, performance/correctness checking and debugging);
• Techniques to deal with uncertainties, hardware/software resilience,
and fault tolerance;
• Software for the cloud, data center, and exascale platforms (e.g.,
middleware tools, schedulers, resource allocation, data migration,
load balancing); and
• Software and programming paradigms for heterogeneous platforms
(e.g., libraries for CPU/GPU, multi-GPU clusters, and other
accelerator platforms).
Data Science
Scalable Algorithms and Analytics: This track invites papers that
describe original research on developing scalable algorithms for data
analysis at scale, and related advances. Examples of topics of
interest include (but not limited to):
• New scalable algorithms for fundamental data analysis tasks
(supervised, unsupervised learning, and pattern discovery);
• Scalable algorithms that are designed to address the characteristics
of different data sources and settings (e.g., graphs, social networks,
sequences, data streams);
• Scalable algorithms and techniques to reduce the complexity of
large-scale data (e.g., streaming, sublinear data structures,
summarization, compressive analytics);
• Scalable algorithms that are designed to address requirements in
different data-driven application domains (e.g., life sciences,
business, agriculture); and
• Scalable algorithms that ensure the transparency and fairness of the analysis.
Scalable Systems and Software: This track invites papers that describe
original research on developing scalable systems and software for
handling data at scale, and related advances. Examples of topics of
interest include (but not limited to):
• Design of scalable system software to support various applications
(e.g., recommendation systems, web search, crowdsourcing applications,
streaming applications);
• Design of scalable system software for various architectures (e.g.,
OpenPower, GPUs, FPGAs);
• Architectures and systems software to support various operations in
large data frameworks (e.g., storage, retrieval, automated workflows,
data organization, visualization, visual analytics,
human-in-the-loop);
• Design and implementation of systems software for distributed data
frameworks (e.g., distributed file system, virtualization, cloud
services, resource optimization, scheduling); and
• Standards and protocols for enhancing various aspects of data
analytics (e.g., open data standards, privacy-preserving, and secure
schemes).
IMPORTANT DATES
Aug 19, 2019 > Submission Opens
Sep 16, 2019 > Submission Deadline
Nov 9, 2019 > Accept/Reject Decision Notification
Dec 17-20, 2019 > Symposium
ELIGIBILITY
Submissions should have at least one author who is a student during
any part of the calendar year 2019. Submissions may have multiple
student or non-student co-authors. Submissions must mark student
authors with an asterisk (*).
SUBMISSION INSTRUCTIONS
In order to be considered for a poster at the Student Research
Symposium, authors must submit papers, not exceeding five (5) letter
size (8.5in x 11in) pages, in 11 or 12 point font, single-spaced, with
1'' margins on all sides. Papers are to be submitted online in PDF
format through Easychair at:
https://easychair.org/conferences/?conf=hipc2019.
The papers will be used to select posters, but will NOT be published
in the conference proceedings. This will provide students the
flexibility to publish an extended version of their paper at other
venues, after benefiting from reviewer feedback from the symposium.
Papers submitted to the symposium are expected to be reviewed by at
least three independent reviewers. Papers will be judged on technical
merit, quality, relevance to the symposium, and related parameters.
Plagiarism, in any form, especially verbatim reproduction from other
published works, is prohibited. Papers that are plagiarized will be
rejected, and the corresponding department and institution will be
notified.
Facilities for displaying posters will be made available, and the
exact specifications of the poster size will be provided later. At
least one student author of each paper that is accepted must register
and attend the conference to present their work. Papers with no-shows
will be retroactively rejected.
TRAVEL SUPPORT
We expect to provide a travel scholarship to at least one student
author of each accepted submission from an Indian university, subject
to availability of funding. This scholarship will cover partial
expenses for attending the conference. Further details on this
scholarship and the application process will be provided later.
SYMPOSIUM CO-CHAIRS
Ashok Srinivasan, University of West Florida, USA
Ramakrishna Upadrasta, IIT Hyderabad, India
SYMPOSIUM VICE-CHAIR
Dip Sankar Banerjee, IIIT Guwahati, India
CONTACT
Contact student_symposium at hipc dot org for more details.
[Apologies if you receive multiple copies of this CFP]
IA^3 2019
9th Workshop on Irregular Applications: Architectures and Algorithms
http://hpc.pnl.gov/IA3
November 18, 2019
Colorado Convention Center, Denver, CO
In conjunction with SC19
Sponsored by IEEE TCHPC
--------------------
Call for Papers
--------------------
Irregular applications occur in many subject matters. While inherently parallel, they exhibit highly variable execution performance at a local level due to unpredictable memory access patterns and/or network transfers, divergent control structures, and data imbalances. Moreover, they often require fine-grain synchronization and communication on large-data structures such as graphs, trees, unstructured grids, sparse matrices, deep nets, tables, and their combinations (such as, for example, attributed graphs). They have a significant degree of latent parallelism, which however is difficult to exploit due to their complex behavior. Current high performance architectures rely on data locality and regular computation to reduce access latencies, and often do not cope well with the requirements of these applications. Furthermore, irregular applications are difficult to scale on current supercomputing machines, due to their limits in fine-grained synchronization and small data transfers.
Irregular applications pertain both to well established and emerging fields, such as machine learning, social network analysis, bioinformatics, semantic graph databases, Computer Aided Design (CAD), and computer security. Many of these application areas also process massive sets of unstructured data, which keep growing exponentially. Emerging supercomputing applications are moving towards a convergence of scientific simulation, data analytics, and learning algorithms, mixed in various ways. Addressing the issues of irregular applications on current and future architectures will become critical to solve the challenges in science and data analysis of the next few years.
This workshop seeks to explore solutions for supporting efficient execution of irregular applications in the form of new features at the level of the micro- and system-architecture, network, languages and libraries, runtimes, compilers, analysis, algorithms. Topics of interest, of both theoretical and practical significance, include but are not limited to:
- Micro- and System-architectures, including multi- and many-core designs, heterogeneous processors, accelerators (GPUs, vector processors, Automata processor), reconfigurable (coarse grained reconfigurable and FPGA designs) and custom processors
- Network architectures and interconnect (including high-radix networks, optical interconnects)
- Novel memory architectures and designs (including processors-in memory)
- Impact of new computing paradigms on irregular workloads (including neuromorphic processors and quantum computing)
- Modeling, simulation and evaluation of novel architectures with irregular workloads
- Innovative algorithmic techniques
- Combinatorial algorithms (graph algorithms, sparse linear algebra, etc.)
- Impact of irregularity on machine learning approaches
- Parallelization techniques and data structures for irregular workloads
- Data structures combining regular and irregular computations (e.g., attributed graphs)
- Approaches for managing massive unstructured datasets (including streaming data)
- Languages and programming models for irregular workloads
- Library and runtime support for irregular workloads
- Compiler and analysis techniques for irregular workloads
- High performance data analytics applications (including graph databases and solutions that combine graph algorithms with machine learning)
- Applications that integrate scientific simulation, data analytics, and learning, and require efficient execution of irregular workloads
Besides regular papers, papers describing work-in-progress or incomplete but sound, innovative ideas related to the workshop theme are also encouraged. We solicit both 8-page regular papers and 4-page position papers. Authors of exciting but not mature enough regular papers may be offered the option of a short 4-page paper and related short presentation.
--------------------
Important Dates
--------------------
Abstract Submission: August 28, 2019
Position or Regular Paper Submission: September 4, 2019
Notification: October 1, 2019
Camera-ready: October 10, 2019
Workshop: November 18, 2019
--------------------
Submissions
--------------------
Submission site: https://submissions.supercomputing.org
Submitted manuscripts may not exceed eight (8) pages in length for regular papers and four (4) pages for position papers including figures, tables and references.
Authors of regular papers will be able to provide up to one (1) additional pages for the Artifact Description (AD) appendix and, after paper acceptance, up to two (2) additional pages for the Artifact Evaluation (AE) appendix.
The templates are available at:
http://www.ieee.org/conferences_events/conferences/publishing/templates.html.
Accepted papers will be published in the IEEE Digital Library through IEEE TCHPC.
--------------------
Artifact Description & Evaluation
--------------------
This edition of the workshop invites authors of regular papers to follow a reproducibility initiative like the main SC Conference, with specific appendices for the Artifact Description (AD) and the Artifact Evaluation (AE). Please refer to the SC reproducibility page for further details on the rationale behind AD and AE: https://sc19.supercomputing.org/submit/reproducibility-initiative/.
Authors of regular papers will be able to use up to one (1) additional page to provide an Artifact Description (AD) Appendix, describing the details of their software environments and computational experiments to the extent that an independent person could replicate their results. This additional page is voluntary, and must focus only on details on software environments and methods to execute the experiments. It should not add details on the proposed technical approaches. If a paper has no computational results, the appendix only needs to mention that computational results are not part of the paper.
Additionally, authors of accepted regular papers will be invited to formally submit their supporting materials to the Artifact Evaluation (AE) process. The process is voluntary, but authors that will participate in the AE will be eligible for the Best Paper Award of the workshop. Supporting materials for the AE include access to the actual software artifact, shared publicly (for example, through the CK - Collective Knowledge - https://github.com/ctuning/ck format), and two (2) further additional pages of the paper that details how to reproduce the results of the paper. For details on how to submit supporting materials to the AE process, please refer to: http://ctuning.org/ae/submission.html. Authors participating in the AE will receive an assessment of the artifact, and the related badge on their paper.
For any additional question on the AD and the AE please contact the Artifact Evaluation Chair Flavio Vella at mailto:Flavio.Vella@unibz.it.
--------------------
Organizers
--------------------
Antonino Tumeo (PNNL), mailto:antonino.tumeo@pnnl.gov
John Feo (PNNL), mailto:john.feo@pnnl.gov
Vito Giovanni Castellana (PNNL), mailto:vitoGiovanni.castellana@pnnl.gov
--------------------
Proceedings Chair
--------------------
Marco Minutoli (PNNL and WSU), mailto:marco.minutoli@pnnl.gov
--------------------
Artifact Evaluation Chair
--------------------
Favio Vella (Free University of Bozen), mailto:Flavio.Vella@unibz.it
--------------------
Technical Program Committee
--------------------
Nesreen Ahmed, Intel, US
Ashwin M. Aji, AMD, US
Kubilay Atasu, IBM Zurich, CH
Scott Beamer, University of California, Santa Cruz, US
Jonathan Beard, ARM, US
Michela Becchi, North Carolina State University, US
Sanjukta Bhowmick, University of North Texas, US
Erik Boman, Sandia National Laboratories, US
David Brooks, Harvard University, US
Aydin Buluc, Lawrence Berkeley National Laboratory, US
Anastasiia Butko, Lawrence Berkeley National Laboratory, US
Tim Davis, Texas A&M University, US
Assefaw Gebremedhin, Washington State University, US
Rajiv Gupta, University of California, Riverside, US
George Karypis, University of Minnesota, US
Peter M. Kogge, Notre Dame University, US
Manoj Kumar, IBM TJ Watson, US
John Leidel, Tactical Computing Labs, US
Kamesh Madduri, Pennsylvania State University, US
José Moreira, IBM TJ Watson, US
Miquel Moretó, Barcelona Supercomputing Center, ES
Walid Najjar, University of California, Riverside, US
Maxim Naumov, Facebook, US
Fanny Nina-Paravecino, Intel, US
Roger Pearce, Lawrence Livermore National Laboratory, US
Cynthia Phillips, Sandia National Laboratories, US
Keshav Pingali, University of Texas, Austin, US
Alejandro Rico, ARM, US
Jason Riedy, Georgia Tech, US
John Shalf, Lawrence Livermore National Laboratory, US
Edgar Solomonik, University of Illinois, Urbana Champaign, US
Ruud van der Pas, Oracle, US
Ana Lucia Varbanescu, University of Amsterdam, NL
Jishen Zhao, University of California, San Diego, US
Other members TBD
Call for Nominations:
2019 IEEE CS TCHPC Early Career Researchers Award for Excellence in High Performance Computing
The IEEE Computer Society TCHPC Early Career Researchers Award for Excellence in High Performance Computing recognizes up to 3 individuals who have made outstanding, influential, and potentially long-lasting contributions in the field of high-performance computing within 5 years of receiving their PhD degree as of January 01 of the year of the award. It is sponsored by the IEEE Computer Society Technical Consortium on High Performance Computing (TCHPC) and its member Technical Committees:
- Technical Committee on Parallel Process (TCPP)
- Technical Committee on Computer Communications (TCCC)
- Technical Committee on Distributed Processing (TCDP)
- Technical Committee on Cloud Computing (TCCLD)
- Task Force on Rebooting Computing (TFRC)
- Technical Committee on Computational Life Sciences (TCCLS)
Nominations: A candidate must be nominated by member(s) of the community. An individual may nominate at most one candidate for this award. The nomination application must be submitted via email to tchpc-awards(a)computer.org as a single PDF file and should contain the following details:
1. Name/email of person making the nomination (self-nominations are not eligible).
2. Name/email of candidate for whom the award is recommended.
3. A statement by the nominator (maximum of 500 words) as to why the nominee is highly deserving of the award. Note that since the award is for outstanding contributions, the statement and supporting letters should address what the contributions are and why they are both outstanding and significant. The nomination should also list the names and email of up to 3 persons who have provided letters supporting the nomination.
4. CV of the nominee.
5. Up to three letters of support from persons other than the nominator +IBM- these should be collected by the nominator and included in the nomination.
Important Dates:
- Nomination Deadline: August 15, 2019
- Results Notification:September 15, 2019
Award Selection Committee: The award selection committee consists of:
- Lin Gan, Tsinghua University and National Supercomputing Center in Wuxi, China
- Vladimir Getov, University of Westminster, UK (Chair)
- Minyi Guo, Shanghai Jiao Tong University, China
- Ananth Kalyanaraman, Washington State University, USA
- Christine Morin, Inria, France
- Irene Qualters, Los Alamos National Laboratory, USA
- Satoshi Sekiguchi, National Institute of Industrial Science and Technology, Japan
- Min Si, Argonne National Laboratory, USA
- Yogesh Simmhan, Indian Institute of Science, Bangalore, India
- Edgar Solomonik, University of Illinois at Urbana-Champaign, USA
Note that members of the selection committee cannot be nominators or provide support letters.
Award Presentation Note: Awardees will be presented a plaque and will be recognized by IEEE Computer Society and TCHPC websites, newsletters and archives. The awards will be presented at the SC19 conference that will be held in Denver, CO, USA during November 18-21, 2019. Details of the conference can be found at http://sc19.supercomputing.org/.
For more information, please send email to tchpc-awards(a)computer.org.
The University of Westminster is a charity and a company limited by guarantee. Registration number: 977818 England. Registered Office: 309 Regent Street, London W1B 2HW.
This message and its attachments are private and confidential. If you have received this message in error, please notify the sender and remove it and its attachments from your system.
Apologies if you receive multiple copies of this email!
********** WORKS 2019 Workshop **********
14th Workflows in Support of Large-Scale Science Workshop
http://works.cs.cardiff.ac.uk/
Sunday 17 November 2019, Denver, CO
Held in conjunction with SC19, http://sc19.supercomputing.org/
Paper submission deadline: 26 August 2019
*****************************************
Call For Papers
Data-intensive Workflows (a.k.a. scientific workflows) are routinely used in
most scientific disciplines today, especially in the context of parallel and
distributed computing. Workflows provide a systematic way of describing the
analysis and rely on workflow management systems to execute the complex
analyses on a variety of distributed resources. They are at the interface
between end-users and computing infrastructures. With the dramatic increase
of raw data volume in every domain, they play an even more critical role to
assist scientists in organizing and processing their data and to leverage
HPC or HTC resources, e.g., workflows played an important role in the
discovery of Gravitational Waves.
This workshop focuses on the many facets of data-intensive workflow
management systems, ranging from job execution to service management and the
coordination of data, service and job dependencies. The workshop therefore
covers a broad range of issues in the scientific workflow lifecycle that
include: data-intensive workflows representation and enactment; designing
workflow composition interfaces; workflow mapping techniques that may
optimize the execution of the workflow; workflow enactment engines that need
to deal with failures in the application and execution environment; and a
number of computer science problems related to scientific workflows such as
semantic technologies, compiler methods, fault detection and tolerance.
The topics of the workshop include but are not limited to:
Big Data analytics workflows
Data-driven workflow processing (including stream-based workflows)
Workflow composition, tools, and languages
Workflow execution in distributed environments (including HPC, clouds, and
grids)
Reproducible computational research using workflows
Dynamic data dependent workflow systems solutions
Exascale computing with workflows
In Situ Data Analytics Workflows
Interactive workflows (including workflow steering)
Workflow fault-tolerance and recovery techniques
Workflow user environments, including portals
Workflow applications and their requirements
Adaptive workflows
Workflow optimizations (including scheduling and energy efficiency)
Performance analysis of workflows
Workflow debugging
Workflow provenance
*****************************************
Important Dates
Papers due: 26 August 2019 (EXTENDED)
Paper acceptance notification: 20 September 2019
E-copyright registration completed by authors: 1 October 2019
Camera-ready deadline: 1 October 2019
Submitted papers must be at most 10 pages long. The proceedings should be
formatted according to the IEEE format (see
https://www.ieee.org/conferences/publishing/templates.html). The 10-page
limit includes figures, tables, appendices and references. WORKS papers will
be published in cooperation with TCHPC and will be available from IEEE
digital repository.
*****************************************
WORKS 2019 Organizing Committee
– PC Chairs
Sandra Gesing, University of Notre Dame, USA
Rafael Ferreira da Silva, University of Southern California, USA
– General Chair
Ian J. Taylor, Cardiff University, UK and University of Notre Dame, USA
– Steering Committee
David Abramson, University of Queensland, Australia
Malcolm Atkinson, University of Edinburgh, UK
Ewa Deelman, USC, USA
Michela Taufer, University of Tennessee, USA
– Publicity Chairs
Ilia Pietri, Intracom SA Telecom Solutions, Greece
Hoang Anh Nguyen, University of Queensland, Australia
*****************************************
WORKS 2019 Program Committee (Tentative)
Pinar Alper, University Luxembourg, LU
Ilkay Altintas, San Diego Supercomputer Center, USA
Khalid Belhajjame, Universit. Paris-Dauphine, France
Ivona Brandic, TU Wien, Austria
Kris Bubendorfer, Victoria University of Wellington, New Zealand
Jesus Carretero, Universidad Carlos III de Madrid, Spain
Henri Casanova, University of Hawaii at Manoa, USA
Kyle Chard, University of Chicago, USA
Rafael Ferreira Da Silva, USC Information Sciences Institute, USA
Daniel Garijo, USC Information Sciences Institute, USA
Sandra Gesing, University of Notre Dame, USA
Daniel Katz, University of Illinois Urbana-Champaign, USA
Tamas Kiss, University of Westminster, UK
Dagmar Krefting, HTW Berlin, Germany
Maciej Malawski, AGH University of Science and Technology, Poland
Anirban Mandal, Renaissance Computing Institute, USA
Marta Mattoso, Federal Univ. Rio de Janeiro, Brazil
Jarek Nabrzyski, University of Notre Dame, USA
Hoang Anh Nguyen, University of Queensland, Australia
Daniel de Oliveira, Fluminense Federal University, Brazil
Radu Prodan, University of Klagenfurt, Austria
Ivan Rodero, Rutgers University, USA
Rizos Sakellariou, University of Manchester, UK
Frédéric Suter, CNRS, France
Domenico Talia, University of Calabria, Italy
Douglas Thain, University of Notre Dame, USA
Rafael Tolosana-Calasanz, Universidad de Zaragoza, Spain
Chase Wu, New Jersey Institute of Technology, USA
Registration closes Mon Aug 19, Abstracts for contributed talks
close Fri Aug 16 for:
Challenges in High Performance Computing
2-6 September 2019
Location:
Hanna Neumann Building (145),
The Australian National University,
Canberra, ACT, Australia
Website:
https://maths.anu.edu.au/news-events/events/challenges-high-performance-com…
About:
Scientific computing is often termed as the "third way to do science",
alongside theory and experiments. The focus of the workshop is to
investigate the current challenges of solving large scale problems on
high performance computers. To achieve optimal performance it is
critical to incorporate techniques that are at the forefront of both
the mathematical and computer sciences. Consequently, the workshop has
a strong multidisciplinary focus covering the five important areas of:
Algorithms, Applications, Middleware, Resilience and Software.
Each day of the conference will address one of these topics. A review
lecture will be given in the morning by an eminent researcher in that
area. Participants are invited to give more specialised talks in the
afternoon, followed by a discussion session.
The major aim of the workshop is to foster cooperation and
communication between members of each of these five different
communities, as well as to strongly encourage student participation.
Invited Speakers:
Algorithms: David Keyes, King Abdullah University of Science and Technology
Resilience: Ulrich Ruede,Friedrich-Alexander-University of Erlangen-Nuremberg
Software: Lois Curfman McInnes, Argonne National Laboratory
Applications: Raquel Salmeron, Airservices Australia
Middleware: George Boscila, University of Tennessee
Organising committee:
Brendan Harding, University of Adelaide
Stuart Hawkins, Macquarie University
Lilia Ferrario, Australian National University
Linda Stals, Australian National University
Peter Strazdins, Australian National University
Contact:
Brittany Joyce
admin.research.msi(a)anu.edu.au
Part of the Special Year 2019: Computational Mathematics
https://maths.anu.edu.au/news-events/event-series/special-year-2019-computa…
--
Regards, Peter
------------------------------------------------------------------------
Peter Strazdins, PhD GCHE, SIEEE SFHEA
Research School of Computer Science
ANU College of Engineering and Computer Science
CSIT Building 108, North Rd
The Australian National University, Canberra ACT 2601 AUSTRALIA
T: +61 2 6125 5140 F: +61 2 6125 0010
W: http://cs.anu.edu.au/~Peter.Strazdins
E: Peter.Strazdins(a)cs.anu.edu.au
------------------------------------------------------------------------
# JOURNAL ON DATA SEMANTICS
## SPECIAL ISSUE: BIG DATA SEMANTICS
https://homes.di.unimi.it/ceravolo/Call-BDS-JDS.pdf
### Call for papers
The complexity of Big Data applications in conjunction with the lack of standards for representing their
components, computations, and processes, have made the design of data-intensive applications a failure
prone and resource-intensive activity. One of the reasons behind it can be identified in a lack of sound
modeling practices. Indeed, multiple components and procedures must be coordinated to ensure a high level
of data quality and accessibility for the application layers, e.g. data analytics and reporting. We believe that a
major challenges of Big Data research requires - even more than developing new analytics - devising
innovative data management techniques capable to deliver functional and non-functional properties like among
others: data quality, data integration, metadata discovery, reconciliation and augmentation, model compliance,
or regulatory compliance.
Data Semantics research can address such challenges in future research according to the FAIR principles, for
implementing design procedures that generate Findable, Accessible, Interoperable, and Reusable data.
Methods, principles, and perspectives developed by the Data Semantics community can significantly
contribute to this goal. Solutions for integrating and querying schema-less data, for example, have received
much attention. Standards for metadata management have been proposed to improve data integration among
silos and to make data more discoverable and accessible through heterogeneous infrastructures. A further
level of application of Data Semantics principles into Big Data technologies involves Representing Processes,
i.e. representing the entire pipeline of technologies connected to achieve a specific solution and make this
representation shareable and verifiable to support a mature implementation of the Big Data production cycle.
This special issue of the Journal on Data Semantics aims at sharing research and practical achievements in
the field of Big Data integration, storage, and processing. Topics of interest for submission include, but are not limited to:
• Big Data Management
• Metadata Management
• Big Data Persistence and Preservation
• Big Data Quality and Provenance Control
• Big Data Storage and Retrieval
• Big Data Integration Architectures and Techniques
• Data Source Discovery
• Big Data Profiling and Semantics Discovery
• Querying Heterogeneous Big Data Repositories
• Caching and Materializing Query Results
• Quality of Big Data Services
• Big Data Service Performance Evaluation
• Big Data Service Reliability and Availability
• Reproducibility of Big Data Services
• Verifiability of Big Data Services
• Assurance in Big Data Services
• Big Data Visualization
• Real Time Visualisation
• Visualization Analytics for Big Data
• Big Social Media Mining
• Big Data Security and Privacy
• Big Data System Security and Integrity
• Big Data Information Security
• Privacy-Preserving Big Data Analytics
• Usable Security and Privacy for Big Data
• Performance of Big Data Architectures
• Query Optimization
• Optimal Selection of Analytics
• Physical Structures
## Guest Editors
Paolo Ceravolo, Università degli Studi di Milano, Italy
Robert Wrembel, Poznan University of Technology, Poland
Sylvio Barbon Junior, State University of Londrina, Brazil
## Editorial Board
Antonia Azzini, Consortium for the Technology Transfer (C2T), Italy
Clodis Boscarioli, State University of West Paraná - UNIOESTE, Brazil
Fadila Bentayeb, Université Lyon 2, France
Omar Boussaid, Université Lyon 2, France
Philippe Cudre-Mauroux, University of Fribourg, Switzerland
Jerome Darmont, Université Lyon 2, France
Luke Immes, University of Massachusetts Lowell, USA
Maurice van Keulen, University of Twente, The Netherlands
Mariangela Lazoi, University of Salento, Italy
Marcello Leida, StrabioDB, Spain
M. Teresa Gómez López, University of Seville, Spain
Azzam Mourad, Lebanese American University of Beirut, Lebanon
Jaroslav Pokorny, Charles University, Czech Republic
Kai-Uwe Sattler, TU Ilmenau, Germany
Darja Solodovnikova, University of Latvia, Latvia
Sean Wolfgand Matsui Siqueira, Federal University of Rio de Janeiro
State, Brazil
Fadi Zaraket, American University of Beirut, Lebanon
Bruno Bogaz Zarpelão, State University of Londrina, Brazil
## Timetable:
- 10 Nov 2019 - paper submission
- 25 Jan 2020 - author notification
- 15 Mar 2020 - revision submission
- 25 Apr 2020 - final acceptance notification
- 10 Jun 2020 - camera-ready submission
##Submission Guidelines
JoDS is looking for high-quality papers on any topic relevant to the journal, including regular papers, survey
papers, industry papers, short papers, position papers, and reports.
Submissions should contain original material that has not been submitted or published elsewhere. The
submission should include an abstract and keywords, authors, and specify which author serves as contact
author.
All submissions will be carefully reviewed by at least three experts.
Submissions have to be formatted according to the journal’s guidelines at
http://www.springer.com/13740
and have to be uploaded into Springer’s Electronic Management System at
https://www.editorialmanager.com/jods
JoDS is abstracted/indexed in: Google Scholar, DBLP, OCLC, Summon by ProQuest.
Selected sample articles are available at http://www.springer.com/13740
ISSN: 1861-2032 (print version)
ISSN: 1861-2040 (electronic version)
Any questions should be addressed to the Guest Editors
Paolo Ceravolo, paolo.ceravolo(a)unimi.it
Robert Wrembel, robert.wrembel(a)cs.put.poznan.pl
Sylvio Barbon Junior, barbon(a)uel.br
The Department of Computer Science at Hong Kong Baptist University,
presently offering BSc, MSc, MPhil, and PhD programmes, invites outstanding
applicants for the following position.
*Research Assistant Professor in Data Science and Engineering
(PR0059/19-20)*
The Research Assistant Professor position is created and funded as part of
the strategic research development initiatives in the Department. The
appointee will be provided with a conducive research environment, and will
work within an established group of faculty in the Department. He/she is
also expected to perform group-based high-impact research and to undertake
some teaching duties.
Applicants should possess a PhD degree in Computer Science, Computer
Engineering, Information Systems, or a related field, and demonstrate
abilities to conduct high-quality research in one of the following areas:
(i) data analytics and information management; (ii) data security and
privacy.
Initial appointment will be made on a fixed-term contract of two to three
years. Re-appointment thereafter will be subject to mutual agreement.
For enquiry, please contact Prof Jianliang Xu (email: xujl(a)comp.hkbu.edu.hk.
More information about the Department can be found on its website (
http://www.comp.hkbu.edu.hk).
*Salary will be commensurate with qualifications and experience.*
*Application Procedure:*
Applicants are invited to submit their applications at the HKBU
e-Recruitment System (jobs.hkbu.edu.hk) with samples of publications,
preferably three best ones out of their most recent publications/works.
Applicants should also request two referees to send in confidential letters
of reference, with *PR* number (stated above) quoted on the letters, to the
Personnel Office (Email: recruit(a)hkbu.edu.hk) direct. Those who are not
invited for interview four months after the closing date may consider their
applications unsuccessful. All application materials including publication
samples, scholarly/creative works will be disposed of after completion of
the recruitment exercise. Details of the University's Personal Information
Collection Statement can be found at http://pers.hkbu.edu.hk/pics.
The University reserves the right not to make an appointment for the post
advertised, and the appointment will be made according to the terms and
conditions then applicable at the time of offer.
*Closing date: 30 August 2019 (or until the position is filled)*
URL: https://www.comp.hkbu.edu.hk/v1/?page=job_vacancies&id=532