May 2018 - computational.science

Call for Papers: ScalA@SC 2017 - Papers due August 28
by Engelmann, Christian 04 Nov '20

04 Nov '20

We apologize if you receive multiple copies of this notice. ----------------------------------------------------------------------------- ScalA’17: 8th Workshop on Latest Advances in Scalable Algorithms for Large-Scale Systems held in conjunction with the SC17: The International Conference on High Performance Computing, Networking, Storage and Analysis in cooperation with ACM SIGHPC November 13, 2017, Denver, CO, USA <http://www.csm.ornl.gov/srt/conferences/Scala/2017> Novel scalable scientific algorithms are needed in order to enable key science applications to exploit the computational power of large-scale systems. This is especially true for the current tier of leading petascale machines and the road to exascale computing as HPC systems continue to scale up in compute node and processor core count. These extreme-scale systems require novel scientific algorithms to hide network and memory latency, have very high computation/communication overlap, have minimal communication, and have no synchronization points. Scientific algorithms for multi-petaflop and exa-flop systems also need to be fault tolerant and fault resilient, since the probability of faults increases with scale. Resilience at the system software and at the algorithmic level is needed as a crosscutting effort. Finally, with the advent of heterogeneous compute nodes that employ standard processors as well as GPGPUs, scientific algorithms need to match these architectures to extract the most performance. This includes different system-specific levels of parallelism as well as co-scheduling of computation. Key science applications require novel mathematical models and system software that address the scalability and resilience challenges of current- and future-generation extreme-scale HPC systems. Submission Guidelines Authors are invited to submit manuscripts in English structured as technical papers not exceeding 8 letter size (8.5in x 11in) pages including figures, tables, and references using the ACM format for conference proceedings. Submissions not conforming to these guidelines may be returned without review. Reference style files are available at <http://www.acm.org/sigs/publications/proceedings-templates>. All manuscripts will be reviewed and judged on correctness, originality, technical strength, and significance, quality of presentation, and interest and relevance to the workshop attendees. Submitted papers must represent original unpublished research that is not currently under review for any other conference or journal. Papers not following these guidelines will be rejected without review and further action may be taken, including (but not limited to) notifications sent to the heads of the institutions of the authors and sponsors of the conference. Submissions received after the due date, exceeding length limit, or not appropriately structured may also not be considered. At least one author of an accepted paper must register for and attend the workshop. Authors may contact the workshop program chair for more information. Papers should be submitted electronically at: <https://easychair.org/conferences/?conf=scala17>. Full papers will be published with the SC'17 workshop proceedings in the ACM Digital Library and IEEE Xplore. Selected papers will be invited for an extended version in a special issue of the Journal of Computational Science (JoCS). Important Dates - Full paper submission: August 28, 2017 - Notification of acceptance: September 11, 2017 - Final paper submission (firm): October 9, 2017 - Workshop/conference early registration: TBD - Workshop: November 13, 2017 Topics of interest include, but are not limited to: - Novel scientific algorithms that improve performance, scalability, resilience, and power efficiency - Porting scientific algorithms and applications to many-core and heterogeneous architectures - Performance and resilience limitations of scientific algorithms and applications at scale - Crosscutting approaches (system software and applications) in addressing scalability challenges - Scientific algorithms that can exploit extreme concurrency (e.g. 1 billion for exascale by 2020) - Naturally fault tolerant, self-healing, or fault oblivious scientific algorithms - Programming model and system software support for algorithm scalability and resilience Workshop Chairs - Vassil Alexandrov, Barcelona Supercomputing Center, Spain - Al Geist, Oak Ridge National Laboratory, USA - Jack Dongarra, University of Tennessee, Knoxville, USA Workshop Program Chair - Christian Engelmann, Oak Ridge National Laboratory, USA Program Committee - Vassil Alexandrov, Barcelona Supercomputing Center, Spain - Hartwig Anzt, University of Tennessee, Knoxville, USA - Rick Archibald, Oak Ridge National Laboratory, USA - Franck Cappello, Argonne National Laboratory and University of Illinois at Urbana Champaign, USA - Zizhong Chen, University of California, Riverside, USA - James Elliott, Sandia National Laboratories, USA - Nahid Emad, University of Versailles SQ, France - Christian Engelmann, Oak Ridge National Laboratory, USA - Wilfried Gansterer, University of Vienna, Austria - Michael Heroux, Sandia National Laboratories, USA - Kirk E. Jordan, IBM T.J. Watson Research, USA - Dieter Kranzlmueller, Ludwig-Maximilians-University Munich, Germany - Ignacio Laguna, Lawrence Livermore National Laboratory, USA - Piotr Luszczek, University of Tennessee, Knoxville, USA - Michael Mascagni, Florida State University, USA - Ron Perrot, University of Oxford, UK - Yves Robert, ENS Lyon, France - Stuart Slattery, Oak Ridge National Laboratory, USA - Keita Teranishi, Sandia National Laboratories, USA -- Christian Engelmann, Ph.D. R&D Staff Scientist Computer Science Research Group Computer Science and Mathematics Division Oak Ridge National Laboratory Mail: P.O. Box 2008, Oak Ridge, TN 37831-6173, USA Phone: +1 (865) 574-3132 / Fax: +1 (865) 576-5491 e-Mail: engelmannc(a)ornl.gov / Home: www.christian-engelmann.info

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CFP: Resilience@Euro-Par 2017 - Papers due May 5
by Christian Engelmann 08 May '19

08 May '19

We apologize if you receive multiple copies of this call for papers. -------------------------------------------------------------------------------- 10th Workshop on Resiliency in High Performance Computing (Resilience) in Clusters, Clouds, and Grids <http://www.csm.ornl.gov/srt/conferences/Resilience/2017> in conjunction with the 23rd International European Conference on Parallel and Distributed Computing (Euro-Par), Santiago de Compostela, Spain, August 28 - September 1, 2017 <http://europar2017.usc.es> Overview: Resilience is a critical challenge as high performance computing (HPC) systems continue to increase component counts, individual component reliability decreases (such as due to shrinking process technology and near-threshold voltage (NTV) operation), and software complexity increases. Application correctness and execution efficiency, in spite of frequent faults, errors, and failures, is essential to ensure the success of the extreme-scale HPC systems, cluster computing environments, Grid computing infrastructures, and Cloud computing services. While a fault (e.g., a bug or stuck bit) is the cause of an error, its manifestation as a state change is considered an error (e.g., a bad value or incorrect execution), and the transition to an incorrect service is observed as a failure (e.g., an application abort or system crash). A failure in a computing system is typically observed through an application abort or a full/partial service or system outage. A detectable correctable error is often transparently handled by hardware, such as a single bit flip in memory that is protected with single-error correction double-error detection (SECDED) error correcting code (ECC). A detectable uncorrectable error (DUE) typically results in a failure, such as multiple bit flips in the same addressable word that escape SECDED ECC correction, but not detection, and ultimately cause an application abort. An undetectable error (UE) may result in silent data corruption (SDC), e.g., an incorrect application output. There are many other types of hardware and software faults, errors, and failures in computing systems. Resilience for HPC systems encompasses a wide spectrum of fundamental and applied research and development, including theoretical foundations, fault detection and prediction, monitoring and control, end-to-end data integrity, enabling infrastructure, and resilient solvers and algorithm-based fault tolerance. This workshop brings together experts in the community to further research and development in HPC resilience and to facilitate exchanges across the computational paradigms of extreme-scale HPC, cluster computing, Grid computing, and Cloud computing. Submission Guidelines: Authors are invited to submit papers electronically in English in PDF format. Submitted manuscripts should be structured as technical papers and BETWEEN 10 AND 12 PAGES, including figures, tables and references, using Springer's Lecture Notes in Computer Science (LNCS) format at <http://www.springer.com/computer/lncs?SGWID=0-164-6-793341-0>. Papers with less than 10 or more than 12 pages will not be accepted due to publisher guidelines. Submissions should include abstract, key words and the e-mail address of the corresponding author. Papers not conforming to these guidelines may be returned without review. All manuscripts will be reviewed and will be judged on correctness, originality, technical strength, significance, quality of presentation, and interest and relevance to the conference attendees. Submitted papers must represent original unpublished research that is not currently under review for any other conference or journal. Papers not following these guidelines will be rejected without review and further action may be taken, including (but not limited to) notifications sent to the heads of the institutions of the authors and sponsors of the conference. Submissions received after the due date or not appropriately structured may also not be considered. The proceedings will be published in Springer's LNCS as post-conference proceedings. At least one author of an accepted paper must register for and attend the workshop for inclusion in the proceedings. Authors may contact the workshop program chairs for more information. Important websites: - Resilience 2017 Website: <http://www.csm.ornl.gov/srt/conferences/Resilience/2017> - Resilience 2017 Submissions: <https://easychair.org/conferences/?conf=europar2017workshops> - Euro-Par 2017 website: <http://europar2017.usc.es> Topics of interest include, but are not limited to: - Theoretical foundations for resilience: - Metrics and measurement - Statistics and optimization - Simulation and emulation - Formal methods - Efficiency modeling and uncertainty quantification - Fault detection and prediction: - Statistical analyses - Machine learning - Anomaly detection - Data and information collection - Visualization - Monitoring and control for resilience: - Platform and application monitoring - Response and recovery - RAS theory and performability - Application and platform knobs - Tunable fidelity and quality of service - End-to-end data integrity: - Fault tolerant design - Degraded modes - Forward migration and verification - Fault injection - Soft errors - Silent data corruption - Enabling infrastructure for resilience: - RAS systems - System software and middleware - Programming models - Tools - Next-generation architectures - Resilient solvers and algorithm-based fault tolerance: - Algorithmic detection and correction of hard and soft faults - Resilient algorithms - Fault tolerant numerical methods - Robust iterative algorithms - Scalability of resilient solvers and algorithm-based fault tolerance Important Dates: - Workshop papers due: May 5, 2017 - Workshop author notification: June 16, 2017 - Workshop early registration: TBD - Workshop paper (for informal workshop proceedings): July 21, 2017 - Workshop camera-ready papers: October 3, 2017 General Co-Chairs: - Stephen L. Scott Senior Research Scientist - Systems Research Team Tennessee Tech University and Oak Ridge National Laboratory, USA scottsl(a)ornl.gov - Chokchai (Box) Leangsuksun, SWEPCO Endowed Associate Professor of Computer Science Louisiana Tech University, USA box(a)latech.edu Program Co-Chairs: - Patrick G. Bridges University of New Mexico, USA bridges(a)cs.unm.edu - Christian Engelmann Oak Ridge National Laboratory , USA engelmannc(a)ornl.gov Program Committee: - Ferrol Aderholdt, Oak Ridge National Laboratory, USA - Dorian Arnold, University of New Mexico, USA - Rizwan Ashraf, Oak Ridge National Laboratory, USA - Wesley Bland, Intel Corporation, USA - Hans-Joachim Bungartz, Technical University of Munich, Germany - Franck Cappello, Argonne National Laboratory and University of Illinois at Urbana-Champaign, USA - Marc Casas, Barcelona Supercomputer Center, Spain - Zizhong Chen, University of California at Riverside, USA - Robert Clay, Sandia National Laboratories, USA - Miguel Correia, Universidade de Lisboa, Portugal - Nathan DeBardeleben, Los Alamos National Laboratory, USA - James Elliott, Sandia National Laboratories, USA - Kurt Ferreira, Sandia National Laboratories, USA - Michael Heroux, Sandia National Laboratories, USA - Saurabh Hukerikar, Oak Ridge National Laboratory, USA - Dieter Kranzlmueller, Ludwig-Maximilians University of Munich, Germany - Sriram Krishnamoorthy, Pacific Northwest National Laboratory, USA - Ignacio Laguna, Lawrence Livermore National Laboratory, USA - Scott Levy, University of New Mexico, USA - Kathryn Mohror, Lawrence Livermore National Laboratory, USA - Christine Morin, INRIA Rennes, France - Dirk Pflueger, University of Stuttgart, Germany - Nageswara Rao, Oak Ridge National Laboratory, USA - Alexander Reinefeld, Zuse Institute Berlin, Germany - Rolf Riesen, Intel Corporation, USA - Yves Robert, ENS Lyon, France - Thomas Ropars, Universite Grenoble Alpes, France - Martin Schulz, Lawrence Livermore National Laboratory, USA - Keita Teranishi, Sandia National Laboratories, USA -- Christian Engelmann, Ph.D. R&D Staff Scientist Computer Science Research Group Computer Science and Mathematics Division Oak Ridge National Laboratory Mail: P.O. Box 2008, Oak Ridge, TN 37831-6173, USA Phone: +1 (865) 574-3132 / Fax: +1 (865) 576-5491 e-Mail: engelmannc(a)ornl.gov / Home: www.christian-engelmann.info

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IEEE HPCS Workshop on High Performance Computing Systems for Bioinformatics and Life Sciences (BILIS 2017) - Ext Deadline
by Mario Cannataro 03 Oct '18

03 Oct '18

I apologize for any cross-posting of this announcement. ======================================================================================== Int. Workshop on High Performance Computing Systems for Bioinformatics and Life Sciences (BILIS 2017) http://hpcs2017.cisedu.info/conference/workshops---hpcs2017/workshop17-bilis July 17 – July 21, 2017 Genoa, Italy held in conjunction with International Conference on High Performance Computing & Simulation (HPCS 2017) http://hpcs17.cisedu.info/ ======================================================================================== * * * CALL FOR PAPERS * * * EXTENDED Submission Deadline: April 15, 2017 Submissions could be for full papers, short papers, poster papers, or posters ======================================================================================== IMPORTANT DATES Paper Submissions: --------------------------------- April 15, 2017 - Extended Acceptance Notification: --------------------------- April 28, 2017 Camera Ready Papers and Registration Due by: ------- May 11, 2017 Conference Dates: --------------------------------- July 17 – 21, 2017 ======================================================================================== SCOPE AND OBJECTIVES Incorporating new advancements of Information Technology (IT) in general and High Performance Computing (HPC) in particular in the domain of Life Sciences and Biomedical Research continues to receive tremendous attention of researchers, biomedical institutions and the rest of the biomedical community. Although medical instruments have benefited a great deal from the technological advances of the couple of decades, the impact of integrating IT advancements in addressing critical problems in biomedical research remains limited and the process of penetrating IT tools in the medical profession continues to be a very challenging problem. For example, the use of electronic medical records and Hospital Information Systems in improving health care remains fragmented. Similarly, the use of advanced computational tools seamlessly in the biomedical research cycle continues to be minimal. Due to the computational intensive problems in life sciences, the marriage between the Bioinformatics domain and high performance computing is critical to the advancement of Biosciences. In addition, the problems in this domain tend to be highly parallelizable and deal with large datasets, hence using HPC is a natural fit. The Bioinformatics domain is rich in applications that require extracting useful information from very large and continuously growing sequence of databases. Most methods used for analyzing DNA/Protein sequences are known to be computationally intensive, providing motivation for the use of powerful computational systems with high throughput characteristics. Moreover, high-throughput wet lab platforms such as next generation sequencing, microarray and mass spectrometry, are producing a huge amount of experimental "omics" data. The increasing availability of omics data poses new challenges to bioinformatics applications that need to face in a semi-automatic way an overwhelming availability of raw data. Main challenges regard: 1) the efficient storage, retrieval and integration of experimental data; 2) their efficient and high-throughput preprocessing and analysis; 3) the building of reproducible "in silico" experiments; 4) the integration of analysis results with pre-existing knowledge usually stored into ontologies. As the storage, preprocessing and analysis of raw experimental data is becoming the main bottleneck of the analysis pipeline, parallel computing is playing an important role in all steps of the life sciences research pipeline, from raw data management and processing, to data integration and analysis, and to data exploration and visualization. Moreover, Cloud Computing is becoming the key technology to hide the complexity of computing infrastructures, to reduce the cost of the data analysis task, and especially to change the overall business model of biomedical research and health provision. Considering the complex analysis pipeline of the biomedical research, the bottleneck is more and more moving toward the storage, integration, and analysis of experimental data, as well as their correlation and integration with publicly available data banks In such a scenario, large-scale distributed databases and parallel bioinformatics tools are key tools for organizing and exploring biological and biomedical data with the aim to discover new knowledge in biology and medicine. In the current Information age, further progress of Medical Sciences requires successful integration with Computational and Information Sciences. The workshop attempts to attract innovative ways of how such integration can be achieved via Bioinformatics and Biomedical Informatics research, particularly in taking advantage of the new advancements in HPC systems. The focus of data analysis and data mining tools in biomedical research highlights the current state of research in the key biomedical research areas such as bioinformatics, medical informatics and biomedical imaging. Addressing performance concerns in managing and accessing medical data, while facilitating the ability to integrate and correlate different biomedical databases remains an outstanding problem in biomedical research. The amount of available biomedical data continues to grow in an exponential rate; however, the impact of utilizing such resources remains minimal. The development of innovative tools in HPC environments to integrate, analyze and mine such data sources is a key step towards achieving large impact levels. The workshop focuses on topics related to the utilization of HPC systems and new models of parallel computing and cloud computing in problems related to Biomedical Informatics and Life Sciences, along with the use of data integration and data mining tools to support biomedical research and Health Care. The BILIS Workshop topics include (but are not limited to) the following: HPC for the Analysis of Biological Data Bioinformatics Tools for Health Care Parallel Algorithms for Bioinformatics Applications Ontologies in Biology and Medicine Integration and Analysis of Molecular and Clinical Data Parallel Bioinformatics Algorithms Algorithms and Tools for Biomedical Imaging and Medical Signal Processing Energy Aware Scheduling Techniques for Large Scale Biomedical Applications HPC for analyzing Biological Networks Next Generation Sequencing and Advanced Tools for DNA Assembly HPC for Gene, Protein/RNA Analysis and Structure Prediction Identification of Biomarkers Biomedical Visualization Tools Efficient Clustering and Classification Algorithms Correlation Networks in Biomedical Research Data Mining Techniques in Biomedical Applications Heterogeneous Data Integration HPC systems for Ontology and Database Integration Pattern Recognition and Search Tools in Biological and Clinical Databases Ubiquitous Medical Knowledge Discovery and Exchange HPC for Monitoring and Treatment Facilities Drug Design and Modeling Computer Assisted Surgery and Medical Procedures Remote Patient Monitoring, Homecare Applications Mobile and Wireless Healthcare and Biomedical Applications Cloud Computing for Bioinformatics, Medicine, and Health Systems INSTRUCTIONS FOR PAPER SUBMISSIONS You are invited to submit original and unpublished research works on above and other topics related to HPC for Bioinformatics, Healthcare and Life Sciences. Submitted papers must not have been published or simultaneously submitted elsewhere. For Regular papers, please submit a PDF copy of your full manuscript, not to exceed 8 double-column formatted pages per template, and include up to 6 keywords and an abstract of no more than 400 words. Additional pages will be charged additional fee. Submission should include a cover page with authors' names, affiliation addresses, fax numbers, phone numbers, and all authors email addresses. Please, indicate clearly the corresponding author(s) although all authors are equally responsible for the manuscript. Short papers (up to 4 pages), poster papers and posters (please refer to http://hpcs2017.cisedu.info/1-call-for-papers-and-participation/call-for-po… for posters submission details) will also be considered. Please specify the type of submission you have. Please include page numbers on all preliminary submissions to make it easier for reviewers to provide helpful comments. Submit a PDF copy of your full manuscript to the workshop organizers via email as attachments to Hesham Ali: hali(a)unomaha.edu, Mario Cannataro: cannataro(a)unicz.it. Acknowledgement will be sent within 48 hours of submission. Only PDF files will be accepted, uploaded to the submission link above. Each paper will receive a minimum of three reviews. Papers will be selected based on their originality, relevance, significance, technical clarity and presentation, language, and references. Submission implies the willingness of at least one of the authors to register and present the paper, if accepted. At least one of the authors of each accepted paper will have to register and attend the HPCS 2017 conference to present the paper at the workshop. PROCEEDINGS Accepted papers will be published in the Conference proceedings. Instructions for final manuscript format and requirements will be posted on the HPCS 2017 Conference web site. It is our intent to have the proceedings formally published in hard and soft copies and be available at the time of the conference. The proceedings is projected to be included in the IEEE or ACM Digital Library and indexed in all major indexing services accordingly. SPECIAL ISSUE Plans are underway to have the best papers, in extended version, selected for possible publication in a journal as special issue. Detailed information will soon be announced and will be made available on the conference website. If you have any questions about paper submission or the workshop, please contact the workshop organizers. IMPORTANT DATES Paper Submissions: ------------------------------------ April 15, 2017 - Extended Acceptance Notification: ------------------------------ April 28, 2017 Camera Ready Papers and Registration Due by: ---------- May 11, 2017 Conference Dates: ------------------------------------ July 17 – 21, 2017 WORKSHOP ORGANIZERS Prof. Hesham H. Ali Department of Computer Science College of Information Science and Technology University of Nebraska at Omaha Omaha, NE 68182 USA Email: hesham(a)unomaha.edu Prof. Mario Cannataro Department of Medical and Surgical Sciences University "Magna Græcia" of Catanzaro Viale Europa (Località Germaneto) 88100 Catanzaro, Italy Email: cannataro(a)unicz.it

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Open PostDoc position at LBNL for Machine learning applications and Networks
by Mariam Kiran 30 May '18

30 May '18

Dear All, I am reaching out for help publicizing the post doc position open with our group. We are looking for new members to join our team at Lawrence Berkeley National Lab!. The position is shared between the Computer Research Division (http://crd.lbl.gov/departments/data-science-and-technology/sdm/) and Energy Sciences Network (http://es.net/) The position is in the area of developing machine learning solutions for wide area networks. The direct link to the posting may be found here: http://m.rfer.us/LBLfQ6cv Can you please help forward to any interested candidates? Questions can be sent to Mariam Kiran <mkiran(a)lbl.gov> Thankyou in advance, Mariam

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CFP: 11th IEEE/ACM International Conference on Utility and Cloud Computing (December 17-20, 2018, Zurich, Switzerland)
by Цымблер Михаил Леонидович 29 May '18

29 May '18

Do not miss the opportunity for discussing a full week of cloud and big data advances in central Europe at the end of the year on the 11th IEEE/ACM International Conference on Utility and Cloud Computing (UCC 2018)! The conference would take place December 17-20, 2018 in Zurich, Switzerland (http://ucc-conference.org/) IMPORTANT DATES * 01 August, 2018 is a deadline for: - Main conference paper submissions - Tutorial proposals - Cloud Challenge proposals - Doctoral Research Papers * Poster submissions due: 01 September, 2018 * Notification of acceptance for main papers: 15 September, 2018 * Camera ready papers due: 08 October, 2018 * Early and author registration deadline: 08 October, 2018 * Conference: 17-20 December 2018 CONTEXT AND SCOPE UCC is the premier IEEE/ACM conference covering all areas related to Cloud Computing as a Utility and provides an international forum for leading researchers and practitioners in this important and growing field. UCC 2018, to be held in Zurich, Switzerland, reflects the need to bring academics and industrial researchers together to discuss how to improve existing services and how to bring new applications into the cloud. UCC 2018 will have a co-located 5th International Conference on Big Data Computing, Applications and Technologies (BDCAT 2018, http://bdcat-conference.org/) an embedded Cloud Challenge and a subsequent Serverless Symposium. WORKSHOPS [http://ucc-conference.org/workshops.html] Nine workshops are confirmed to take place in conjunction with the main conference: * 7th International Workshop on Clouds and (eScience) Applications Management - CloudAM 2018 * 5th International Workshop on Smart City Clouds: Technologies, Systems and Applications - SCCTSA 2018. Submission deadline: July 31, 2018 * 4th International Workshop on Serverless Computing - WoSC 2018 * 3rd International Workshop on Trust in Cloud Computing - IWTCC 2018. Submission deadline: July 30, 2018 * 1st Industry/University Joint International Workshop on Data-center Automation and Software Provisioning - DCASP 2018 * 1st Workshop on Quality Assurance in the Context of Cloud Computing - QA3C 2018. Submission deadline: September 3, 2018 * 1st Workshop on Managed Fog-to-Cloud - mF2C 2018. Submission deadline: August 1, 2018 * 1st Workshop on Cloud-Native Applications Design and Experience - CNAX 2018. Submission deadline: September 1, 2018 * 1st Workshop on Big Data Analytics for Sustainable Environments - BDASE 2018. Submission deadline: August 1, 2018 All the additional information on the workshops is available on the conference website: http://ucc-conference.org/workshops.html TOPICS OF INTEREST UCC Conference topics of interest include but are not limited to: * Architectural models to achieve Utility in Clouds * Cloud business and legal implications beyond technology * Cloud Computing middleware, stacks, tools, delivery networks and services at all layers (XaaS) * Cloud large-scale foundations for Big Data, IoT, and real-time analytics * Cloud management: autonomic, adaptive, self-*, SLAs, and monitoring * Cloud-native application design and engineering * Cloud, Fog and edge/mobile devices management, hierarchy models, and business models * Designs and deployment models for Clouds: private, public, hybrid, federated, aggregated * Economic and business models of Clouds and services * HPC and the Cloud * Innovative cloud applications and experiences * Integration of Cloud systems with edge and IoT devices * Mobile and energy-efficient use of Clouds * Networking for clouds and data centres * Performance analysis and modeling of cloud systems and applications * Policy languages and programming models * Principles and theoretical foundations of Utility Computing * Resource management and scalability: brokering, scheduling, capacity planning, and elasticity * Security, trust and privacy in Clouds * Utility-driven platforms for Clouds * Utility-driven models and mechanisms for interclouds / federations * Virtualization, containerization, composition, orchestration and other enablers CALL FOR PAPERS [http://ucc-conference.org/pages/ucc-2018-call-for-papers.html] Authors are invited to submit original unpublished research manuscripts that demonstrate current research in all areas of Cloud and Utility as well as Big Data computing, including design and analysis of distributed and centralized Cloud systems, data centre design and engineering, economic and market models for cloud systems, revenue and business models and their applications in scientific and commercial deployments. Submitted manuscripts should be structured as technical papers and may not exceed ten (10) single-spaced double-column pages using 10-point size font on 8.5x11 inch pages, IEEE conference style, including figures, tables, and references. The proceedings will be published by the IEEE Computer Society and will be made available online through the IEEE Digital Library, as well as through the ACM Digital Library. Authors should submit the manuscript in PDF format. All manuscripts will be reviewed and will be judged on correctness, originality, technical strength, rigour in analysis, quality of results, quality of presentation, and interest and relevance to the conference attendees. Papers conforming to the above guidelines can be submitted through the UCC 2018 paper submission system: https://easychair.org/conferences/?conf=ucc2018 Submitted papers must represent original unpublished research that is not currently under review for any other conference or journal. Further details on the publication instructions and registration information will be published on the UCC website. We invite you to visit the Call for Papers page for more information: http://ucc-conference.org/pages/ucc-2018-call-for-papers.html

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JIST2018:The 8th Joint International Semantic Technology Conference (Nov. 26-28, Awaji City, Hyogo, Japan)
by Kouji Kozaki 28 May '18

28 May '18

-------------------------------------------------------------------- *** Call for Papers: JIST 2018 Regular Technical Papers *** JIST2018:The 8th Joint International Semantic Technology Conference Nov. 26-28, 2018, Awaji City, Hyogo, Japan. http://jist2018.knowledge-graph.jp < Paper submission due: 10 August, 2018 > -------------------------------------------------------------------- The mission of the Joint International Semantic Technology Conference (JIST) is to bring together researchers in the Semantic Technology research community and other areas of semantic-related technologies to present their innovative research results or novel applications of semantic technologies. There are two tracks in JIST 2018 for Regular Technical Papers. *** Research Track *** JIST 2018 research track solicits submissions of original research work on semantic technologies. Topics of interest include, but are not limited to: -Ontology and reasoning -Knowledge Graphs -Linked Data -Big Data and semantics, exchange and integration -Data streams and the Internet of Things -Machine learning and information extraction on the Semantic Web -Semantic Web services and processes -Trust, privacy, and security on the Semantic Web -Social Semantic Web -Natural language processing and semantics -Semantic multimedia -Novel applications of semantic technologies *** Special Session Track *** JIST 2018 special session track to discover and implement special topics that researchers in Semantic Technology are particularly interested in. We also intend to facilitate participation of potentially-related researchers in the JIST conference. Topics of special sessions are as follows: - Special Session on Government Open Data http://jist2018.knowledge-graph.jp/pages/calls/government_open_data.html - Special Session on Question Answering and ChatBots http://jist2018.knowledge-graph.jp/pages/calls/qa_chatbots.html - Special Session on Resource-aware Semantic Technologies http://jist2018.knowledge-graph.jp/pages/calls/resource-aware_semantic_tech… - Special Session on Semantic Web for Life Sciences http://jist2018.knowledge-graph.jp/pages/calls/sw_for_life_sciences.html *** Important Dates *** -Abstract submission: 23:59 (Hawaii Time), 3 August, 2018 -Full paper submission: 23:59 (Hawaii Time), 10 August, 2018 -Notification of Acceptance: 14 September, 2018 -Camera-ready Deadline: 28 September, 2018 -Conference: 26-28 November, 2018 *** Submission *** Submissions to JIST 2018 should describe original, significant research on semantic technologies. JIST 2018 will not accept submissions that are under review for or have already been published in or accepted for publication in a journal or another conference. Submissions to JIST 2018 are expected to present their claimed contribution, with clear evidence to support their claims. All submissions will be critically reviewed by at least three members of the program committee of either research track or special session track. To assess submissions, reviewers will judge their relevance to semantic technologies, their originality, the technical soundness of their proposed approach and the readability of the submission. JIST 2018 submissions are not anonymous. Submissions must be in PDF format, using the style of the Springer Publications format for Lecture Notes in Computer Science (LNCS). Regular paper submissions must be no longer than 16 pages, and short paper submissions must be no longer than 8 pages. Submissions that exceed this limit may be rejected without review. Accepted papers of both research track and special session track will be published in an LNCS proceedings. At least one author of each accepted paper must register for the conference and present the paper there. Papers can be submitted electronically via EasyChair. https://easychair.org/conferences/?conf=jist2018 * Please select the corresponding track(s) when you submit your paper(s). *** Organizing Committee *** -General Chairs Stephen Muggleton, Imperial College London, UK Kouji Kozaki, Osaka University, Japan -Program Chairs Ryutaro Ichise, National Institute of Informatics, Japan -Special Session Track Chairs Dongyan Zhao, Peking University, China Takahiro Kawamura, Japan Science and Technology Agency, Japan -Local Organizing Chair Atsuko Yamaguchi, Database Center for Life Science, Japan -Poster and Demo Chairs Hanmin Jung, KISTI, Korea Shinichi Nagano, TOSHIBA corp., Japan -Workshop Chairs Marut Buranarach, NECTEC, Thailand Ikki Omukai, National Institute of Informatics, Japan -Tutorial Chairs Naoki Fukuta, Shizuoka University, Japan -Sponsorship Chair Takanori Ugai, Fujitsu Laboratories, Japan -Publicity Chairs Takeshi Morita, Keio University, Japan Guohui Xiao, Free University of Bozen-Bolzano, Italy -------------------------------------------------------------------- JIST 2018 Organize Committee Website: http://jist2018.knowledge-graph.jp/ Twitter: @jist2018 Contact: JIST2018<at>knowledge-graph.jp

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Call for Papers (due June 15) and Workshops announced: 25th IEEE Intl Conf on High Performance Computing, Data, and Analytics (HiPC 2018)
by Anand Panangadan 27 May '18

27 May '18

------------------------------------------------------------ ------------------------------------ 25th IEEE International Conference on High Performance Computing, Data, and Analytics (HiPC 2018) December 17-20, 2018 Bengaluru, India www.hipc.org ------------------------------------------------------------ ------------------------------------ - CALL FOR PAPERS - CALL FOR WORKSHOP PAPERS CALL FOR PAPERS 2018 marks the Silver Anniversary of HiPC as we broaden the technical program to specifically include topics related to data science. The conference has a history of attracting participation from reputed researchers from all over the world and receives strong industry support from companies operating globally and also established in India. In addition to the two days of industry exhibits, the sponsoring partners to the conference hold industry symposiums to bring together providers and users of HPC in a forum for presenting state-of-the-art in HPC platforms and technologies, for discussing best practices, and for exchanging experiences. In the last couple years, HiPC has added workshops to its technical program and along with a Student Research Symposium and academic Birds-of-a-Feather sessions, and the conference makes room for a broad list of topics to be addressed in these tracks: Algorithms Architectures Applications DATA SCIENCE: Big Data Algorithms and Analytics Big Data Systems and Software One or more best paper awards will be given for outstanding contributed papers. Authors of selected high quality papers in HiPC 2018 will be invited to submit an extended version of their papers for possible publication in a special issue of Journal of Parallel and Distributed Computing. PROGRAM CHAIRS - Olivier Beaumont, Inria, France (High Performance Computing) - Srinivas Aluru, Georgia Institute of Technology, USA (Data Science) PROGRAM VICE-CHAIRS - Algorithms: Ananth Kalyanaraman Washington State University - Applications: Yogish Sabharwal, IBM Research – India - Architecture: Abdou Guermouche, University of Bordeaux - System Software: Judith Hill, Oak Ridge National Laboratory - Big Data Algorithms and Analytics: Jun (Luke) Huan, University of Kansas - Big Data Systems and Software: Lisa Singh, Georgetown University IMPORTANT DATES FOR HiPC 2018 •June 8..................Abstracts Due •June 15................Paper Submission Deadline •August 8-15........Rebuttals •September 7.......Author Notification •October 3...........Camera Ready Submission Full information on what/where to submit is available at http://hipc.org/call-for-papers/ ------------------------------------------------------------ ------------------------------------ CALL FOR WORKSHOP PAPERS Complementing the main technical program, HiPC workshops serve to broaden the technical scope of the conference in emerging areas of high performance computing, communication, data and analytics and their applications. Below is the listing of the workshops to be held on the first day of the conference, December 17. • Fourth Workshop on Computational Fluid Dynamics (CFD) • Workshop on Artificial Intelligence Meets Blockchain (AIMB) • First Workshop on the Convergence of High Performance Computing and Artificial Intelligence • Women in Data Science and High Performance Computing • Parallel Fast Fourier Transforms The papers accepted for presentation in HiPC 2018 workshops will be included in the "workshops volume" of the proceedings of the conference, which will be distributed online in two volumes with a separate ISBN for the workshops (HiPCW 2018). Post conference, papers presented at the conference and eligible for inclusion will be submitted to the IEEE Xplore Digital Library. See details at http://hipc.org/workshops for workshop paper submission deadlines and formatting requirements. Workshops Co-Chairs • Anthony Simonet, Rutgers University, USA • Manish Parashar, Rutgers University, USA (Workshops co-chairs may be contacted at workshops(a)hipc.org) ------------------------------------------------------------ ------------------------------------ HiPC 2017 ORGANIZATION GENERAL CO-CHAIRS Chiranjib Sur, Shell India Yinglong Xia, Huawei Research, USA VICE GENERAL CO-CHAIRS Kishore Kothapalli, IIIT-Hyderabad, India Anand Panangadan, California State University, Fullerton, USA INDUSTRY LIAISON CO-CHAIRS Rama Govindaraju, Google, USA Jigar Halani, Nvidia, India Vivek Yadav, FullStackNet, India WORKSHOPS CO-CHAIRS Manish Parashar, Rutgers University, USA Anthony Simonet, Rutgers University, USA TUTORIAL CHAIR Saumil Merchant, Shell, India STUDENT RESEARCH SYMPOSIUM CO-CHAIRS Kishore Kothapalli, IIIT-Hyderabad, India Madhura Purnaprajna, Amrita University, India Ashok Srinivasan, Florida State University, USA INDUSTRY, RESEARCH & USER SYMPOSIUM CO-CHAIRS R. Badrinath, Ericcson, India Rajeev Muralidhar, Intel, India STEERING COMMITTEE CHAIR Viktor K. Prasanna, University of Southern California, USA LOCAL ARRANGEMENTS CO-CHAIRS Rajeev Muralidhar, Intel, India Thondiyil Venugopalan, India ------------------------------------------------ HiPC 2018 SPONSORSHIP ------------------------------------------------ •IEEE Computer Society Technical Committee on Parallel Processing (TCPP) •HiPC Education Trust, India In cooperation with •ACM Special Interest Group on Algorithms and Computation Theory (SIGACT) •ACM Special Interest Group on Computer Architecture (SIGARCH) •FIP Working Group on Concurrent Systems •Manufacturers' Association for Information Technology (MAIT) •National Association of Software and Service Companies (NASSCOM) ------------------------------------------------------------ ------------------------------------ Follow us on Twitter https://twitter.com/hipcconf Google+ https://plus.google.com/+HipcOrg Facebook https://www.facebook.com/hipc.conference/ LinkedIn https://www.linkedin.com/groups/53197/profile ------------------------------------------------------------ ------------------------------------

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GraMSec 2018 - call for participation - early registration by June 6
by Barbara Kordy 25 May '18

25 May '18

****************************************************************** GraMSec 2018 The Fifth International Workshop on Graphical Models for Security Oxford, UK - July 8, 2018 http://gramsec.uni.lu/ Co-located with CSF 2018 (https://www.cs.ox.ac.uk/conferences/csf2018/) In conjunction with FLoC 2018 (http://www.floc2018.org/) ****************************************************************** ABOUT GraMSec The use of graphical security models to represent and analyse the security of systems has gained an increasing research attention over the last two decades. Formal methods and computer security researchers, as well as security professionals from the industry and government, have proposed various graphical security models, metrics, and measurements. Graphical models are used to capture different security facets and address a range of challenges including security assessment, automated defence, secure services composition, security policy validation, and verification. The objective of GraMSec is to contribute to the development of well-founded graphical security models, efficient algorithms for their analysis, as well as methodologies and tools for their practical usage. PROGRAM of GraMSec 2018 -------------------------- 09:00 Opening by Barbara Kordy 09:10 Invited talk of Mike Fisk, Chief Information Officer at Los Alamos National Laboratory, NM, USA Intrusion Tolerance in Complex Cyber Systems 10:10 Marlon Dumas, Luciano García-Bañuelos and Peeter Laud Disclosure Analysis of SQL Workflows 10:30-11:00 Coffee Break 11:00 Haozhe Zhang, Ioannis Agrafiotis, Arnau Erola, Sadie Creese and Michael Goldsmith A state machine system for insider threat detection 11:45 Sabarathinam Chockalingam, Wolter Pieters, Andre Teixeira, Nima Khakzad and Pieter van Gelder Combining Bayesian Networks and Fishbone Diagrams to Distinguish between Intentional Attacks and Accidental Technical Failures 12:30-14:00 Lunch Break 14:00 Ilia Shumailov, Mansoor Ahmed and Ross Anderson Tendrils of Crime: Visualizing the Diffusion of Stolen Bitcoins 14:45 Maxime Audinot, Sophie Pinchinat, François Schwarzentruber and Florence Wacheux Deciding the Emptiness of Attack trees 15:30-16:00 Coffee Break 16:00 Ross Horne, Sjouke Mauw and Alwen Tiu The Attacker Does not Always Hold the Initiative: Attack Trees with External Refinement 16:45 Harley Eades Iii, Jiaming Jiang and Aubrey Bryant On Linear Logic, Functional Programming, and Attack Trees 17:30 Closing by George Cybenko and David J. Pym REGISTRATION Registration to GraMSec 2018 is handled via the website of FLoC https://www.floc2018.org/register/ The early registration deadline is on June 6 If you need a support letter for a visa, please check https://www.floc2018.org/faqs/ PROGRAM COMMITTEE CO-CHAIRS George Cybenko, Dartmouth College, NH, USA David J. Pym, UCL, UK GENERAL CHAIR Barbara Kordy, INSA Rennes, IRISA, FR

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CFP SBAC-PAD 2018 @ Lyon - abstract deadline May 25th
by Laurent Lefevre 25 May '18

25 May '18

== 3RD CALL FOR PAPERS SBAC-PAD 2018 International Symposium on Computer Architecture and High Performance Computing Lyon, France September 24-27, 2018 http://avalon.ens-lyon.fr/sbac-pad SBAC-PAD is an international symposium, started in 1987, which has continuously presented an overview of new developments, applications, and trends in parallel and distributed computing technologies. SBAC-PAD is open for faculty members, researchers, specialists and graduate students around the world. In this edition, the symposium will be held at the École Normale Supérieure of Lyon, in France. Known as the Gastronomy Capital, Lyon is the 2nd largest economic and industrial region in France, and has become one of the favorite destinations for tourism in Europe. Lyon is also considered the most liveable city in France according to the Economist Intelligence Unit. Authors are invited to submit original manuscripts on a wide range of high-performance computing areas, including computer architecture, systems software, languages and compilers, algorithms, performance analysis, and applications. Topics of interest include (but are not limited to): - Application-specific systems - Architecture and programming support for emerging domains (Big Data, Deep Learning, Machine learning, Cognitive Systems) - Benchmarking, performance measurements, and analysis - Cloud, cluster, and edge/fog computing systems - Embedded and pervasive systems - GPUs, FPGAs and accelerator architectures - Languages, compilers, and tools for parallel and distributed programming - Modeling and simulation methodology - Operating systems and virtualization - Parallel and distributed systems, algorithms, and applications - Power and energy-efficient systems - Processor, cache, memory, storage, and network architecture - Real-world applications and case studies - Reconfigurable, resilient and fault-tolerant systems PAPER SUBMISSION Submissions must be in English, 8 pages maximum, following the IEEE conference formatting guidelines. To be published in the SBAC-PAD 2018 Conference Proceedings and to be eligible for publication at the IEEE Xplore (pending), one of the authors must register at the full rate. Authors may not use a single registration for multiple papers. Authors of selected papers will be invited to submit extended versions of their papers for publication on a selected journal. IMPORTANT DATES - Abstract deadline: May 25, 2018 - Paper deadline: June 1, 2018 - Rebuttal period: June 27-28, 2018 - Author notification: July 6, 2018 - Camera-ready: July 20, 2018 ORGANIZING COMMITTEE General Chairs - Laurent Lefèvre (Inria, ENS Lyon, University of Lyon, France) - Alfredo Goldman (Sao Paulo University, Brazil) - Marcos Dias de Assuncao (Inria, ENS Lyon, University of Lyon, France) Program Co-chairs - Rosa M Badia (Barcelona Supercomputing Center, Spain) - Manish Parashar (Rutgers University, USA) - Lucas Mello Schnorr (Federal University of Rio Grande do Sul, Brazil) Publicity Chairs - Alba Cristina de Melo (University of Brasilia, Brazil) - Pierre Sens (LIP6, Inria Paris Rocquencourt, France) - Vaidy Sunderam (Emory University, USA) PROGRAM COMMITTEE Computer Architecture Track Chair: Kalyana Chadalavada (Intel, USA) - Celso Mendes (University of Illinois at Urbana-Champaign, USA) - Cristiana Bentes (UERJ, Brazil) - Edson Borin (University of Campinas, Brazil) - Farah Fargo (University of Arizona, USA) - Felipe Maia Galvao Franca (COPPE-UFRJ, Brazil) - Jose Moreira (IBM, USA) - Kalyana Chadalavada (Intel, USA) - Naveen Cherukuri (NVIDIA, USA) - Rathish Jayabharathi (Intel, USA) - Rodolfo Azevedo (University of Campinas, Brazil) Networking and Distributed Systems Track Chair: Wagner Meira, Jr, (Federal University of Minas Gerais, Brazil) - Andrey Britto (UFCG, Brazil) - Bruno Schulze (LNCC, Brazil) - Carlos Varela (Rensselaer Polytechnic Institute, USA) - Domenico Talia (University of Calabria, Italy) - Dorgival Guedes Neto (UFMG, Brazil) - Elias P. Duarte Jr. (UFPR, Brazil) - Harold Castro (Universidad de los Andes, Colombia) - Javier Garcia-Blas (University Carlos III of Madrid, Spain) - Juan Durillo (University of Innsbruck, Austria) - Nicolae Bogdan (Huawei, China) - Omer Rana (Cardiff University, UK) - Priscila Solis (UnB, Brazil) - Rizos Sakellariou (University of Manchester, UK) - Rodrigo Fonseca (Brown, USA) - Ronaldo Ferreira (UFMS, Brazil) - Sandra Gesing (Notre Dame University, USA) - Zhiyi Huang (University of Otago, New Zealand) Parallel Applications and Algorithms Track Chair: Enrique Quintana-Ortí, (Universidad Jaime I, Spain) - Emmanuel Agullo (Inria, France) - José Ignacio Aliaga (Computer Science and Engineering Department, University Jaime I, Spain) - Hartwig Anzt (Karlsruhe Institute of Technology, Germany) - Michael Bader (Technical University of Munich, Germany) - Paolo Bientinesi (RWTH Aachen University, Germany) - Kei Davis (Los Alamos National Laboratory, USA) - Alba Melo (University of Brasilia, Brazil) - Pablo Ezzatti Udelar (Uruguay) - Mathieu Faverge (Bordeaux INP, France) - Domingo Gimenez (University of Murcia, Spain) - Daniel S. Katz (University of Illinois Urbana-Champaign, USA) - Hatem Ltaief (KAUST, Saudi Arabia) - Piotr Luszczek (University of Tennessee Knoxville, USA) - Viktor Prasanna (University of Southern California, USA) - Olaf Schenk (Universita della Svizzera Italiana, Switzerland) - Leonel Sousa (Lisbon University, Portugal) - Guillermo Taboada (University of A Coruña, Spain) - Pedro Valero-Lara (The University of Manchester, UK) - Jaroslaw Zola (State University of New York, USA) - Jairo Panetta (INPE, Brazil) Performance Evaluation Track Chair: Arnaud Legrand (CNRS/Inria/Université Grenoble Alpes, France) - Laura Carrington (San Diego Supercomputer Center/University of California, USA) - Cesar De Rose (PUCRS, Brazil) - Alfredo Goldman (University of São Paulo, Brazil) - Andreas Knupfer (TU Dresden, Germany) - Swann Perarnau (Argonne National Laboratory, USA) - Martin Schulz (Technical University of Munich, Germany) - Frederic Suter (CC IN2P3 / CNRS, France) System Software Track Chair: Adrien Lebre (IMT Atlantique/Inria/LS2N, France) - Rafael Asenjo (Dpt. Computer Architecture, Univ. Malaga. Spain) - Paolo Bellavista (University of Bologna, Italy) - Siegfried Benkner (University of Vienna, Austria) - Carlo Bertolli (IBM TJ Watson Research Center, United States) - Francisco Brasileiro (UFCG, Brazil) - Helene Coullon (Inria, France) - Michael Gerndt (Technical University of Munich, Germany) - Antonio J. Peña (Barcelona Supercomputing Center -BSC, Spain) - Mauricio Pillon (UDESC, Brazil) - Radu Prodan (University of Klagenfurt, Austria) - Mario Südholt (IMT Atlantique, France) - Cedric Tedeschi (Inria, France) - Ayal Zaks (Intel, Israel) ==

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[Last CFP] PBio 2018, EuroMPI Workshop (In-Cooperation with ACM SIGHPC) + Special Issue in Journal of Supercomputing (Springer, IF: 1.326, Q2)
by Miguel A. Vega-Rodriguez 25 May '18

25 May '18

Call for Papers --- PBio 2018, EuroMPI Workshop: 6th International Workshop on Parallelism in Bioinformatics + In-Cooperation with ACM SIGHPC + Proceedings published by ACM Digital Library within its International Conference Proceedings Series (ICPS) + Special Issue in the Journal of Supercomputing (Springer, Impact Factor: 1.326, Quartile Q2, ISSN: 0920-8542) --- SUBMISSION DEADLINE: 1 JUNE 2018 http://arco.unex.es/mavega/pbio/2018/ VENUE: Barcelona, Spain, 23 September 2018 We seek original, high-quality research papers, clearly focused on the application of Parallelism to any possible Bioinformatics problem. In particular, contributions are solicited on, but are not limited to, the following topics: - Parallel and distributed algorithms in Bioinformatics. - Workload partitioning strategies in Bioinformatics. - Memory-efficient algorithms in Bioinformatics. - Parallel tools and applications in Bioinformatics. - Data-intensive Bioinformatics (including Big Data storage and processing). - Multicore computing in Bioinformatics. - Multithreaded computing in Bioinformatics. - Cluster computing in Bioinformatics. - Supercomputing in Bioinformatics. - Cloud/Grid/P2P computing in Bioinformatics. - Volunteer computing in Bioinformatics. - Hardware accelerators (GPUs, FPGAs, etc.) in Bioinformatics. - Heterogeneous computing in Bioinformatics. - Green computing in Bioinformatics. - Mobile computing in Bioinformatics. - Emerging parallel programming models in Bioinformatics. - Parallel performance evaluation, analysis, and optimization in Bioinformatics. - Parallel visualization, modelling, simulation, and exploration in Bioinformatics. With regard to the Bioinformatics problems, many different alternatives exist: bioinformatics applied to biomedicine and drug design; biological sequence analysis, comparison and alignment; motif, gene and signal recognition/discovery; molecular evolution; phylogenetics and phylogenomics; determination or prediction of the structure of RNA and protein; DNA twisting and folding; gene expression and gene regulatory networks; deduction of metabolic pathways; microarray design and analysis; proteomics; functional genomics; molecular docking; design of DNA sequences for molecular computing; etc. All the details (paper format, submission system, important dates, etc.) at: http://arco.unex.es/mavega/pbio/2018/ --- Kind regards. -- ------------------------------------------------- Dr. Miguel A. Vega-Rodriguez <mavega(a)unex.es> http://arco.unex.es/mavega ARCO Research Group University of Extremadura Dept. Technologies of Computers & Communications Escuela Politecnica. Campus Universitario, s/n 10003 Caceres. SPAIN Tel: +34-927-257263 Fax: +34-927-257187 -------------------------------------------------

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CFP: YR-CONCUR 2018 - 8th Young Researchers Workshop on Concurrency Theory
by songfu＠shanghaitech.edu.cn 23 May '18

23 May '18

********************************************************************* YR-CONCUR 2018, Call for papers 8th Young Researchers Workshop on Concurrency Theory (YR-CONCUR), 2018 A satellite workshop of CONCUR 2018 September 3rd, 2018, Beijing, China (https://www.irif.fr/~cenea/yr-concur2018/) ********************************************************************* *Aims and objectives* This workshop aims at providing a platform for PhD students and young researchers who recently completed their doctoral studies, to exchange new results related to concurrency theory and receive feedback on their research. Focus is on informal discussions. Excellent master students working on concurrency theory are also encouraged to contribute. *Important Dates* Deadline for 4-page abstracts: June 8th, 2018 Notification of acceptance: July 6th, 2018 Workshop: September 3rd, 2018 *Format* YR-CONCUR 2018 is a satellite workshop of CONCUR 2018 and will be held on September 3rd, 2018. It is anticipated that many CONCUR participants will attend the YR-workshop (and vice versa). Presentations are selected on the basis of an abstract of up to 4 pages (incl. references) describing the research. No particular format is required. Submissions are judged on the expected interest in and quality of the talk. The accepted abstracts will be made available at the workshop, but no formal proceedings are planned. It is thus also allowed (and encouraged) to send results that have been published at other conferences (although preferably not at CONCUR 2018 or any of its other satellite workshops). *Submission* 4-page abstracts should be submitted via the YR-CONCUR 2018 submission page on the EasyChair system: https://easychair.org/conferences/?conf=yrconcur2018. *Organizers* Constantin Enea (IRIF, Université Paris Diderot (Paris 7), France) Fu Song (ShanghaiTech University, China) Dr. Fu SONG School of Information Science and Technology,ShanghaiTech University Addr: Room 1A-504C, SIST Building, No.393 Huaxia Middle Road, Pudong Area Shanghai Tel: +86-(0)21-20685397, +86-15921769918 Website:sist.shanghaitech.edu.cn/faculty/songfu

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Job Openings: Professor / Associate Professor / Assistant Professor (Computer Science) at Hong Kong Baptist University (PR380/17-18)
by comp hkbu 18 May '18

18 May '18

The Department of Computer Science <http://www.comp.hkbu.edu.hk/> of Hong Kong Baptist University <http://www.hkbu.edu.hk/> (HKBU), presently offers BSc, MSc, MPhil, and PhD programmes, now seeks outstanding applicants for the following faculty positions on substantiable-track. *Professor / Associate Professor / Assistant Professor (Computer Science) (PR380/17-18) * The appointees will teach, and are expected to manage programme at undergraduate and postgraduate levels, perform high-impact research, as well as contribute to professional and institutional services. Collaboration with other faculty members in research and teaching is also expected. Applicants should possess a PhD degree in Computer Science, Computer Engineering, Information Systems, or a related field, and sufficiently demonstrate abilities to conduct high-quality research in one of the Department's key research areas: (i) computational intelligence, (ii) databases and information management, (iii) networking and systems, and (iv) pattern recognition and machine learning. They will be encouraged to collaborate with colleagues within the Department to contribute to two special thematic applications including (a) health informatics and (b) secure and privacy-aware computing, and/or outside the Department to contribute to interdisciplinary research projects under our University's Research Cluster on Data Analytics and A.I. in X. Applicants should also demonstrate strong commitment to undergraduate and postgraduate teaching in computer science and/or information systems, possess track record of innovative research and high-impact publications, and demonstrate the ability to bid for and pursue externally-funded research programmes. Candidates for the senior positions should also have a strong track record of research and teaching accomplishments. Initial appointment will be made on a fixed-term contract of three years. Re-appointment thereafter is subject to mutual agreement and availability of funding. For enquiry, please contact Dr William Cheung, Head of Department (email: william [at] comp.hkbu.edu.hk). More information about the Department can be found at http://www.comp.hkbu.edu.hk. *Rank and salary will be commensurate with qualifications and experience.* *Application Procedure:* Applicants are invited to submit their applications at the HKBU e-Recruitment System (jobs.hkbu.edu.hk <https://jobs.hkbu.edu.hk/hrssers/persrequest?job_no=PR380/17-18>). Applicants should request two referees to send in confidential letters of reference, with PR number quoted on the letters, to the Personnel Office (Email: recruit [at] hkbu.edu.hk) direct. Applicants are requested to send in samples of publications, preferably three best ones out of their recent publications and recent teaching evaluation results. Applicants not invited for interview 4 months after the closing date may consider their applications unsuccessful. All application materials including publication samples, scholarly/creative works will not be returned after the completion of the recruitment exercise unless upon request. Details of the University's Personal Information Collection Statement can be found at http://pers.hkbu.edu.hk/pics. The University reserves the right not to make an appointment for the posts advertised, and the appointment will be made according to the terms and conditions then applicable at the time of offer. Review of applications will begin in *July 2018* and will continue until the position is filled. http://www.comp.hkbu.edu.hk/v1/?page=job_vacancies&id=450

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[CFP] IA^3 2018 - 8th Workshop on Irregular Applications: Architectures and Algorithms
by Tumeo, Antonino 17 May '18

17 May '18

[Apologies if you receive multiple copies of this CFP] IA^3 2018 8th Workshop on Irregular Applications: Architectures and Algorithms http://hpc.pnl.gov/IA3 In Conjuction with SC18 Sponsored by IEEE TCHPC -------------------- Call for Papers -------------------- Irregular applications occur in many subject matters. While inherently parallel, they exhibit highly variable execution performance at a local level due to unpredictable memory access patterns and/or network transfers, divergent control structures, and data imbalances. Moreover, they often require fine-grain synchronization and communication on large-data structures such as graphs, trees, unstructured grids, sparse matrices, deep nets, tables, and their combinations (such as, for example, attributed graphs). They have a significant degree of latent parallelism, which however is difficult to exploit due to their complex behavior. Current high performance architectures rely on data locality and regular computation to reduce access latencies, and often do not cope well with the requirements of these applications. Furthermore, irregular applications are difficult to scale on current supercomputing machines, due to their limits in fine-grained synchronization and small data transfers. Irregular applications pertain both to well established and emerging fields, such as machine learning, social network analysis, bioinformatics, semantic graph databases, Computer Aided Design (CAD), and computer security. Many of these application areas also process massive sets of unstructured data, which keep growing exponentially. Addressing the issues of irregular applications on current and future architectures will become critical to solve the challenges in science and data analysis of the next few years. This workshop seeks to explore solutions for supporting efficient execution of irregular applications in the form of new features at the level of the micro- and system-architecture, network, languages and libraries, runtimes, compilers, analysis, algorithms. Topics of interest, of both theoretical and practical significance, include but are not limited to: - Micro- and System-architectures, including multi- and many-core designs, heterogeneous processors, accelerators (GPUs, vector processors, Automata processor), reconfigurable (coarse grained reconfigurable and FPGA designs) and custom processors - Network architectures and interconnect (including high-radix networks, optical interconnects) - Novel memory architectures and designs (including processors-in memory) - Impact of new computing paradigms on irregular workloads (including neuromorphic processors and quantum computing) - Modeling, simulation and evaluation of novel architectures with irregular workloads - Innovative algorithmic techniques - Combinatorial algorithms (graph algorithms, sparse linear algebra, etc.) - Impact of irregularity on machine learning approaches - Parallelization techniques and data structures for irregular workloads - Data structures combining regular and irregular computations (e.g., attributed graphs) - Approaches for managing massive unstructured datasets (including streaming data) - Languages and programming models for irregular workloads - Library and runtime support for irregular workloads - Compiler and analysis techniques for irregular workloads - High performance data analytics applications, including graph databases Besides regular papers, papers describing work-in-progress or incomplete but sound, innovative ideas related to the workshop theme are also encouraged. We solicit both 8-page regular papers and 4-page position papers. Authors of exciting but not mature enough regular papers may be offered the option of a short 4-page paper and related short presentation. -------------------- Important Dates -------------------- Abstract Submission: August 22, 2018 Position or Regular Paper Submission: August 29, 2018 Notification: September 28, 2018 Camera-ready: October 10, 2018 Workshop: November 12, 2018 Submissions Submission site: https://submissions.supercomputing.org Submitted manuscripts may not exceed eight (8) pages in length for regular papers and four (4) pages for position papers including figures, tables and references. Authors of regular papers will be able to provide up to one (1) additional pages for the Artifact Description (AD) appendix and, after paper acceptance, up to two (2) additional pages for the Artifact Evaluation (AE) appendix. The workshop proceedings will be published through IEEE TCHPC and will be included in the IEEE Xplore digital library. The templates are available at: http://www.ieee.org/conferences_events/conferences/publishing/templates.html. -------------------- Artifact Description & Evaluation -------------------- This edition of the workshop invites authors of regular papers to follow a reproducibility initiative like the main SC Conference, with specific appendices for the Artifact Description (AD) and the Artifact Evaluation (AE). Please refer to the SC reproducibility page for further details on the rationale behind AD and AE: https://sc18.supercomputing.org/submit/sc-reproducibility-initiative/. Authors of regular papers will be able to use up to one (1) additional page to provide an Artifact Description (AD) Appendix, describing the details of their software environments and computational experiments to the extent that an independent person could replicate their results. This additional page is voluntary, and must focus only on details on software environments and methods to execute the experiments. It should not add details on the proposed technical approaches. If a paper has no computational results, the appendix only needs to mention that computational results are not part of the paper. Additionally, authors of accepted regular papers will be invited to formally submit their supporting materials to the Artifact Evaluation (AE) process. The process is voluntary, but authors that will participate in the AE will be eligible for the Best Paper Award of the workshop. Supporting materials for the AE include access to the actual software artifact, shared pubblicly (for example, through the CK - Collective Knowledge - https://github.com/ctuning/ck format), and two (2) further additional pages of the paper that details how to reproduce the results of the paper. For details on how to submit supporting materials to the AE process, please refer to: http://ctuning.org/ae/submission.html. Authors participating in the AE will receive an assessment of the artifact, and the related badge on their paper. For any additional question on the AD and the AE please contact the Artifact Evaluation Chair Flavio Vella at flavio(a)dividiti.com<mailto:flavio@dividiti.com>. -------------------- Organizers -------------------- Antonino Tumeo (PNNL), antonino.tumeo(a)pnnl.gov<mailto:antonino.tumeo@pnnl.gov> John Feo (PNNL/NIAC), john.feo(a)pnnl.gov<mailto:john.feo@pnnl.gov> Vito Giovanni Castellana (PNNL), vitoGiovanni.castellana(a)pnnl.gov<mailto:vitoGiovanni.castellana@pnnl.gov> -------------------- Proceedings Chair -------------------- Marco Minutoli (PNNL and WSU), marco.minutoli(a)pnnl.gov<mailto:marco.minutoli@pnnl.gov> -------------------- Artifact Evaluation Chair -------------------- Favio Vella (DIVIDITI), flavio(a)dividiti.com<mailto:flavio@dividiti.com> -------------------- Technical Program Committee -------------------- Nesreen Ahmed, Intel, US Kubilay Atasu, IBM Zurich, CH Scott Beamer, LBNL, US Sanjukta Bhowmick, University of Nebraska Omaha, US Erik Boman, SNL, US David Brooks, Harvard University, US Aydin Buluc, LBNL, US Joe Eaton, NVIDIA, US Rajiv Gupta, UC Riverside, US Arif Khan, PNNL, US Farzad Khorasani, Georgia Tech, US Peter M. Kogge, University of Notre Dame, US Manoj Kumar, IBM TJ Watson, US John Leidel, Tactical Computing Labs, US Kamesh Madduri, Pennsylvania State University, US Naoya Maruyama, LLNL, US Miquel Moretó, Barçelona Supercomputing Center, ES Maxim Naumov, Facebook, US Fanny Nina-Paravecino, Northeastern University, US Sreepathi Pai, Rochester University, US Roger Pearce, LLNL, US Miquel Pericas, Chalmers University of Technology, SE Keshav Pingali, University of Texas at Austin, US Viktor K. Prasanna, University of Southern California, US Jason Riedy, Georgia Tech, US John Shalf, LBNL, US Shaden Smith, Intel, US Edgar Solomonik, University of Illinois at Urbana-Champaign, US Bora Uçar, French National Center for Scientific Research, FR Ruud van der Pas, Oracle, NL Ana Lucia Varbanescu, University of Amsterdam, NL Cheng Wang, Microsoft, US

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[New Book Release] Measuring Inconsistency in Information
by Vanina Martinez 16 May '18

16 May '18

============================================================ ======================================================= Apologies if you receive multiple copies of this message ============================================================ ========================================================= Measuring Inconsistency in Information John Grant and Maria Vanina Martinez (Eds) ============================================================ ========================================================= Published by College Publications URL: http://www.collegepublications.co.uk/logic/?00040 The concept of measuring inconsistency in information was developed by John Grant in a 1978 paper in the context of first-order logic. For more than 20 years very little was done in this area until in the early 2000s a number of AI researchers started to formulate new inconsistency measures primarily in the context of propositional logic knowledge bases. The aim of this volume is to survey what has been done so far, to expand inconsistency measurement to other formalisms, to connect it with related topics, and to provide ideas for further research in a topic that is particularly relevant now in view of the many inconsistencies in the massive amount of information available. The book contains 11 chapters. The first chapter, by John Grant, gives his original motivation for starting this field, explains why it was formulated in a highly mathematical manner, presents important material that was omitted from the original paper, and provides ideas about the use of dimensions in measuring inconsistency. The second chapter, by Matthias Thimm, is a survey that covers most of the research on inconsistency measures up to 2017. The other 9 chapters, all by experts either in inconsistency measures, or in the topic under consideration, or both, connect inconsistency measures with argumentation, disjunctive logic programming, fuzzy logic systems, modal logics, multiset representation, paraconsistent consequence, probabilistic logic, relational databases, and spatio-temporal databases. ============================================================ ========================================================= For more details, please go to: http://www.collegepublications.co.uk/logic/?00040 ============================================================ =========================================================

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Euro-EDUPAR Workshop 2018 - Deadline extended until May 27
by Rizos Sakellariou 15 May '18

15 May '18

Euro-EDUPAR Workshop 2018 - Deadline extended until May 27 August 27, 2018 Turin, Italy http://www.euroedupar.tu-darmstadt.de held in conjunction with Euro-Par 2018 https://europar2018.org Scope and objectives Parallel and Distributed Computing (PDC) is nowadays omnipresent. It is in all the computational environments, from mobile devices, laptops and desktops to clusters, large-scale data centers and supercomputers, often comprising CPUs and/or coprocessors of different types (GPU, MIC, FPGA). It becomes now vital to train new generations of scientists and engineers in the use of these computational systems: parallelism-related topics must be incorporated in Computer Science (CS) and Computer Engineering (CE) programs. In 2010 the IEEE Computer Society Technical Committee on Parallel Processing launched the Curriculum Initiative on Parallel and Distributed Computing, with Core Topics for Undergraduates, and in 2011 started the workshop EduPar, dedicated to Parallel and Distributed Computing Education. Given the differences in education in different parts of the world, the Euro-EDUPAR workshop aims to analyze PDC Education in a European context, taking into account the structure and organization of European education. In this context, the 4th European Workshop on Parallel and Distributed Computing Education for Undergraduate Students (Euro-EDUPAR) invites unpublished manuscripts from individuals or teams from academia, industry, and other educational and research institutes on topics pertaining to the teaching of PDC topics in the Computer Science and Engineering curriculum as well as in Computational Science with PDC and/or High Performance Computing (HPC) concepts, with emphasis on European undergraduate teaching. The workshop especially seeks papers that report on experiences incorporating PDC topics into undergraduate core courses taken by the majority of students on a degree course. Methods, pedagogical approaches, tools, and techniques that have potential for adoption across the European teaching community are of particular interest. Topics The topics of interest include, but are not limited to: 1. Parallel and Distributed Computing (PDC) teaching in the European space 2. Pedagogical issues in PDC, educational methods and learning mechanisms 3. Novel ways of teaching PDC topics, including informal learning environments 4. Curriculum design, models for incorporating PDC topics in core CS/CE curriculum 5. Experience with incorporating PDC topics into core CS/CE courses 6. Experience with incorporating PDC topics in the context of other applications learning 7. Pedagogical tools, programming environments, and languages for PDC 8. e-Learning, e-Laboratory, online courses related to PDC 9. PDC teaching experiences at non-university levels: secondary school, industry, etc Submission guidelines Submission The submissions will follow the Euro-Par guidelines, in PDF format, and should not exceed 12 pages in the Springer LNCS style, which can be downloaded from the Springer Web site. ftp://ftp.springernature.com/cs-proceeding/llncs/llncs2e.zip Paper submission is handled electronically (EasyChair). https://easychair.org/conferences/?conf=europar2018ws The 12-page limit is comprehensive (text, figures, references). Complete LaTeX sources must be provided for accepted papers. Short papers and work-in-progress papers can be submitted and presented at the workshop, but they will not be eligible for the post-conference proceedings published by Springer where only full papers between 10 and 12 pages long will be published. Submissions will be reviewed by at least 3 members of the Program Committee and will be assessed according to impact at European level, the novelty of contributions, impact on broader undergraduate curriculum, relevance to the goals of the workshop, results and methodology. The workshop proceedings will be published in a LNCS Euro-Par 2018 Workshops volume after the conference. Only full papers between 10 and 12 pages long which were presented at the workshop will be included. Important dates May 27, 2018: Paper submission deadline (extended) June 25, 2018: Author notification July 6, 2018: Paper due, for informal workshop proceedings August 27, 2018: Workshop (full day) October 2, 2018: Camera-ready paper (including LaTeX sources) deadline Travel support Authors of accepted papers may apply for travel support - typically granted in the form of a free registration. Organization General Co-Chairs Denis Trystram, Grenoble Institute of Technology, France Arnold L. Rosenberg, University of Massachusetts, USA Steering Committee Henri E. Bal, Vrije Universiteit, the Netherlands Alexey Lastovetsky, Univesity College Dublin, Ireland Christian Lengauer, University of Passau, Germany Pierre Manneback, University of Mons, Belgium Sushil K. Prasad, Georgia State University, USA Yves Robert, Ecole Normale Superieure de Lyon, France Arnold L. Rosenberg, University of Massachusetts, USA Rizos Sakellariou, University of Manchester, UK Cristina Silvano, Politecnico di Milano, Italy Paul G. Spirakis, University of Liverpool, UK Denis Trystram, Grenoble Institute of Technology, France Mateo Valero, Barcelona Supercomputing Center, Spain Vladimir Voevodin, Moscow State University, Russia Program Co-Chairs Felix Wolf, TU Darmstadt, Germany Rizos Sakellariou, University of Manchester, UK Program Committee Jorge G. Barbosa, University of Porto, Portugal Marian Bubak, AGH Krakow PL and University of Amsterdam, The Netherlands Aurelien Cavelan, University of Basel, Switzerland Sunita Chandrasekaran, University of Delaware, USA Gennaro Cordasco, Universita' della Campania "L. Vanvitelli", Italy Efstratios Gallopoulos, University of Patras, Greece Chryssis Georgiou, University of Cyprus, Cyprus Domingo Gimenez, University of Murcia, Spain Thilo Kielmann, Vrije Universiteit Amsterdam, The Netherlands Alexey Lastovetsky, University College Dublin, Ireland Vania Marangozova-Martin, Grenoble University, France Tomas Margalef, Universitat Autonoma de Barcelona, Spain Svetozar Margenov, Bulgarian Academy of Sciences, Bulgaria Lena Oden, Forschungszentrum J?lich, Germany Marcin Paprzycki, Polish Academy of Sciences, Poland Dana Petcu, West University of Timisoara, Romania Geppino Pucci, Universita' di Padova, Italy Erven Rohou, INRIA, France Emil Slusanschi, University Politehnica of Bucharest, Romania Juan Tourino, University of A Coru?a, Spain Jesper Larsson Tr?ff, Vienna University of Technology, Austria Vladimir Voevodin, Moscow State University, Russia Sponsorship This workshop is supported by SPPEXA, the DFG Program 1648 Software for Exascale Computing. Contact Felix Wolf <wolf(a)cs.tu-darmstadt.de>

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CALL FOR PAPERS SBAC-PAD 2018, International Symposium on Computer Architecture and High Performance Computing, Lyon, France, September 24-27, 2018
by Laurent Lefevre 14 May '18

14 May '18

CALL FOR PAPERS SBAC-PAD 2018 International Symposium on Computer Architecture and High Performance Computing Lyon, France September 24-27, 2018 http://avalon.ens-lyon.fr/sbac-pad SBAC-PAD is an international symposium, started in 1987, which has continuously presented an overview of new developments, applications, and trends in parallel and distributed computing technologies. SBAC-PAD is open for faculty members, researchers, specialists and graduate students around the world. In this edition, the symposium will be held at the École Normale Supérieure of Lyon, in France. Known as the Gastronomy Capital, Lyon is the 2nd largest economic and industrial region in France, and has become one of the favorite destinations for tourism in Europe. Lyon is also considered the most liveable city in France according to the Economist Intelligence Unit. Authors are invited to submit original manuscripts on a wide range of high-performance computing areas, including computer architecture, systems software, languages and compilers, algorithms, performance analysis, and applications. Topics of interest include (but are not limited to): - Application-specific systems - Architecture and programming support for emerging domains (Big Data, Deep Learning, Machine learning, Cognitive Systems) - Benchmarking, performance measurements, and analysis - Cloud, cluster, and edge/fog computing systems - Embedded and pervasive systems - GPUs, FPGAs and accelerator architectures - Languages, compilers, and tools for parallel and distributed programming - Modeling and simulation methodology - Operating systems and virtualization - Parallel and distributed systems, algorithms, and applications - Power and energy-efficient systems - Processor, cache, memory, storage, and network architecture - Real-world applications and case studies - Reconfigurable, resilient and fault-tolerant systems PAPER SUBMISSION Submissions must be in English, 8 pages maximum, following the IEEE conference formatting guidelines. To be published in the SBAC-PAD 2018 Conference Proceedings and to be eligible for publication at the IEEE Xplore (pending), one of the authors must register at the full rate. Authors may not use a single registration for multiple papers. Authors of selected papers will be invited to submit extended versions of their papers for publication on a selected journal. IMPORTANT DATES - Abstract deadline: May 25, 2018 - Paper deadline: June 1, 2018 - Rebuttal period: June 27-28, 2018 - Author notification: July 6, 2018 - Camera-ready: July 20, 2018 ORGANIZING COMMITTEE General Chairs - Laurent Lefèvre (Inria, ENS Lyon, University of Lyon, France) - Alfredo Goldman (Sao Paulo University, Brazil) - Marcos Dias de Assuncao (Inria, ENS Lyon, University of Lyon, France) Program Co-chairs - Rosa M Badia (Barcelona Supercomputing Center, Spain) - Manish Parashar (Rutgers University, USA) - Lucas Mello Schnorr (Federal University of Rio Grande do Sul, Brazil) PROGRAM COMMITTEE Computer Architecture Track Chair: Kalyana Chadalavada (Intel, USA) - Celso Mendes (University of Illinois at Urbana-Champaign, USA) - Cristiana Bentes (UERJ, Brazil) - Edson Borin (University of Campinas, Brazil) - Farah Fargo (University of Arizona, USA) - Felipe Maia Galvao Franca (COPPE-UFRJ, Brazil) - Jose Moreira (IBM, USA) - Kalyana Chadalavada (Intel, USA) - Naveen Cherukuri (NVIDIA, USA) - Rathish Jayabharathi (Intel, USA) - Rodolfo Azevedo (University of Campinas, Brazil) Networking and Distributed Systems Track Chair: Wagner Meira, Jr, (Federal University of Minas Gerais, Brazil) - Andrey Britto (UFCG, Brazil) - Bruno Schulze (LNCC, Brazil) - Carlos Varela (Rensselaer Polytechnic Institute, USA) - Domenico Talia (University of Calabria, Italy) - Dorgival Guedes Neto (UFMG, Brazil) - Elias P. Duarte Jr. (UFPR, Brazil) - Harold Castro (Universidad de los Andes, Colombia) - Javier Garcia-Blas (University Carlos III of Madrid, Spain) - Juan Durillo (University of Innsbruck, Austria) - Nicolae Bogdan (Huawei, China) - Omer Rana (Cardiff University, UK) - Priscila Solis (UnB, Brazil) - Rizos Sakellariou (University of Manchester, UK) - Rodrigo Fonseca (Brown, USA) - Ronaldo Ferreira (UFMS, Brazil) - Sandra Gesing (Notre Dame University, USA) - Zhiyi Huang (University of Otago, New Zealand) Parallel Applications and Algorithms Track Chair: Enrique Quintana-Ortí, (Universidad Jaime I, Spain) - Emmanuel Agullo (Inria, France) - José Ignacio Aliaga (Computer Science and Engineering Department, University Jaime I, Spain) - Hartwig Anzt (Karlsruhe Institute of Technology, Germany) - Michael Bader (Technical University of Munich, Germany) - Paolo Bientinesi (RWTH Aachen University, Germany) - Kei Davis (Los Alamos National Laboratory, USA) - Alba Melo (University of Brasilia, Brazil) - Pablo Ezzatti Udelar (Uruguay) - Mathieu Faverge (Bordeaux INP, France) - Domingo Gimenez (University of Murcia, Spain) - Daniel S. Katz (University of Illinois Urbana-Champaign, USA) - Hatem Ltaief (KAUST, Saudi Arabia) - Piotr Luszczek (University of Tennessee Knoxville, USA) - Viktor Prasanna (University of Southern California, USA) - Olaf Schenk (Universita della Svizzera Italiana, Switzerland) - Leonel Sousa (Lisbon University, Portugal) - Guillermo Taboada (University of A Coruña, Spain) - Pedro Valero-Lara (The University of Manchester, UK) - Jaroslaw Zola (State University of New York, USA) - Jairo Panetta (INPE, Brazil) Performance Evaluation Track Chair: Arnaud Legrand (CNRS/Inria/Université Grenoble Alpes, France) - Laura Carrington (San Diego Supercomputer Center/University of California, USA) - Cesar De Rose (PUCRS, Brazil) - Alfredo Goldman (University of São Paulo, Brazil) - Andreas Knupfer (TU Dresden, Germany) - Swann Perarnau (Argonne National Laboratory, USA) - Martin Schulz (Technical University of Munich, Germany) - Frederic Suter (CC IN2P3 / CNRS, France) System Software Track Chair: Adrien Lebre (IMT Atlantique/Inria/LS2N, France) - Rafael Asenjo (Dpt. Computer Architecture, Univ. Malaga. Spain) - Paolo Bellavista (University of Bologna, Italy) - Siegfried Benkner (University of Vienna, Austria) - Carlo Bertolli (IBM TJ Watson Research Center, United States) - Francisco Brasileiro (UFCG, Brazil) - Helene Coullon (Inria, France) - Michael Gerndt (Technical University of Munich, Germany) - Antonio J. Peña (Barcelona Supercomputing Center -BSC, Spain) - Mauricio Pillon (UDESC, Brazil) - Radu Prodan (University of Klagenfurt, Austria) - Mario Südholt (IMT Atlantique, France) - Cedric Tedeschi (Inria, France) - Ayal Zaks (Intel, Israel)

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CfP+CfA ::: IFIP World Computer Congress 2018
by Robert Wrembel 10 May '18

10 May '18

Call for Papers and Attendance INTERNATIONAL FEDERATION FOR INFORMATION PROCESSING WORLD COMPUTER CONGRESS Sep 17-21, 2018 Poznan, Poland wcc2018.org wcc2018.put.poznan.pl INTERNATIONAL FEDERATION FOR INFORMATION PROCESSING (IFIP) ------------------------------------------------------------------------ * The leading multinational organization in Information & Communications Technologies (ICT), established 60 years ago * Recognized by United Nations and other world bodies * Membership covers over 50 countries, with a total membership of over 350 000 * Includes over 100 Working Groups organized in 13 Technical Committees WORLD COMPUTER CONGRESS (WCC) ------------------------------------------------------------------------ The World Computer Congress is the main event of the International Federation For Information Processing, being organized since 1959. In the recent past, WCC was held in: Canada (2002), France (2004), Chile (2006), Italy (2008), Australia (2010), the Netherlands (2012), and Korea (2015). MAIN TOPICS OF WCC: http://wcc2018.org/program ------------------------------------------------------------------------ - Security and Privacy - Data Science - Big Data Management and Analysis - Enterprise Information Systems and Database Technologies - the Internet of Things - Entertainment Computing - Social Aspects of Information Technologies - the History of Computing CONTESTS ------------------------------------------------------------------------ - PhD Student Research Competition - Cybersecurity contest: Capture-the-Flag HIGHLIGHTS: http://wcc2018.put.poznan.pl/ ------------------------------------------------------------------------ Keynote talks ---------------- - Prof. Wil van der Aalst (one of the most cited computer scientists in the world, top expert in workflow management, process mining, Petri nets, business process management, process modeling, and process analysis) Talk title: Responsible Data Science in a Dynamic World - Dr. Jan Camenisch (a leading scientist in the area of privacy and cryptography, Principal Research Staff Member at IBM Research - Zurich) - Prof. Leslie Valiant (world-renowned for contributions to complexity theory, Turing Award holder) Talk title: What Needs to be Added to Machine Learning? - Shamika N. Sirimanne (world-renowned expert in disaster risk reduction) Available grants ---------------- - 7 participation grants for students presenting at PhD Student Research Competition (http://wcc2018.put.poznan.pl/PhD-Workshop) - 2-3 travel grants for PhD students from developing countries - 1 travel grant for a mature researcher from a developing country (http://wcc2018.put.poznan.pl/grants) CALL FOR PAPERS ------------------------------------------------------------------------ The following events have open calls for papers (for details see the web pages of individual events): http://wcc2018.put.poznan.pl/program - International Conference on Research and Practical Issues Enterprise Information Systems - IFIP Internet of Things Conference - International Symposium on Computer and Information Sciences - International Conference on Entertainment Computing - Histories of Computing in Eastern Europe - Semantics in Big Data Management - IT in Disaster Risk Reduction Conference - IT Research Workshop - Applied Data Science

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Ada-Europe 2018 - early registration until May 14
by Dirk Craeynest 08 May '18

08 May '18

----------------------------------------------------------------------- 2nd Call for Participation *** UPDATED Program Summary *** 23rd International Conference on Reliable Software Technologies - Ada-Europe 2018 18-22 June 2018, Lisbon, Portugal http://www.ada-europe.org/conference2018 Organized by Univ. Lisboa and Ada-Europe, in cooperation with ACM SIGAda, SIGBED, SIGPLAN and the Ada Resource Association (ARA) *** Early registration discount until May 14 *** *** Add tutorials to your conference registration *** http://www.ada-europe.org/conference2018/tutorials.html *** Use conference poster to promote event *** http://www.ada-europe.org/conference2018/posters/AE2018_poster.png ----------------------------------------------------------------------- The 23rd International Conference on Reliable Software Technologies - Ada-Europe 2018 will take place in Lisbon, Portugal, from June 18 to 22. As per its traditional style, the conference will span a full week, including, from Tuesday to Thursday, three days of scientific, technical and industrial programs, along with tutorials and workshops on Monday and Friday. The Ada-Europe series of conferences has over the years become a leading international forum for providers, practitioners and researchers in reliable software technologies. These events highlight the increased relevance of Ada in general and in safety- and security-critical systems in particular, and provide a unique opportunity for interaction and collaboration between academics and industrial practitioners. Extensive information is available on the conference web site, such as an overview of the program, the list of accepted papers and industrial presentations, and descriptions of workshops, tutorials, keynote presentations, and social events. Also check the conference web site for registration, accommodation and travel information, as well as promotional material such as a ready-to-print conference poster and the 16-page Advance Program brochure. Quick overview - Mon 18 & Fri 22: tutorials + workshops - Tue 19 - Thu 21: core program Proceedings - published by Springer - volume 10873 in Lecture Notes in Computer Science series - will be available at conference Program Chair - António Casimiro, LASIGE/U. Lisboa, Portugal casim at ciencias.ulisboa.pt Keynote speakers - Paulo Esteves-Veríssimo, University of Luxembourg, Luxembourg, "Security and Dependability Challenges of IT/OT Integration" - Carl Brandon, Vermont Technical College, USA, "From Physicist to Rocket Scientist, and how to make a CubeSat that works" - Erhard Plödereder, University of Stuttgart, Germany, "Vulnerabilities in Safety, Security, and Privacy" Workshops (full day) - "Runtime Verification and Monitoring Technologies for Embedded Systems" Workshop (RUME 2018) - 5th International Workshop on "Challenges and new Approaches for Dependable and Cyber-Physical Systems Engineering" (DeCPS 2018) Tutorials (full day) - "Recent Developments in SPARK 2014" Peter Chapin, Vermont Technical College, USA - "Scheduling analysis of AADL architecture models" Frank Singhoff, Lab-STICC/UBO, France Pierre Dissaux, Ellidiss Technologies, France Tutorials (half day) - "Access types and memory management in Ada 2012" Jean-Pierre Rosen, Adalog, France - "Design and architecture guidelines for trustworthy systems" William Bail, The MITRE Corporation, USA - "Numerics for the Non-Numerical Analyst" Jean-Pierre Rosen, Adalog, France - "Requirements development for safety and security critical systems" William Bail, The MITRE Corporation, USA - "Writing Contracts in Ada" Jacob Sparre Andersen, JSA Research & Innovation - "Introduction to Libadalang" R. Amiard, P.M. de Rodat Raphaël Amiard, Pierre-Marie de Rodat, AdaCore, France - "Unit-testing with Ahven" Jacob Sparre Andersen, JSA Research & Innovation - "Frama-C, a Framework for Analysing C Code" Julien Signoles, CEA LIST, France Papers and Presentations - 10 refereed technical papers and 4 presentations in sessions on Safety and Security, Ada 202X, Handling Implicit Overhead, Real-time Scheduling, New Application Domains - 12 industrial presentations and experience reports in sessions on Ada in Industry, Space Systems, V&V of Safety-Cricital Software, Software Methodologies - submissions by authors from 19 countries, and accepted contributions from Austria, France, Germany, Italy, Norway Poland, Portugal, South Korea, Spain, Sweden, Switzerland, UK, USA Vendor exhibition and networking area - area features exhibitor booths, project posters, reserved vendor tables, and general networking options - several companies already committed; others expected to confirm soon - vendor presentation sessions in core program Social events - each day: coffee breaks in the exhibition space and sit-down lunches offer ample time for interaction and networking - Tuesday evening: Ada-Europe General Assembly, followed by Welcome Reception on board of modern catamaran, to see Lisbon from a different perspective and watch the sunset from the Tagus river - Wednesday evening: transportation to restaurant "A Casa do Bacalhau", for the traditional Ada-Europe Conference Banquet; the name means "The House of the Codfish", so it is not too difficult to guess what is their speciality - Best Paper and Best Presentation awards will be handed out Registration - online registration is open at <http://www.ada-europe.org/conference2018/registration.html> - early registration discount up to Monday May 14, 2018 - additional discount for academia, Ada-Europe, ACM SIGAda, SIGBED and SIGPLAN members - student discounts are available - registration includes copy of printed proceedings at event - includes coffee breaks and lunches - three day conference registration includes all social events - tutorial fees reduced when taken together with 3-day conference - payment possible by credit card or bank transfer - see registration page for all details Promotion - recommended Twitter hashtags: #AdaEurope and/or #AdaEurope2018 - 16-page Advance Program brochure available online <http://www.ada-europe.org/conference2018/AdaEurope2018%20Advance%20Program.…> - support Ada-Europe 2018 with promotional poster available at <http://www.ada-europe.org/conference2018/posters/AE2018_poster.png> Please make sure you book accommodation as soon as possible. Lisbon will be very busy in that week. For more info and latest updates see the conference web site at <http://www.ada-europe.org/conference2018>. We look forward to seeing you in Lisbon in June 2018! ----------------------------------------------------------------------- Our apologies if you receive multiple copies of this announcement. Please circulate widely. Dirk Craeynest, Ada-Europe'2018 Publicity Chair Dirk.Craeynest(a)cs.kuleuven.be *** 23rd Intl.Conf.on Reliable Software Technologies - Ada-Europe'2018 *** June 18-22, 2018 ** Lisbon, Portugal *** http://www.ada-europe.org

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(CALL FOR PAPERS) PAW-ATM: Parallel Applications Workshop, Alternatives To MPI
by Morris, Karla NMN 08 May '18

08 May '18

************************************************ Call for Papers PAW-ATM: Parallel Applications Workshop, Alternatives To MPI Held in conjunction with SC 18, Dallas, TX <http://sourceryinstitute.github.io/PAW/> ************************************************ Summary As high-performance computing hardware incorporates increasing levels of heterogeneity, hierarchical organization, and complexity, parallel programming techniques necessarily grow in complexity or in their ability to abstract away complexity. The concurrent development of multi- and many-core processors, deep memory hierarchies, and accelerators and the variety of ways to combine these makes the low-level language route unmanageable for domain experts tasked with developing applications. The technologies that a competent developer might be expected to master and combine include MPI plus CUDA, OpenMP, and OpenACC, most commonly denoted MPI + X. This approach inherently saddles the developer with low-level details that might better be handled by high-level abstractions. Higher-level parallel programming models offer rich sets of abstractions that feel natural in the intended applications. Such languages and tools include (Fortran, UPC, Julia), systems for large-scale data processing and analytics (Spark, Tensorflow, Dask), and frameworks and libraries that extend existing languages (Charm++, Unified Parallel C++ (UPC++), Coarray C++, HPX, Legion, Global Arrays). While there are tremendous differences between these approaches, all strive to support better programmer abstractions for concerns such as data parallelism, task parallelism, dynamic load balancing, and data placement across the memory hierarchy. This workshop will bring together applications experts who will present concrete practical examples of using such alternatives to MPI in order to illustrate the benefits of high-level approaches to scalable programming. The workshop expands upon the two similar workshops, PAW16 and PAW17, by broadening the theme beyond partitioned global address space languages. We invite you to take part in the Parallel Applications Workshop, Alternatives To MPI, and to join this vibrant and diverse community of researchers and developers. Scope and Aims The scope of the PAW-ATM workshop is to provide a forum for exhibiting case studies of higher-level programming models as MPI alternatives in the context of applications as a means of better understanding applications of MPI alternatives. We encourage the submission of papers and talks detailing such applications, including characterizations of scalability and performance, of expressiveness and programmability, as well as any downsides or areas for improvement in existing higher-level programming models. In addition to informing other application programmers about the potential that is available through MPI alternatives, the workshop is designed to communicate these experiences to compiler vendors, library developers, and system architects in order to achieve broader support for high-level approaches to scalable programming. We also specifically encourage submissions covering big data analytics, deep learning, and other novel and emerging application areas, beyond well-established HPC domains. Topics include, but are not limited to: * Novel application development using parallel programming languages. * Examples that demonstrate performance, compiler optimization, error checking, and reduced software complexity. * Applications from big data analytics, bioinformatics, and other novel areas. * Performance evaluation of applications developed using MPI alternatives. * Algorithmic models enabled by high-level parallel abstractions. * Experience with the use of new compiler and runtime environments. * Libraries using or supporting MPI alternatives. * Benefits of hardware abstraction and data locality on algorithm implementation. Submissions Submissions are solicited in two categories: Full-length papers presenting novel research results: * Full-length papers will be published in the workshop proceedings in cooperation with IEEE TCHPC. Submitted papers must be original work that has not appeared in and is not under consideration for another conference or a journal. Papers shall not exceed eight (8) pages including text, appendices, references, and figures. Appendix pages related to the reproducibility initiative not included. Extended abstracts summarizing published/preliminary results: * Extended abstracts will be evaluated separately and will not be included in the published proceedings; they are intended for timely communications of novel work that is going to be formally submitted elsewhere at a later stage, and/or of already published work that is nonetheless deemed appropriate for dissemination in this venue. Extended abstracts shall not exceed four (4) pages. Accepted full-length papers will be given longer presentation slots at the workshop than the abstract-only option. Submissions shall be submitted through Linklings ( https://submissions.supercomputing.org ). Submissions must use 10pt fonts in the IEEE format ( https://www.ieee.org/conferences/publishing/templates.html ). The page limit includes figures, tables, and your appendices, but does not include references, for which there is no page limit. Reproducibility initiative dependencies (Artifact Description or Computational Results Analysis) are also not included in the page limit. PAW-ATM follows the reproducibility initiative of SC18, please refer to http://sourceryinstitute.github.io/PAW/ for additional information. WORKSHOP CHAIR * Karla Morris - Sandia National Laboratory ORGANIZING COMMITTEE * Bradford L. Chamberlain - Cray Inc. * Salvatore Filippone - Cranfield University * Costin Iancu - Lawrence Berkeley National Laboratory PROGRAM COMMITTEE CHAIR * Bill Long - Cray Inc. PROGRAM COMMITTEE * Bradford L. Chamberlain - Cray Inc. * Valentin Churavy - Massachusetts Institute of Technology * Salvatore Filippone - Cranfield University, UK * Alex Gittens - Rensselaer Polytechnic Institute * Costin Iancu - Lawrence Berkeley National Laboratory * Hartmut Kaiser - Louisiana State University * Laxmikant Kale - University of Illinois * Seung-Hwan Lim - Oak Ridge National Laboratory * Bill Long - Cray Inc. * Karla Morris - Sandia National Laboratories * Mitsuhisa Sato - RIKEN Advanced Institute for Computational Science * Sean Treichler - NVIDIA * Jeremiah J. Wilke - Sandia National Laboratories ADVISORY COMMITTEE * Damian W. I. Rouson - Sourcery Institute * Katherine A. Yelick - Lawrence Berkeley National Laboratory IMPORTANT DATES: * Submission Deadline: July 31, 2018 * Author Notification: September 1, 2018 * Camera Ready: October 1, 2018 * Workshop Date: November 11--16, 2018

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