September 2017 - computational.science

Postdoctoral position in computer science at IRISA laboratory: Automatic « Clustering » of handwriting gestures
by Eric Anquetil 07 Sep '17

07 Sep '17

Postdoctoral position in computer science at IRISA laboratory (France, Rennes) : Automatic « Clustering » of handwriting gestures We apologize in advance if you receive multiple copies of this CFP. This position is related to the new project “e-fran” called ACTIF with a 4 years funding from the French government (“programme investissement d’avenir”). ACTIF aims at designing and experimenting tools and pedagogical approaches to help the “active” and “collaborative” learning in secondary school based on digital tablets oriented “stylus”. Among the partnership of the project can be cited INSA, IRISA, LP3C, Loustic, the company Script&Go, the Brittany region and the academy of Rennes. * Institution : INSA Rennes, IRISA Laboratory * Service : INTUIDOC research team – IRISA (France) * Project : e-fran /ACTIF (Learning et Collaboration with digital Tablets, Interactions and Feedback) * Position available from: September 1st, 2017 * Duration : fixed-term contract of 12 months (possibility of extension) * Salary: around 2100 € / month (net) Job description : <https://www-intuidoc.irisa.fr/files/2017/09/PostDoctoral-Automatic-Clusteri…>https://www-intuidoc.irisa.fr/files/2017/09/PostDoctoral-Automatic-Clusteri… must have a completed PhD and research experience in patternrecognition.Candidates should send a CV and a motivation letter toeric.anquetil(a)irisa.fr.---Eric ANQUETILProfessor at INSA, IRISA LaboratoryHead of Intuidoc team (http://www.irisa.fr/intuidoc)Program Manager of the Master of Science "Innovation and Entrepreneurship"Phone : +33 (0)6 22 93 44 18

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CFP: Parallel Computational Technologies 2018 (Rostov-on-Don, Russia, April 2-6, 2018)
by Цымблер Михаил Леонидович 07 Sep '17

07 Sep '17

FIRST ANNOUNCEMENT AND CALL FOR PAPERS Parallel Computational Technologies (PCT'2018), 12th International Scientific Conference, April 2-6, 2018, Rostov-on-Don, Russia http://agora.guru.ru/pavt/eng Conference founders: Russian Academy of Sciences (http://www.ras.ru) HPC Consortium of Russian Universities (http://hpc-russia.ru) Sponsored by Russian Foundation for Basic Research (http://www.rfbr.ru/rffi/eng) WELCOME Russian Academy of Sciences, High-Performance Computing Consortium of Russian Universities, Moscow State University, Don State Technical University, and South Ural State University are jointly organizing the 12th International Scientific Conference on Parallel Computational Technologies (PCT'2018) to be held in Rostov-on-Don, Russia, April 2-6, 2018. The main purpose of the PCT'2018 conference is to provide an opportunity to discuss the future of parallel computing as well as to report the results achieved by leading research groups in solving science and equipment issues using supercomputer technologies. The scope of the conference includes all aspects of high performance computing in science and technology such as applications, hardware and software, programming languages, etc. The 28th edition of Top50 of the CIS's most powerful computers will be announced on the first day of the conference. On working days of the conference, a supercomputer exhibition will be organized, where leading manufacturers of hardware and software present their latest products in the field of high performance computing. LANGUAGE The official languages of the Conference are Russian and English. SCOPE The scope of the conference includes, but not limited to, the following topics: * Parallel and distributed computing technologies * Cloud computing * Prospective multiprocessor architectures * Parallel and distributed database systems * High performance data mining * Artificial neural networks and deep learning * Management, administration, monitoring and testing of multiprocessor systems * Computational Mathematics * Computational Physics * Computational Chemistry * Gas hydrodynamics and heat transfer * High nonlinear and rapid processes in mechanics * Bioinformatics and medicine * Nanotechnology * Geoinformatics * Cryptography * Image processing and visualization * Computer algebra * Supercomputer education. CALL FOR PAPERS PCT'2018 admits papers presenting original contribution that have not been previously published and are not being submitted to another conference or journal. There are three categories of submissions: * Full paper describes the results of completed scientific research (12 to 15 pages in the LNCS one-column page format). * Short paper reports preliminary results of uncompleted scientific research (up to 12 pages in the LNCS one-column page format). * Abstract of the poster contains information about plans and initial results of recently started scientific research (one standard A4 page). Papers may be prepared in LaTeX or MS Word according to the LNCS one-column page format (cf. guidelines at the conference website http://agora.guru.ru/pavt2018/, "For Authors" section). Papers should be submitted electronically in PDF format through EasyChair system https://easychair.org/conferences/?conf=pct2018 by December 1, 2017. Each paper will be reviewed by three Program Committee members and/or invited experts to ensure high quality and relevance to the conference. At least one author of the accepted paper must attend the conference and present the paper. PROCEEDINGS All accepted full papers will be published in Springer's Communications in Computer and Information Science series (indexed in Web of Science and Scopus). All accepted short papers and posters will be published electronically and indexed in Russian Science Index. The best short papers will be published (after further revision) in Computational Mathematics and Software Engineering series of the Bulletin of the South Ural State University (http://vestnikvmi.susu.ru/) IMPORTANT DATES * Submission of abstracts: November 1, 2017 * Submission of the papers: December 1, 2017 * Notification of acceptance: January 15, 2018 * Camera-ready version: February 15, 2018 * Registration for participation in supercomputer exhibition: February 25, 2018 * Registration of participants (non-speakers): March 26, 2018 * Conference: April 2-6, 2018 April 2: arrival date April 3-5: conference work dates April 6: departure date CONTACT INFORMATION WEB PAGES Conference web site: http://agora.guru.ru/pavt/eng Submission web site: https://easychair.org/conferences/?conf=pct2018. Leonid Sokolinsky, DSc., Prof. (SUSU, Chelyabinsk) Co-chair of the PCT Program Committee E-mail: Leonid.Sokolinsky(a)susu.ru Tel.: (+7-351) 272 35 00 Mikhail Zymbler, CSc., Assoc. Prof. (SUSU, Chelyabinsk) Academic secretary of the PCT Program Committee E-mail: mzym(a)susu.ru Tel.: (+7-351) 267 90 06, ext. 112 PROGRAM COMMITTEE Chairman of the Program Committee: Viktor Sadovnichiy, academician of RAS, Moscow State University (Russia) Co-chairs of the Program Committee: Jack Dongarra, University of Tennessee (USA) Leonid Sokolinsky, South Ural State University (Russia) Vladimir Voevodin, corresponding member of RAS, Moscow State University (Russia) Academic secretary of the Program Committee: Mikhail Zymbler, South Ural State University (Russia) Members of the Program Committee: S.V. Ablameyko, Belarusian State University (Republic of Belarus) A.P. Afanasiev, Institute for Systems Analysis RAS (Russia) E.N. Akimova, Institute of Mathematics and Mechanics UrB RAS (Russia) A. Andrzejak, Heidelberg University (Germany) P. Balaji, Argonne National Laboratory (USA) Y.Ya. Boldyrev, Saint-Petersburg Polytechnic University (Russia) J. Carretero, Carlos III University of Madrid (Spain) R.K. Gazizov, Ufa State Aviation Technical University (Russia) V.P. Gergel, State University of Nizhny Novgorod (Russia) B.M. Glinsky, Institute of Computational Mathematics and Mathematical Geophysics SB RAS (Russia) V.D. Goryachev, Tver State Technical University (Russia) V.P. Il'in, Institute of Computational Mathematics and Mathematical Geophysics SB RAS (Russia) H. Kobayashi, Tohoku University (Japan) J. Kunkel, University of Hamburg (Germany) J. Labarta, Barcelona Supercomputing Center (Spain) A. Lastovetsky, University College Dublin (Ireland) T. Ludwig, German Climate Computing Center (Germany) V.N. Lykosov, Institute of Numerical Mathematics RAS (Russia) D. Mallmann, Julich Supercomputing Centre (Germany) M. Michalewicz, A*STAR Computational Resource Centre (Singapore) V.E. Malyshkin, Institute of Computational Mathematics and Mathematical Geophysics SB RAS (Russia) V.Ya. Modorsky, Perm Polytechnic University (Russia) A.V. Shamakina, High Performance Computing Center in Stuttgart (Germany) P. Shumyatsky, University of Brasilia (Brazil) H. Sithole, Centre for High Performance Computing (Republic of South Africa) A.V. Starchenko, Tomsk State University (Russia) T. Sterling, Indiana University (USA) M. Taufer, University of Delaware (USA) V.E. Turlapov, State University of Nizhny Novgorod (Russia) R. Wyrzykowski, Czestochowa University of Technology (Poland) M.V. Yakobovsky, Institute for Mathematical Modelling RAS (Russia) Y. Yamazaki, Federal University of Pelotas (Brazil)

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[CFP] REMINDER: IA^3 2017 Deadline upcoming
by Tumeo, Antonino 05 Sep '17

05 Sep '17

NEWS: UPCOMING DEADLINE!!! IA^3 2017 Seventh Workshop on Irregular Applications: Architectures and Algorithms http://hpc.pnl.gov/IA3/ November 13, 2017 In conjunction with SC17 In collaboration with ACM SIGHPC Sponsored by IEEE TCHPC Call for Papers Irregular applications occur in many subject matters. While inherently parallel, they exhibit highly variable execution performance at a local level due to unpredictable memory access patterns and/or network transfers, divergent control structures, and data imbalances. Moreover, they often require fine-grain synchronization and communication on large-data structures such as graphs, trees, unstructured grids, tables, sparse matrices, deep nets, and their combinations (such as, for example, attributed graphs). They have a significant degree of latent parallelism, which however is difficult to exploit due to their complex behavior. Current high performance architectures rely on data locality and regular computation to reduce access latencies, and often do not cope well with the requirements of these applications. Furthermore, irregular applications are difficult to scale on current supercomputing machines, due to their limits in fine-grained synchronization and small data transfers. Irregular applications pertain both to well established and emerging fields, such as machine learning, social network analysis, bioinformatics, semantic graph databases, Computer Aided Design (CAD), and computer security. Many of these application areas also process massive sets of unstructured data, which keep growing exponentially. Addressing the issues of irregular applications on current and future architectures will become critical to solve the challenges in science and data analysis of the next few years. This workshop seeks to explore solutions for supporting efficient execution of irregular applications in the form of new features at the level of the micro- and system-architecture, network, languages and libraries, runtimes, compilers, analysis, algorithms. Topics of interest, of both theoretical and practical significance, include but are not limited to: * Micro- and System-architectures, including multi- and many-core designs, heterogeneous processors, accelerators (GPUs, vector processors, Automata processor), reconfigurable (coarse grained reconfigurable and FPGA designs) and custom processors * Network architectures and interconnect (including high-radix networks, optical interconnects) * Novel memory architectures and designs (including processors-in memory) * Impact of new computing paradigms on irregular workloads (including neuromorphic processors and quantum computing) * Modeling, simulation and evaluation of novel architectures with irregular workloads * Innovative algorithmic techniques * Combinatorial algorithms (graph algorithms, sparse linear algebra, etc.) * Impact of irregularity on machine learning approaches * Parallelization techniques and data structures for irregular workloads * Data structures combining regular and irregular computations (e.g., attributed graphs) * Approaches for managing massive unstructured datasets (including streaming data) * Languages and programming models for irregular workloads * Library and runtime support for irregular workloads * Compiler and analysis techniques for irregular workloads * High performance data analytics applications, including graph databases Besides regular papers, papers describing work-in-progress or incomplete but sound, innovative ideas related to the workshop theme are also encouraged. We solicit both 8-page regular papers and 4-page position papers. Authors of exciting but not mature enough regular papers may be offered the option of a short 4-page paper and related short presentation. Artifact Evaluation For this edition of IA^3, authors of accepted regular papers will be invited to formally submit their supporting materials to the Artifact Evaluation process, similarly to the process followed for SC17. The participation to the Artifact Evaluation process is voluntary and will not change decisions regarding the paper. However, papers that undergo the evaluation process will receive a seal of approval on the paper, and will be able to participate in the BEST PAPER AWARD selection. DIVIDITI will provide an Amazon Gift Voucher (valued $200) to the authors of the paper that passes artifact evaluation with the highest score and that shares the artifact in the CK (Collective Knowledge - https://github.com/ctuning/ck) format. Authors that go through the Artifact Evaluation process are also encouraged (but not mandated) to submit the supporting materials as “Source Materials” in the digital library. For details on how to submit supporting materials to the Artifact Evaluation process, please refer to: http://ctuning.org/ae/submission.html. For any additional question on the Artifact Evaluation process please contact the Artifact Evaluation Chair Flavio Vella. Important Dates Abstract submission: 7 September 2017 - EXTENDED - FIRM Position or full paper submission: 7 September 2017 - EXTENDED - FIRM Notification of acceptance: 3 October 2017 Camera-ready position and full papers: 10 October 2017 Workshop: 13 November 2017 Submissions Submission site: https://easychair.org/conferences/?conf=ia32017 All submissions should be in double-column, single-spaced letter format, with at least one-inch margins on each side and respect the ACM standard proceedings templates (sigconf) available at: https://www.acm.org/publications/proceedings-template. The proceedings of the workshop will be published in cooperation with ACM SIGHPC. Submitted manuscripts may not exceed eight (8) pages in length for regular papers and four(4) pages for position papers including figures, tables and references. Organizers Antonino Tumeo, PNNL, US John Feo, PNNL/NIAC, US, Vito Giovanni Castellana, PNNL, US Artifact Evaluation Chair Flavio Vella, DIVIDITI, UK Publication Chair Marco Minutoli, PNNL, US Program Committee Scott Beamer, LBNL, US Michela Becchi, North Carolina State University, US Erik Boman, Sandia National Laboratories, US David Brooks, Harvard University, US Aydin Buluc, LBNL, US Sunita Chandrasekaran, University of Delaware, US Fabio Checconi, IBM, US Rajiv Gupta, Univerisity of California Riverside, US Maya Gokhale, LLNL, US Peter Kogge, Univ. of Notre Dame, US Vivek Kumar, Rice University, US John Leidel, Texas Tech University, US Kamesh Madduri, Pennsylvania State University, US Naoya Maruyama, RIKEN AICS, JP Tim Mattson, Intel, US Miquel Moreto, BSC and UPC, SP Richard Murphy, Micron Technology Inc, US Walid Najjar, University of California Riverside, US Maxim Naumov, NVIDIA, US Jacob Nelson, University of Washington, US Sreepathi Pai, University of Rochester, US Roger Pearce, LLNL, US Miquel Pericas, Chalmers University, SE Viktor Prasanna, University Of Southern California, US Alejandro Rico, ARM, US Jason Riedy, Georgia Institute of Technology, US Erik Saule, University of North Carolina at Charlotte, US John Shalf, LBNL, US Shaden Smith, University of Minnesota, US Bora Ucar, CNRS and LIP ENS Lyon, FR Ruud Van Der Pas, Oracle, US Flavio Vella, DIVIDITI, UK Ana Lucia Varbanescu, University of Amsterdam, NL Regards, Antonino Tumeo Research Scientist High Performance Computing Pacific Northwest National Laboratory

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5th Special Session on HPC in Modelling and Simulation - PDP 2018 - Cambridge, UK
by William Spataro 04 Sep '17

04 Sep '17

(sorry for cross postings) ************************************************************************** CALL FOR PAPERS: Fifth Special Session on High Performance Computing in Modelling and Simulation (HPCMS) Within PDP 2018 The 26th Euromicro International Conference on Parallel, and Network-Based Computing Cambridge, UK 21-23 March 2018 http://www.pdp2018.org/specialsessions/hpcms.html Deadline: September 15th, 2017 Contact: William Spataro - spataro(a)unical.it ************************************************************************* AIMS AND SCOPE The development of models through which computers can simulate the evolution of artificial and natural systems is fundamental for the advancement of Science. In the last decades, the increasing power of computers has allowed to considerably extend the application of computing methodologies in research and industry, but also to the quantitative study of complex phenomena. This has permitted a broad application of numerical methods for differential equation systems (e.g., FEM, FDM, etc.) on one hand, and the application of alternative computational paradigms, such as Cellular Automata, Genetic Algorithms, Neural networks, Swarm Intelligence, etc., on the other. These latter have demonstrated their effectiveness for modelling purposes when traditional simulation methodologies have proven to be impracticable. Following the success of our past HPCMS workshops which were held in Turin, Turku and Crete, we are glad to invite you to our fourth edition which will take place in St. Petersburg (Russia). An important mission of the HPCMS Workshop is to provide a platform for a multidisciplinary community composed of scholars, researchers, developers, educators, practitioners and experts from world leading Universities, Institutions, Agencies and Companies in Computational Science, and thus in the High Performance Computing for Modelling and Simulation field. HPCMS intent is to offer an opportunity to express and confront views on trends, challenges, and state-of-the art in diverse application fields, such as engineering, physics, chemistry, biology, geology, medicine, ecology, sociology, traffic control, economy, etc. Topics of interest include, but are not limited to, the following: - High-performance computing in computational science: intra-disciplinary and multi-disciplinary research applications - Complex systems modelling and simulation - Cellular Automata, Genetic Algorithms, Neural networks, Swarm Intelligence implementations - Integrated approach to optimization and simulation - MPI, OpenMP, GPGPU applications in Computational Science - Optimization algorithms, modelling techniques related to optimization in Computational Science - High-performance Software developed to solve science (e.g., biological, physical, and social), engineering, medicine, and humanities problems - Hardware approaches of high performance computing in modeling and simulation IMPORTANT DATES Paper submission: 15th Sep 2017 Acceptance notification: 13th Oct 2017 Camera ready due: 17nd Nov 2017 Conference: 21th - 23th Mar 2018 Submission guidelines Prospective authors should submit a full paper not exceeding 8 pages in the IEEE Conference proceedings format (IEEEtran, double-column, 10pt). Double-bind review: the first page of the paper should contain only the title and abstract; in the reference list, references to the authors’ own work should appear as "omitted for blind review" entries. For submission, please use the following link: http://www.easychair.org/conferences/?conf=pdp2018 Manuscript submission Publication All accepted papers will be included in the same volume, published by the Conference Publishing Services (CPS). The Final Paper Preparation and Submission Instructions will be published after the notification of acceptance. Authors of accepted papers are expected to register and present their papers at the Conference. Conference proceedings will be submitted for inclusion in Xplore and the CSDL, and for indexing, among others, to DBLP, Scopus ScienceDirect, and ISI Web of Knowledge. Special Issue As for previous editions, organizers of the HPCMS session are planning a Special Issue of an important international ISI Journal, based on distinguished papers that will be accepted for the session. For instance, a selected number of papers of the past workshop editions have been published on the ISI Journal “International Journal of High Performance Computing Applications” and “Concurrency and Computation: Practice and Experience”. Organizers William Spataro – University of Calabria, Italy Georgios Sirakoulis - Democritus University of Thrace, Greece Giuseppe A. Trunfio – University of Sassari, Italy Program Committee Gihan R. Mudalige, University of Warwick, UK Angelos Amanatiadis, Democritus University of Thrace, Greece Donato D’Ambrosio, University of Calabria, Italy Pawel Topa, AGH University of Science and Technology, Poland Gianluigi Folino, ICAR-CNR, Italy Lou D’Alotto, York College/CUNY, New York, USA Antonios Gasteratos, Democritus University of Thrace, Greece Ioakeim Georgoudas, Democritus University of Thrace, Greece Marco Beccutti, University of Torino, Italy Rolf Hoffmann, Darmstadt University, Germany Ioannis Karafyllidis, Democritus University of Thrace, Greece Yaroslav Sergeyev, University of Calabria, Italy Antisthenis Tsompanas, University of the West of England, UK Rocco Rongo, University of Calabria, Italy Georgios Sirakoulis, Democritus University of Thrace, Greece William Spataro, University of Calabria, Italy Giuseppe A. Trunfio, University of Sassari, Italy Marco Villani, University of Modena and Reggio Emilia, Italy Jaroslaw Was, AGH University of Science and Technology, Poland Davide Spataro, University of Calabria, Italy Massimo Cafaro, University of Salento, Italy Mario Cannataro, University Magna Graecia of Catanzaro, Italy -- ------------------------------------------------------------------------------- Il banner è generato automaticamente dal servizio di posta elettronica dell'Università della Calabria <http://www.unical.it>

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Call for papers ICSPS 2017
by Luis Anido Rifon 04 Sep '17

04 Sep '17

*2017 9th International Conference on Signal Processing Systems (ICSPS 2017)* AUT University, Auckland, New Zealand, November 27-30, 2017 www.icsps.org *Important dates* Paper Submission Deadline: Oct. 1, 2017 *Invited speakers* Prof. Robert Minasian, FIEEE, FOSA The University of Sydney, Australia; Prof. Liyanage C De Silva, Dean, Faculty of Integrated Technologies University of Brunei Darussalam, Brunei Darussalam; Assoc. Prof. Waleed Habib Abdulla The University of Auckland, New Zealand; Assoc. Prof. Ruili Wang Massey University, New Zealand; Prof. Luis Anido-Rifón University of Vigo, Spain *Publication* Submitted papers will be peer-reviewed and the accepted ones after proper registration and presentation will be published in the International Conference Proceedings Series by ACM (ISBN: 978-1-4503-5384-7), which will be archived in the ACM Digital Library and submitted for index by Ei Compendex, Scopus, Thomson Reuters Conference Proceedings Citation Index (ISI Web of Science), etc. *Conference venue* This year 9th ICSPS will be held at The Sir Paul Reeves Building at AUT University, Auckland, New Zealand for the third time. *Schedule* November 27, 2017 10:00 AM - 17:00 PM Participants Onsite Registration & Conference Materials Collection November 28, 2017 9:30 AM - 12:00 AM Opening Ceremony and Keynote Speeches November 28, 2017 13:30 PM - 18:00 PM Oral and Poster Sessions November 29, 2017 9:30 AM - 12:00 AM Keynote Speeches November 29, 2017 13:30 PM - 18:00 PM Oral and Poster Sessions November 30, 2017 10:00 AM- 12:00 AM Academic Visit *Contact* Conference secretary: Yolanda Dong E-mail: icsps(a)iacsit.org Tel:+86-28-86528758

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CFP: 2018 IEEE/ACM Design Automation Conference Hardware Design Contest
by Yiyu Shi 01 Sep '17

01 Sep '17

The 2018 IEEE/ACM Design Automation Conference Hardware Design Contest features embedded hardware implementation of neural network based target tracking for drones. Contestants will receive training dataset provided by our industry sponsor DJI <https://www.dji.com/>, and a hidden dataset will be used to evaluate the performance of the designs in terms of accuracy and power. Contestants will compete in two different categories: FPGA and GPU, and grand cash awards will be given to the top three teams in each category. In addition, our industry sponsor Xilinx and Nvidia will provide a limited number of successfully registered teams with a free design kit (on a first-come-first-served basis). The award ceremony will be held at 2018 IEEE/ACM Design Automation Conference <https://dac.com/>. For more details or to register, please go to http://www.cse.cuhk.edu.hk/ ~byu/2018-DAC-HDC/ Cordially, 2018 HDC Organizing Committee

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Deadline extension: 3rd Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC 2017) at SC17: Extended abstracts due Sept. 15
by Jason D. Bakos 01 Sep '17

01 Sep '17

========================================================================== ** Call for Papers ** ========================================================================== Third International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC 2017) Held in conjunction with Supercomputing 2017 Friday Morning, November 17, 2017 Denver, CO http://h2rc.cse.sc.edu ========================================================================== Submission Deadline (EXTENDED): September 15, 2017 (one page extended abstracts) ========================================================================== As conventional von-Neumann architectures are suffering from rising power densities, we are facing an era with power, energy efficiency, and cooling as first-class constraints for scalable HPC. FPGAs can tailor the hardware to the application, avoiding overheads and achieving higher hardware efficiency than general-purpose architectures. Leading FPGA manufacturers have recently made a concerted effort to provide a range of higher-level, easier to use high-level programming models for FPGAs. Such initiatives are already stimulating new interest within the HPC community around the potential advantages of FPGAs over other architectures. With this in mind, this workshop, now in its third year, brings together HPC and heterogeneous-computing researchers to demonstrate and share experiences on legacy and new high-level programming models, optimizations specific to scientific computing and data analytics, tools for performance/energy improvements, FPGA computing in the cloud, and popular applications for reconfigurable computing such as machine learning and big data. ========================================================================== Submissions (one page extended abstract): Submissions are solicited that explore the state of the art in the use of FPGAs in heterogeneous high-performance computing architectures and, at a system level, in data centers and supercomputers. FPGAs may be considered from either or both the distributed, parallel and composable fabric of compute elements or from their dynamic reconfigurability. We particularly encourage submissions which focus on the mapping of algorithms and applications to heterogeneous FPGA-based systems as well as the overall impact of such architectures on the compute capacity, cost, power efficiency, and overall computational capabilities of data centers and supercomputers. Submissions may report on theoretical or applied research, implementation case studies, benchmarks, standards, or any other area that promises to make a significant contribution to our understanding of heterogeneous high-performance reconfigurable computing and will help to shape future research and implementations in this domain. A non-comprehensive list of potential topics of interest is given below: 1. FPGAs in Supercomputer, Cloud and Data Center: FPGAs in relation to challenges to Cloud/Data Center/Supercomputing posed by the end of Dennard scaling 2. Supercomputing, Cloud and Data Center Applications: Exploiting FPGA compute fabric to implement critical cloud/HPC applications 3. Leveraging Reconfigurability: Using reconfigurability for new approaches to algorithms used in cloud/HPC applications 4. Benchmarks: Compute performance and/or power and cost efficiency for cloud/HPC with heterogeneous architectures using FPGAs 5. Implementation Studies: Heterogenous Hardware and Management Infrastructure 6. Programming Languages/Runtimes/OS/Tools/Frameworks for Heterogeneous High Performance Reconfigurable Computing 7. Future-gazing: New Applications/The Cloud Enabled by Heterogeneous High Performance Reconfigurable Computing, Evolution of Computer Architecture in relation to Heterogeneous High Performance Reconfigurable Computing 8. Community building: Standards, consortium activity, open source, education, initiatives to enable and grow Heterogeneous High Performance Reconfigurable Computing Prospective authors are invited to submit original and unpublished contributions as a ONE PAGE EXTENDED ABSTRACT in ACM SIG Proceedings format. ========================================================================== You can submit your contribution(s) through a link on the H2RC website: http://h2rc.cse.sc.edu ========================================================================== Important dates: Submission Deadline (extended): September 15, 2017 Acceptance Notification: October 15, 2017 Camera-ready Manuscripts Due: November 4, 2017 Workshop Date: November 17, 2017 ========================================================================== Workshop Format: H2RC is a half-day Friday workshop. It will be comprised of Keynote and invited talks and talks selected from paper submissions. Preliminary Agenda: 8:30 a.m. Opening Remarks 8:35 a.m. Keynote 1: FPGAs in AWS and First Use Cases (joint talk by AWS, Ngcodc and Xilinx) 9:35 a.m. Lightning Talks 10:00 a.m. Coffee break 10:30 a.m. Keynote 2: Brainwave (Microsoft Research) 11:30 p.m. Lightning talks 12:00 p.m. Invited talk 12:30 p.m. Adjorn ========================================================================== Organizing Committee: Workshop Organizers: Michaela Blott, Xilinx Franck Cappello, Argonne National Lab Torsten Hoefler, ETH Zurich Jason D. Bakos, University of South Carolina Program Committee: Rizwan Ashraf, Oak Ridge National Laboratory Paul Chow, University of Toronto Hans Eberle, NVIDIA Alan George, University of Florida Christoph Hagleitner, IBM Miriam Leeser, Northeastern University Viktor Prasanna, Univ. of Southern California Marco Santambrogio, Politecnico Di Milano Jeffrey Vetter, Oak Ridge National Lab -- Jason D. Bakos, Ph.D. Professor Dept. of Computer Science and Engineering Univ. of South Carolina 301 Main St., Suite 3A01L Columbia, SC 29208 803-777-8627 (voice), 803-777-3767 (fax) http://www.cse.sc.edu/~jbakos jbakos(a)cse.sc.edu

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Call For Papers [Extended Deadline]: ESPM2@SC17 - Third International Workshop on Extreme Scale Programming Models and Middleware
by Hari Subramoni 01 Sep '17

01 Sep '17

======================================================================== Call For Papers Third International IEEE Workshop on Extreme Scale Programming Models and Middleware (ESPM2 2017) November 12, 2017, Denver, Colorado to be held in conjunction with SuperComputing 2017, November 12 - 16, 2017 Denver, Colorado http://nowlab.cse.ohio-state.edu/espm2/ ======================================================================== Based on requests from authors, we have extended the technical paper submission deadline for ESPM2'17 to 09/11/17. A complete and updated "Call for Papers" follows. Next generation architectures and systems being deployed are characterized by high concurrency, low memory per-core, and multiple levels of hierarchy and heterogeneity. These characteristics bring out new challenges in energy efficiency, fault-tolerance and, scalability. It is commonly believed that software has the biggest share of the responsibility to tackle these challenges. In other words, this responsibility is delegated to the next generation programming models and their associated middleware/runtimes. This workshop focuses on different aspects of programming models such as task-based parallelism (Charm++, OCR, Habanero, Legion, X10, HPX, etc), PGAS (OpenSHMEM, UPC, CAF, Chapel, UPC++, etc.), BigData (Hadoop, Spark, etc), Deep Learning (Caffe, Microsoft CNTK, Google TensorFlow), directive-based languages (OpenMP, OpenACC) and Hybrid MPI+X, etc. It also focuses on their associated middleware (unified runtimes, interoperability for hybrid programming, tight integration of MPI+X, and support for accelerators) for next generation systems and architectures. The ultimate objective of the ESPM2 workshop is to serve as a forum that brings together researchers from academia and industry working in the areas of programming models, runtime systems, compilers, programming languages, and application developers. ESPM2 2017 will be held as a full day workshop in conjunction with the SuperComputing (SC 2017), Denver, Colorado, USA, Sunday, November 12th, 2017. Topics ------ ESPM2 2017 welcomes original submissions in a range of areas, including but not limited to: * New programming models, languages and constructs for exploiting high concurrency and heterogeneity * Experience with and improvements for existing parallel languages and run-time environments such as: - MPI - PGAS (OpenSHMEM, UPC, CAF, Chapel, UPC++, etc.) - Directive-based programming (OpenMP, OpenACC) - Asynchronous Task-based models (Charm++, OCR, Habanero, Legion, X10, HPX, etc) - Hybrid MPI+X models - BigData (Hadoop, Spark, etc), and - Deep Learning (Caffe, Microsoft CNTK, Google TensorFlow) * Parallel compilers, programming tools, and environments * Software and system support for extreme scalability including fault tolerance * Programming environments for heterogeneous multi-core systems and accelerators such as KNL, OpenPOWER, ARM, GPUs, FPGAs, MICs, and DSPs Papers should present original research and should provide sufficient background material to make them accessible to the broader community. Best Paper Award ---------------- Intel has generously offered to sponsor the Best Paper Award. This award will be given to the author(s) of the paper selected by the Technical Program Committee and the Program Chairs. The award will be determined from viewpoints of the technical and scientific merits, impact on the science and engineering of the research work and the clarity of presentation of the research contents in the paper. Keynote Speakers ---------------- We are happy to announce that Prof. William D. Gropp, Interim Director and Chief Scientist at the National Center for Supercomputing Applications and the Thomas M. Siebel Chair in Computer Science at the University of Illinois Urbana-Champaign will deliver the keynote address at ESPM2'17. Panel Information ----------------- Panel Topic : Effective Programming Models for Deep Learning at Scale Panel Moderator : Daniel Holmes, EPCC, The University of Edinburgh, UK. Panel Members : Coming soon! Paper Submission and Registration --------------------------------- Abstracts and papers need to be submitted via the EasyChair conference system. EasyChair URL for ESPM2'17: https://easychair.org/conferences/?conf=espm22017 Submissions should not exceed 8 pages using ACM format with 10pt font. Each submission must be a single PDF file. Papers must be submitted in PDF format (readable by Adobe Acrobat Reader 5.0 and higher) and formatted for 8.5" x 11" (U.S. Letter). The manuscript should be formatted according to ACM format (see http://www.acm.org/sigs/publications/proceedings-templates) Papers should present original research and should provide sufficient background material to make them accessible to the broader community. It should not be submitted in parallel to any other conference or journal. At least one of the authors of each accepted paper must register as a participant of the workshop and present the paper at the workshop, in order to have the paper published in the proceedings. Each research paper will be taken through a comprehensive peer review process by an internationally recognized group of experts in the field. Papers will be evaluated along the metrics of a) Quality of Presentation; b) Novelty / Originality; c) Relation to State of the Art; d) Technical Strength; e) Significance of Work; and f) Relevance to Workshop. Every effort will be made to ensure that each paper receives multiple reviews. Please contact the Program Chairs for any questions/clarifications Proceedings Information ----------------------- ACM SigHPC will publish the workshop proceedings which will be available through the ACM Digital Library. The camera-ready versions need to be submitted via the EasyChair conference management system. The link to the submission site will be provided soon. Please contact the Program Chairs for any questions/clarifications. Important Dates --------------- Technical paper submission deadline : 11:59 PM, AoE, September 11, 2017 Author notification : October 7, 2017 Camera-ready deadline : 11:59 PM, AoE, October 13, 2017 Workshop : Sunday, November 12, 2017 ESPM2'17 Workshop Organizers ---------------------------- Hari Subramoni, The Ohio State University Karl Schulz, Intel Corporation Dhabaleswar K. (DK) Panda, The Ohio State University Program Committee ----------------- * Guang R. Gao, University of Delaware * Vladimir Getov, University of Westminster, UK * Jeff Hammond, Intel Labs * Michael A. Heroux, Sandia National Laboratories * Costin Iancu, Lawrence Berkeley National Laboratory * Darren Kerbyson, Pacific Northwest National Laboratory * Guangming Tan, Institute of Computing Technology, Chinese Academy of Sciences, China * Olivier Tardieu, IBM T.J. Watson Research Center * Daniel Tian, The Portland Group * Sean Treichler, NVIDIA Corporation * Abhinav Vishnu, Pacific Northwest National Laboratory Further Information ------------------- See the ESPM2'17 website at http://nowlab.cse.ohio-state.edu/espm2/ Thanks, The ESPM2'17 Organizing Committee.

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